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Differential D17036

[mips] Addition of the [d]rem and [d]remu instructions
ClosedPublic

Authored by smaksimovic on Feb 9 2016, 11:41 AM.

Details

Reviewers
dsanders
vkalintiris
slthakur
zoran.jovanovic
obucina
sdardis
abeserminji
atanasyan
Commits
rG0a23998fe75d: [mips] Addition of the [d]rem and [d]remu instructions
rL336545: [mips] Addition of the [d]rem and [d]remu instructions
Summary

Related to http://reviews.llvm.org/D15772

Depends on http://reviews.llvm.org/D16889

Adds [D]REM[U] instructions.

Patch By: Srdjan Obucina

Contributions from: Simon Dardis

Diff Detail

Event Timeline

obucina updated this revision to Diff 47345.Feb 9 2016, 11:41 AM
obucina retitled this revision from to [mips] Addition of the [d]rem and [d]remu instructions.
obucina updated this object.
obucina added reviewers: dsanders, zoran.jovanovic.
obucina added a subscriber: llvm-commits.
Herald added a reviewer: vkalintiris. · View Herald TranscriptFeb 9 2016, 11:41 AM
Herald added a subscriber: dsanders. · View Herald Transcript
obucina updated this revision to Diff 49174.Feb 26 2016, 4:49 AM
obucina edited edge metadata.

Patch reduced to contain only changes for adding REM macro.

obucina added a comment.Mar 15 2016, 9:03 AM

Ping, dependant on D16888 and 16889

sdardis commandeered this revision.Feb 8 2017, 6:05 AM
sdardis added a reviewer: obucina.
sdardis added a subscriber: sdardis.

Taking over this patch to repost.

sdardis updated this revision to Diff 88422.Feb 14 2017, 1:20 PM
sdardis edited the summary of this revision. (Show Details)
sdardis added a reviewer: slthakur.

Updated to trunk.

smaksimovic commandeered this revision.Jun 15 2018, 8:16 AM
smaksimovic added a reviewer: sdardis.
smaksimovic added reviewers: abeserminji, atanasyan.
Herald added a subscriber: arichardson. · View Herald TranscriptJun 15 2018, 8:16 AM
abeserminji added a comment.Jul 4 2018, 7:51 AM

LGTM

abeserminji accepted this revision.Jul 9 2018, 3:21 AM
This revision is now accepted and ready to land.Jul 9 2018, 3:21 AM
Closed by commit rL336545: [mips] Addition of the [d]rem and [d]remu instructions (authored by smaksimovic). · Explain WhyJul 9 2018, 6:11 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
Mips/
AsmParser/
99 lines
68 lines
test/
MC/
Mips/
232 lines
231 lines
222 lines
225 lines

Diff 49174

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Show First 20 Lines • Show All 210 Lines • ▼ Show 20 Lines bool expandAliasImmediate(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions); SmallVectorImpl<MCInst> &Instructions);
bool expandBranchImm(MCInst &Inst, SMLoc IDLoc, bool expandBranchImm(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions); SmallVectorImpl<MCInst> &Instructions);
bool expandCondBranches(MCInst &Inst, SMLoc IDLoc, bool expandCondBranches(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions); SmallVectorImpl<MCInst> &Instructions);
bool expandDiv(MCInst &Inst, SMLoc IDLoc, bool expandDivRem(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions, const bool IsMips64, SmallVectorImpl<MCInst> &Instructions, const bool IsMips64,
const bool Signed); const bool Signed);
bool expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, SMLoc IDLoc, bool expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions); SmallVectorImpl<MCInst> &Instructions);
bool expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, bool expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions); SmallVectorImpl<MCInst> &Instructions);
bool expandUlw(MCInst &Inst, SMLoc IDLoc, bool expandUlw(MCInst &Inst, SMLoc IDLoc,
▲ Show 20 Lines • Show All 1,812 Lines • ▼ Show 20 LinesMipsAsmParser::tryExpandInstruction(MCInst &Inst, SMLoc IDLoc,
case Mips::BLTULImmMacro: case Mips::BLTULImmMacro:
case Mips::BLEULImmMacro: case Mips::BLEULImmMacro:
case Mips::BGEULImmMacro: case Mips::BGEULImmMacro:
case Mips::BGTULImmMacro: case Mips::BGTULImmMacro:
return expandCondBranches(Inst, IDLoc, Instructions) ? MER_Fail return expandCondBranches(Inst, IDLoc, Instructions) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::SDivMacro: case Mips::SDivMacro:
case Mips::SDivIMacro: case Mips::SDivIMacro:
return expandDiv(Inst, IDLoc, Instructions, false, true) ? MER_Fail case Mips::SRemMacro:
case Mips::SRemIMacro:
return expandDivRem(Inst, IDLoc, Instructions, false, true) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::DSDivMacro: case Mips::DSDivMacro:
case Mips::DSDivIMacro: case Mips::DSDivIMacro:
return expandDiv(Inst, IDLoc, Instructions, true, true) ? MER_Fail case Mips::DSRemMacro:
case Mips::DSRemIMacro:
return expandDivRem(Inst, IDLoc, Instructions, true, true) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::UDivMacro: case Mips::UDivMacro:
case Mips::UDivIMacro: case Mips::UDivIMacro:
return expandDiv(Inst, IDLoc, Instructions, false, false) ? MER_Fail case Mips::URemMacro:
case Mips::URemIMacro:
return expandDivRem(Inst, IDLoc, Instructions, false, false) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::DUDivMacro: case Mips::DUDivMacro:
case Mips::DUDivIMacro: case Mips::DUDivIMacro:
return expandDiv(Inst, IDLoc, Instructions, true, false) ? MER_Fail case Mips::DURemMacro:
case Mips::DURemIMacro:
return expandDivRem(Inst, IDLoc, Instructions, true, false) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::PseudoTRUNC_W_S: case Mips::PseudoTRUNC_W_S:
return expandTrunc(Inst, false, false, IDLoc, Instructions) ? MER_Fail return expandTrunc(Inst, false, false, IDLoc, Instructions) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::PseudoTRUNC_W_D32: case Mips::PseudoTRUNC_W_D32:
return expandTrunc(Inst, true, false, IDLoc, Instructions) ? MER_Fail return expandTrunc(Inst, true, false, IDLoc, Instructions) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::PseudoTRUNC_W_D: case Mips::PseudoTRUNC_W_D:
▲ Show 20 Lines • Show All 881 Lines • ▼ Show 20 Linesbool MipsAsmParser::expandCondBranches(MCInst &Inst, SMLoc IDLoc,
emitRRX(IsLikely ? (AcceptsEquality ? Mips::BEQL : Mips::BNEL) emitRRX(IsLikely ? (AcceptsEquality ? Mips::BEQL : Mips::BNEL)
: (AcceptsEquality ? Mips::BEQ : Mips::BNE), : (AcceptsEquality ? Mips::BEQ : Mips::BNE),
ATRegNum, Mips::ZERO, MCOperand::createExpr(OffsetExpr), IDLoc, ATRegNum, Mips::ZERO, MCOperand::createExpr(OffsetExpr), IDLoc,
Instructions); Instructions);
return false; return false;
} }
bool MipsAsmParser::expandDiv(MCInst &Inst, SMLoc IDLoc, bool MipsAsmParser::expandDivRem(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions, SmallVectorImpl<MCInst> &Instructions,
const bool IsMips64, const bool Signed) { const bool IsMips64, const bool Signed) {
if (hasMips32r6()) { if (hasMips32r6()) {
Error(IDLoc, "instruction not supported on mips32r6 or mips64r6"); Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
return false; return false;
} }
warnIfNoMacro(IDLoc); warnIfNoMacro(IDLoc);
const MCOperand &RdRegOp = Inst.getOperand(0); const MCOperand &RdRegOp = Inst.getOperand(0);
Show All 26 Linesbool MipsAsmParser::expandDivRem(MCInst &Inst, SMLoc IDLoc,
} else { } else {
DivOp = Signed ? Mips::SDIV : Mips::UDIV; DivOp = Signed ? Mips::SDIV : Mips::UDIV;
ZeroReg = Mips::ZERO; ZeroReg = Mips::ZERO;
SubOp = Mips::SUB; SubOp = Mips::SUB;
} }
bool UseTraps = useTraps(); bool UseTraps = useTraps();
unsigned Opcode = Inst.getOpcode();
bool isDiv = Opcode == Mips::SDivMacro || Opcode == Mips::SDivIMacro ||
Opcode == Mips::UDivMacro || Opcode == Mips::UDivIMacro ||
Opcode == Mips::DSDivMacro || Opcode == Mips::DSDivIMacro ||
Opcode == Mips::DUDivMacro || Opcode == Mips::DUDivIMacro;
bool isRem = Opcode == Mips::SRemMacro || Opcode == Mips::SRemIMacro ||
Opcode == Mips::URemMacro || Opcode == Mips::URemIMacro ||
Opcode == Mips::DSRemMacro || Opcode == Mips::DSRemIMacro ||
Opcode == Mips::DURemMacro || Opcode == Mips::DURemIMacro;
if (isRem && (RdReg == Mips::ZERO || RdReg == Mips::ZERO_64)) {
emitRR(DivOp, RsReg, RtReg, IDLoc, Instructions);
return false;
}
if (RtOp.isImm()) { if (RtOp.isImm()) {
unsigned ATReg = getATReg(IDLoc); unsigned ATReg = getATReg(IDLoc);
if (!ATReg) if (!ATReg)
return true; return true;
if (ImmValue == 0) { if (ImmValue == 0) {
if (RsReg == Mips::ZERO || RsReg == Mips::ZERO_64) if (RsReg == Mips::ZERO || RsReg == Mips::ZERO_64)
Warning(IDLoc, "dividing zero by zero"); Warning(IDLoc, "dividing zero by zero");
else else
Warning(IDLoc, "division by zero"); Warning(IDLoc, "division by zero");
if (UseTraps) if (UseTraps)
emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, Instructions); emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, Instructions);
else else
emitII(Mips::BREAK, 0x7, 0, IDLoc, Instructions); emitII(Mips::BREAK, 0x7, 0, IDLoc, Instructions);
return false; return false;
} }
if (ImmValue == 1) { if (isRem && (ImmValue == 1 || (Signed && (ImmValue == -1)))) {
emitRRR(Mips::ADDu, RdReg, ZeroReg, ZeroReg, IDLoc, Instructions);
return false;
} else if (isDiv && ImmValue == 1) {
emitRRR(Mips::ADDu, RdReg, RsReg, Mips::ZERO, IDLoc, Instructions); emitRRR(Mips::ADDu, RdReg, RsReg, Mips::ZERO, IDLoc, Instructions);
return false; return false;
} else if (Signed && ImmValue == -1) { } else if (isDiv && Signed && ImmValue == -1) {
emitRRR(SubOp, RdReg, Mips::ZERO, RsReg, IDLoc, Instructions); emitRRR(SubOp, RdReg, ZeroReg, RsReg, IDLoc, Instructions);
return false; return false;
} else { }
if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, true, false, if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, true, false,
Inst.getLoc(), Instructions)) Inst.getLoc(), Instructions))
return true; return true;
emitRR(DivOp, RsReg, ATReg, IDLoc, Instructions); emitRR(DivOp, RsReg, ATReg, IDLoc, Instructions);
emitR(Mips::MFLO, RdReg, IDLoc, Instructions); emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, Instructions);
return false; return false;
} }
return true;
}
if (RsReg == Mips::ZERO || RsReg == Mips::ZERO_64) { if (RsReg == Mips::ZERO || RsReg == Mips::ZERO_64) {
if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64)
Warning(IDLoc, "dividing zero by zero"); Warning(IDLoc, "dividing zero by zero");
if (IsMips64) { if (IsMips64) {
if (Signed && (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64)) { if (Signed && (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64)) {
if (UseTraps) { if (UseTraps) {
emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, Instructions); emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, Instructions);
return false; return false;
} }
emitII(Mips::BREAK, 0x7, 0, IDLoc, Instructions); emitII(Mips::BREAK, 0x7, 0, IDLoc, Instructions);
return false; return false;
} }
} else { } else {
if (isDiv) {
emitRR(DivOp, RsReg, RtReg, IDLoc, Instructions); emitRR(DivOp, RsReg, RtReg, IDLoc, Instructions);
return false; return false;
} else if (isRem && Signed) {
if (UseTraps) {
emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, Instructions);
return false;
}
emitII(Mips::BREAK, 0x7, 0, IDLoc, Instructions);
return false;
}
} }
} }
if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) { if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) {
Warning(IDLoc, "division by zero"); Warning(IDLoc, "division by zero");
if (Signed) { if (Signed) {
if (UseTraps) { if (UseTraps) {
emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, Instructions); emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, Instructions);
Show All 22 Linesbool MipsAsmParser::expandDivRem(MCInst &Inst, SMLoc IDLoc,
} }
emitRR(DivOp, RsReg, RtReg, IDLoc, Instructions); emitRR(DivOp, RsReg, RtReg, IDLoc, Instructions);
if (!UseTraps) if (!UseTraps)
emitII(Mips::BREAK, 0x7, 0, IDLoc, Instructions); emitII(Mips::BREAK, 0x7, 0, IDLoc, Instructions);
if (!Signed) { if (!Signed) {
emitR(Mips::MFLO, RdReg, IDLoc, Instructions); emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, Instructions);
return false; return false;
} }
unsigned ATReg = getATReg(IDLoc); unsigned ATReg = getATReg(IDLoc);
if (!ATReg) if (!ATReg)
return true; return true;
emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, Instructions); emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, Instructions);
if (IsMips64) { if (IsMips64) {
// Branch to the mflo instruction. // Branch to the mflo instruction.
emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, Instructions); emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, Instructions);
emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, Instructions); emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, Instructions);
emitRRI(Mips::DSLL32, ATReg, ATReg, 0x1f, IDLoc, Instructions); emitRRI(Mips::DSLL32, ATReg, ATReg, 0x1f, IDLoc, Instructions);
} else { } else {
// Branch to the mflo instruction. // Branch to the mflo instruction.
emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, Instructions); emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, Instructions);
emitRI(Mips::LUi, ATReg, (uint16_t)0x8000, IDLoc, Instructions); emitRI(Mips::LUi, ATReg, (uint16_t)0x8000, IDLoc, Instructions);
} }
if (UseTraps) if (UseTraps)
emitRRI(Mips::TEQ, RsReg, ATReg, 0x6, IDLoc, Instructions); emitRRI(Mips::TEQ, RsReg, ATReg, 0x6, IDLoc, Instructions);
else { else {
// Branch to the mflo instruction. // Branch to the mflo instruction.
emitRRI(Mips::BNE, RsReg, ATReg, BranchTargetNoTraps, IDLoc, Instructions); emitRRI(Mips::BNE, RsReg, ATReg, BranchTargetNoTraps, IDLoc, Instructions);
if (isDiv)
emitRRI(Mips::SLL, ZeroReg, ZeroReg, 0, IDLoc, Instructions); emitRRI(Mips::SLL, ZeroReg, ZeroReg, 0, IDLoc, Instructions);
else
createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions);
emitII(Mips::BREAK, 0x6, 0, IDLoc, Instructions); emitII(Mips::BREAK, 0x6, 0, IDLoc, Instructions);
} }
emitR(Mips::MFLO, RdReg, IDLoc, Instructions); emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, Instructions);
return false; return false;
} }
bool MipsAsmParser::expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, bool MipsAsmParser::expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU,
SMLoc IDLoc, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) { SmallVectorImpl<MCInst> &Instructions) {
assert(Inst.getNumOperands() == 3 && "Invalid operand count"); assert(Inst.getNumOperands() == 3 && "Invalid operand count");
▲ Show 20 Lines • Show All 992 Lines • Show Last 20 Lines

lib/Target/Mips/MipsInstrInfo.td

Show First 20 Lines • Show All 992 Lines • ▼ Show 20 Lines
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"divu $rt, $rs", (UDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt, def : MipsInstAlias<"divu $rt, $rs", (UDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>; GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"divu $rd, $imm", (UDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd, def : MipsInstAlias<"divu $rd, $imm", (UDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm16:$imm), 0>, simm16:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def DSDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def DSDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"ddiv\t$rd, $rs, $rt">, "ddiv\t$rd, $rs, $rt">,
ISA_MIPS64_NOT_64R6; ISA_MIPS64_NOT_64R6;
def DSDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def DSDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm16:$imm), (ins GPR32Opnd:$rs, simm16:$imm),
"ddiv\t$rd, $rs, $imm">, "ddiv\t$rd, $rs, $imm">,
ISA_MIPS64_NOT_64R6; ISA_MIPS64_NOT_64R6;
def DUDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def DUDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"ddivu\t$rd, $rs, $rt">, "ddivu\t$rd, $rs, $rt">,
ISA_MIPS64_NOT_64R6; ISA_MIPS64_NOT_64R6;
def DUDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def DUDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm16:$imm), (ins GPR32Opnd:$rs, simm16:$imm),
"ddivu\t$rd, $rs, $imm">, "ddivu\t$rd, $rs, $imm">,
ISA_MIPS64_NOT_64R6; ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"ddiv $rt, $rs", (DSDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt, def : MipsInstAlias<"ddiv $rt, $rs", (DSDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>; GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"ddiv $rd, $imm", (DSDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd, def : MipsInstAlias<"ddiv $rd, $imm", (DSDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm16:$imm), 0>, ISA_MIPS64_NOT_64R6; simm16:$imm), 0>, ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"ddivu $rt, $rs", (DUDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt, def : MipsInstAlias<"ddivu $rt, $rs", (DUDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>; GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR32Opnd:$rd, def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR32Opnd:$rd,
GPR32Opnd:$rd, simm16:$imm), 0>, GPR32Opnd:$rd, simm16:$imm), 0>,
ISA_MIPS64_NOT_64R6; ISA_MIPS64_NOT_64R6;
def SRemMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"rem\t$rd, $rs, $rt">,
ISA_MIPS1_NOT_32R6_64R6;
def SRemIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm16:$imm),
"rem\t$rd, $rs, $imm">,
ISA_MIPS1_NOT_32R6_64R6;
def URemMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"remu\t$rd, $rs, $rt">,
ISA_MIPS1_NOT_32R6_64R6;
def URemIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm16:$imm),
"remu\t$rd, $rs, $imm">,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"rem $rt, $rs", (SRemMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"rem $rd, $imm", (SRemIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm16:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"remu $rt, $rs", (URemMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"remu $rd, $imm", (URemIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm16:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def DSRemMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"drem\t$rd, $rs, $rt">,
ISA_MIPS64_NOT_64R6;
def DSRemIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm16:$imm),
"drem\t$rd, $rs, $imm">,
ISA_MIPS64_NOT_64R6;
def DURemMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"dremu\t$rd, $rs, $rt">,
ISA_MIPS64_NOT_64R6;
def DURemIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm16:$imm),
"dremu\t$rd, $rs, $imm">,
ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"drem $rt, $rs", (DSRemMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"drem $rd, $imm", (DSRemIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm16:$imm), 0>, ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"dremu $rt, $rs", (DURemMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"dremu $rd, $imm", (DURemIMacro GPR32Opnd:$rd,
GPR32Opnd:$rd, simm16:$imm), 0>,
ISA_MIPS64_NOT_64R6;
def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulh\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulh\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
def Ulhu : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulhu : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulhu\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulhu\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
def Ulw : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulw : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulw\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulw\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
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test/MC/Mips/macro-drem.s

  • This file was added.
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
drem $4,$5
# CHECK-NOTRAP: bne $5, $zero, 8 # encoding: [0x02,0x00,0xa0,0x14]
# CHECK-NOTRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $5, $1, 20 # encoding: [0x05,0x00,0xa1,0x14]
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-NOTRAP: bne $4, $1, 8 # encoding: [0x02,0x00,0x81,0x14]
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,1
# CHECK-NOTRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,-1
# CHECK-NOTRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$6
# CHECK-NOTRAP: bne $6, $zero, 8 # encoding: [0x02,0x00,0xc0,0x14]
# CHECK-NOTRAP: ddiv $zero, $5, $6 # encoding: [0x1e,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $6, $1, 20 # encoding: [0x05,0x00,0xc1,0x14]
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-NOTRAP: bne $5, $1, 8 # encoding: [0x02,0x00,0xa1,0x14]
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $0,$5,$4
# CHECK-NOTRAP: ddiv $zero, $5, $4 # encoding: [0x1e,0x00,0xa4,0x00]
drem $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $0,$4,$5
# CHECK-NOTRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
drem $4,$5,1
# CHECK-NOTRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,$5,-1
# CHECK-NOTRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $5, $1, 12 # encoding: [0x03,0x00,0xa1,0x14]
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-TRAP: teq $4, $1, 6 # encoding: [0xb4,0x01,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,1
# CHECK-TRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,-1
# CHECK-TRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$6
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: ddiv $zero, $5, $6 # encoding: [0x1e,0x00,0xa6,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $6, $1, 12 # encoding: [0x03,0x00,0xc1,0x14]
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-TRAP: teq $5, $1, 6 # encoding: [0xb4,0x01,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,$0,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $0,$5,$4
# CHECK-TRAP: ddiv $zero, $5, $4 # encoding: [0x1e,0x00,0xa4,0x00]
drem $4,$5,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,$0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $0,$4,$5
# CHECK-TRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
drem $4,$5,1
# CHECK-TRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,$5,-1
# CHECK-TRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
drem $4,$5,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]

test/MC/Mips/macro-dremu.s

  • This file was added.
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
dremu $4,$5
# CHECK-NOTRAP: bne $5, $zero, 8 # encoding: [0x02,0x00,0xa0,0x14]
# CHECK-NOTRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$0
# CHECK-NOTRAP: bne $zero, $zero, 8 # encoding: [0x02,0x00,0x00,0x14]
# CHECK-NOTRAP: ddivu $zero, $4, $zero # encoding: [0x1f,0x00,0x80,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
dremu $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
dremu $4,1
# CHECK-NOTRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
dremu $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,$6
# CHECK-NOTRAP: bne $6, $zero, 8 # encoding: [0x02,0x00,0xc0,0x14]
# CHECK-NOTRAP: ddivu $zero, $5, $6 # encoding: [0x1f,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,$0
# CHECK-NOTRAP: bne $zero, $zero, 8 # encoding: [0x02,0x00,0x00,0x14]
# CHECK-NOTRAP: ddivu $zero, $5, $zero # encoding: [0x1f,0x00,0xa0,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$0,$0
# CHECK-NOTRAP: bne $zero, $zero, 8 # encoding: [0x02,0x00,0x00,0x14]
# CHECK-NOTRAP: ddivu $zero, $zero, $zero # encoding: [0x1f,0x00,0x00,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $0,$4,$5
# CHECK-NOTRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
dremu $0,$5,$4
# CHECK-NOTRAP: ddivu $zero, $5, $4 # encoding: [0x1f,0x00,0xa4,0x00]
dremu $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
dremu $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
dremu $4,$5,1
# CHECK-NOTRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
dremu $4,$5,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
# CHECK-TRAP: ddivu $zero, $4, $zero # encoding: [0x1f,0x00,0x80,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,1
# CHECK-TRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
dremu $4,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,-1
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,$6
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: ddivu $zero, $5, $6 # encoding: [0x1f,0x00,0xa6,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
# CHECK-TRAP: ddivu $zero, $5, $zero # encoding: [0x1f,0x00,0xa0,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$0,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
# CHECK-TRAP: ddivu $zero, $zero, $zero # encoding: [0x1f,0x00,0x00,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $0,$4,$5
# CHECK-TRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
dremu $0,$5,$4
# CHECK-TRAP: ddivu $zero, $5, $4 # encoding: [0x1f,0x00,0xa4,0x00]
dremu $4,$5,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,$0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,$5,1
# CHECK-TRAP: addu $4, $zero, $zero # encoding: [0x21,0x20,0x00,0x00]
dremu $4,$5,-1
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]

test/MC/Mips/macro-rem.s

  • This file was added.
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
rem $4,$5
# CHECK-NOTRAP: bnez $5, 8 # encoding: [0x02,0x00,0xa0,0x14]
# CHECK-NOTRAP: div $zero, $4, $5 # encoding: [0x1a,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $5, $1, 16 # encoding: [0x04,0x00,0xa1,0x14]
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NOTRAP: bne $4, $1, 8 # encoding: [0x02,0x00,0x81,0x14]
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
rem $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
rem $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
rem $4,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,-1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,$6
# CHECK-NOTRAP: bnez $6, 8 # encoding: [0x02,0x00,0xc0,0x14]
# CHECK-NOTRAP: div $zero, $5, $6 # encoding: [0x1a,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $6, $1, 16 # encoding: [0x04,0x00,0xc1,0x14]
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NOTRAP: bne $5, $1, 8 # encoding: [0x02,0x00,0xa1,0x14]
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
rem $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
rem $0,$5,$4
# CHECK-NOTRAP: div $zero, $5, $4 # encoding: [0x1a,0x00,0xa4,0x00]
rem $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
rem $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
rem $4,$5,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,$5,-1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: div $zero, $4, $5 # encoding: [0x1a,0x00,0x85,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $5, $1, 8 # encoding: [0x02,0x00,0xa1,0x14]
# CHECK-TRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-TRAP: teq $4, $1, 6 # encoding: [0xb4,0x01,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,1
# CHECK-TRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,-1
# CHECK-TRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,$6
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: div $zero, $5, $6 # encoding: [0x1a,0x00,0xa6,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $6, $1, 8 # encoding: [0x02,0x00,0xc1,0x14]
# CHECK-TRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-TRAP: teq $5, $1, 6 # encoding: [0xb4,0x01,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,$0,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $0,$5,$4
# CHECK-TRAP: div $zero, $5, $4 # encoding: [0x1a,0x00,0xa4,0x00]
rem $4,$5,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,$0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,$5,1
# CHECK-TRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,$5,-1
# CHECK-TRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
rem $4,$5,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]

test/MC/Mips/macro-remu.s

  • This file was added.
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
remu $4,$5
# CHECK-NOTRAP: bnez $5, 8 # encoding: [0x02,0x00,0xa0,0x14]
# CHECK-NOTRAP: divu $zero, $4, $5 # encoding: [0x1b,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$0
# CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x02,0x00,0x00,0x14]
# CHECK-NOTRAP: divu $zero, $4, $zero # encoding: [0x1b,0x00,0x80,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
remu $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
remu $4,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
remu $4,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,$6
# CHECK-NOTRAP: bnez $6, 8 # encoding: [0x02,0x00,0xc0,0x14]
# CHECK-NOTRAP: divu $zero, $5, $6 # encoding: [0x1b,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,$0
# CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x02,0x00,0x00,0x14]
# CHECK-NOTRAP: divu $zero, $5, $zero # encoding: [0x1b,0x00,0xa0,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$0,$0
# CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x02,0x00,0x00,0x14]
# CHECK-NOTRAP: divu $zero, $zero, $zero # encoding: [0x1b,0x00,0x00,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $0,$5,$4
# CHECK-NOTRAP: divu $zero, $5, $4 # encoding: [0x1b,0x00,0xa4,0x00]
remu $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
remu $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
remu $4,$5,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
remu $4,$5,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: divu $zero, $4, $5 # encoding: [0x1b,0x00,0x85,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
# CHECK-TRAP: divu $zero, $4, $zero # encoding: [0x1b,0x00,0x80,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,1
# CHECK-TRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
remu $4,-1
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,$6
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: divu $zero, $5, $6 # encoding: [0x1b,0x00,0xa6,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
# CHECK-TRAP: divu $zero, $5, $zero # encoding: [0x1b,0x00,0xa0,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$0,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
# CHECK-TRAP: divu $zero, $zero, $zero # encoding: [0x1b,0x00,0x00,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $0,$5,$4
# CHECK-TRAP: divu $zero, $5, $4 # encoding: [0x1b,0x00,0xa4,0x00]
remu $4,$5,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,$0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,$5,1
# CHECK-TRAP: move $4, $zero # encoding: [0x21,0x20,0x00,0x00]
remu $4,$5,-1
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]