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Differential D17036

[mips] Addition of the [d]rem and [d]remu instructions
ClosedPublic

Authored by smaksimovic on Feb 9 2016, 11:41 AM.

Details

Reviewers
dsanders
vkalintiris
slthakur
zoran.jovanovic
obucina
sdardis
abeserminji
atanasyan
Commits
rG0a23998fe75d: [mips] Addition of the [d]rem and [d]remu instructions
rL336545: [mips] Addition of the [d]rem and [d]remu instructions
Summary

Related to http://reviews.llvm.org/D15772

Depends on http://reviews.llvm.org/D16889

Adds [D]REM[U] instructions.

Patch By: Srdjan Obucina

Contributions from: Simon Dardis

Diff Detail

Repository
rL LLVM

Event Timeline

obucina updated this revision to Diff 47345.Feb 9 2016, 11:41 AM
obucina retitled this revision from to [mips] Addition of the [d]rem and [d]remu instructions.
obucina updated this object.
obucina added reviewers: dsanders, zoran.jovanovic.
obucina added a subscriber: llvm-commits.
Herald added a reviewer: vkalintiris. · View Herald TranscriptFeb 9 2016, 11:41 AM
Herald added a subscriber: dsanders. · View Herald Transcript
obucina updated this revision to Diff 49174.Feb 26 2016, 4:49 AM
obucina edited edge metadata.

Patch reduced to contain only changes for adding REM macro.

obucina added a comment.Mar 15 2016, 9:03 AM

Ping, dependant on D16888 and 16889

sdardis commandeered this revision.Feb 8 2017, 6:05 AM
sdardis added a reviewer: obucina.
sdardis added a subscriber: sdardis.

Taking over this patch to repost.

sdardis updated this revision to Diff 88422.Feb 14 2017, 1:20 PM
sdardis edited the summary of this revision. (Show Details)
sdardis added a reviewer: slthakur.

Updated to trunk.

smaksimovic commandeered this revision.Jun 15 2018, 8:16 AM
smaksimovic added a reviewer: sdardis.
smaksimovic added reviewers: abeserminji, atanasyan.
Herald added a subscriber: arichardson. · View Herald TranscriptJun 15 2018, 8:16 AM
abeserminji added a comment.Jul 4 2018, 7:51 AM

LGTM

abeserminji accepted this revision.Jul 9 2018, 3:21 AM
This revision is now accepted and ready to land.Jul 9 2018, 3:21 AM
Closed by commit rL336545: [mips] Addition of the [d]rem and [d]remu instructions (authored by smaksimovic). · Explain WhyJul 9 2018, 6:11 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
Mips/
AsmParser/
79 lines
32 lines
30 lines
test/
MC/
Mips/
6 lines
244 lines
136 lines
187 lines
167 lines

Diff 154588

llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 251 Lines • ▼ Show 20 Lines bool expandAliasImmediate(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI); const MCSubtargetInfo *STI);
bool expandBranchImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, bool expandBranchImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI); const MCSubtargetInfo *STI);
bool expandCondBranches(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, bool expandCondBranches(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI); const MCSubtargetInfo *STI);
bool expandDiv(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, bool expandDivRem(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI, const bool IsMips64, const MCSubtargetInfo *STI, const bool IsMips64,
const bool Signed); const bool Signed);
bool expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, SMLoc IDLoc, bool expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, SMLoc IDLoc,
MCStreamer &Out, const MCSubtargetInfo *STI); MCStreamer &Out, const MCSubtargetInfo *STI);
bool expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, MCStreamer &Out, bool expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI); const MCSubtargetInfo *STI);
bool expandUsh(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, bool expandUsh(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
▲ Show 20 Lines • Show All 2,155 Lines • ▼ Show 20 LinesMipsAsmParser::tryExpandInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
case Mips::BGTLImmMacro: case Mips::BGTLImmMacro:
case Mips::BLTULImmMacro: case Mips::BLTULImmMacro:
case Mips::BLEULImmMacro: case Mips::BLEULImmMacro:
case Mips::BGEULImmMacro: case Mips::BGEULImmMacro:
case Mips::BGTULImmMacro: case Mips::BGTULImmMacro:
return expandCondBranches(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success; return expandCondBranches(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success;
case Mips::SDivMacro: case Mips::SDivMacro:
case Mips::SDivIMacro: case Mips::SDivIMacro:
return expandDiv(Inst, IDLoc, Out, STI, false, true) ? MER_Fail case Mips::SRemMacro:
case Mips::SRemIMacro:
return expandDivRem(Inst, IDLoc, Out, STI, false, true) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::DSDivMacro: case Mips::DSDivMacro:
case Mips::DSDivIMacro: case Mips::DSDivIMacro:
return expandDiv(Inst, IDLoc, Out, STI, true, true) ? MER_Fail case Mips::DSRemMacro:
case Mips::DSRemIMacro:
return expandDivRem(Inst, IDLoc, Out, STI, true, true) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::UDivMacro: case Mips::UDivMacro:
case Mips::UDivIMacro: case Mips::UDivIMacro:
return expandDiv(Inst, IDLoc, Out, STI, false, false) ? MER_Fail case Mips::URemMacro:
case Mips::URemIMacro:
return expandDivRem(Inst, IDLoc, Out, STI, false, false) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::DUDivMacro: case Mips::DUDivMacro:
case Mips::DUDivIMacro: case Mips::DUDivIMacro:
return expandDiv(Inst, IDLoc, Out, STI, true, false) ? MER_Fail case Mips::DURemMacro:
case Mips::DURemIMacro:
return expandDivRem(Inst, IDLoc, Out, STI, true, false) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::PseudoTRUNC_W_S: case Mips::PseudoTRUNC_W_S:
return expandTrunc(Inst, false, false, IDLoc, Out, STI) ? MER_Fail return expandTrunc(Inst, false, false, IDLoc, Out, STI) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::PseudoTRUNC_W_D32: case Mips::PseudoTRUNC_W_D32:
return expandTrunc(Inst, true, false, IDLoc, Out, STI) ? MER_Fail return expandTrunc(Inst, true, false, IDLoc, Out, STI) ? MER_Fail
: MER_Success; : MER_Success;
case Mips::PseudoTRUNC_W_D: case Mips::PseudoTRUNC_W_D:
return expandTrunc(Inst, true, true, IDLoc, Out, STI) ? MER_Fail return expandTrunc(Inst, true, true, IDLoc, Out, STI) ? MER_Fail
▲ Show 20 Lines • Show All 1,466 Lines • ▼ Show 20 Lines
// Expand a integer division macro. // Expand a integer division macro.
// //
// Notably we don't have to emit a warning when encountering $rt as the $zero // Notably we don't have to emit a warning when encountering $rt as the $zero
// register, or 0 as an immediate. processInstruction() has already done that. // register, or 0 as an immediate. processInstruction() has already done that.
// //
// The destination register can only be $zero when expanding (S)DivIMacro or // The destination register can only be $zero when expanding (S)DivIMacro or
// D(S)DivMacro. // D(S)DivMacro.
bool MipsAsmParser::expandDiv(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, bool MipsAsmParser::expandDivRem(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI, const bool IsMips64, const MCSubtargetInfo *STI, const bool IsMips64,
const bool Signed) { const bool Signed) {
MipsTargetStreamer &TOut = getTargetStreamer(); MipsTargetStreamer &TOut = getTargetStreamer();
warnIfNoMacro(IDLoc); warnIfNoMacro(IDLoc);
const MCOperand &RdRegOp = Inst.getOperand(0); const MCOperand &RdRegOp = Inst.getOperand(0);
assert(RdRegOp.isReg() && "expected register operand kind"); assert(RdRegOp.isReg() && "expected register operand kind");
unsigned RdReg = RdRegOp.getReg(); unsigned RdReg = RdRegOp.getReg();
Show All 23 Linesbool MipsAsmParser::expandDivRem(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
} else { } else {
DivOp = Signed ? Mips::SDIV : Mips::UDIV; DivOp = Signed ? Mips::SDIV : Mips::UDIV;
ZeroReg = Mips::ZERO; ZeroReg = Mips::ZERO;
SubOp = Mips::SUB; SubOp = Mips::SUB;
} }
bool UseTraps = useTraps(); bool UseTraps = useTraps();
unsigned Opcode = Inst.getOpcode();
bool isDiv = Opcode == Mips::SDivMacro || Opcode == Mips::SDivIMacro ||
Opcode == Mips::UDivMacro || Opcode == Mips::UDivIMacro ||
Opcode == Mips::DSDivMacro || Opcode == Mips::DSDivIMacro ||
Opcode == Mips::DUDivMacro || Opcode == Mips::DUDivIMacro;
bool isRem = Opcode == Mips::SRemMacro || Opcode == Mips::SRemIMacro ||
Opcode == Mips::URemMacro || Opcode == Mips::URemIMacro ||
Opcode == Mips::DSRemMacro || Opcode == Mips::DSRemIMacro ||
Opcode == Mips::DURemMacro || Opcode == Mips::DURemIMacro;
if (RtOp.isImm()) { if (RtOp.isImm()) {
unsigned ATReg = getATReg(IDLoc); unsigned ATReg = getATReg(IDLoc);
if (!ATReg) if (!ATReg)
return true; return true;
if (ImmValue == 0) { if (ImmValue == 0) {
if (UseTraps) if (UseTraps)
TOut.emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, STI); TOut.emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, STI);
else else
TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI);
return false; return false;
} }
if (ImmValue == 1) { if (isRem && (ImmValue == 1 || (Signed && (ImmValue == -1)))) {
TOut.emitRRR(Mips::OR, RdReg, ZeroReg, ZeroReg, IDLoc, STI);
return false;
} else if (isDiv && ImmValue == 1) {
TOut.emitRRR(Mips::OR, RdReg, RsReg, Mips::ZERO, IDLoc, STI); TOut.emitRRR(Mips::OR, RdReg, RsReg, Mips::ZERO, IDLoc, STI);
return false; return false;
} else if (Signed && ImmValue == -1) { } else if (isDiv && Signed && ImmValue == -1) {
TOut.emitRRR(SubOp, RdReg, ZeroReg, RsReg, IDLoc, STI); TOut.emitRRR(SubOp, RdReg, ZeroReg, RsReg, IDLoc, STI);
return false; return false;
} else { } else {
if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, isInt<32>(ImmValue), if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, isInt<32>(ImmValue),
false, Inst.getLoc(), Out, STI)) false, Inst.getLoc(), Out, STI))
return true; return true;
TOut.emitRR(DivOp, RsReg, ATReg, IDLoc, STI); TOut.emitRR(DivOp, RsReg, ATReg, IDLoc, STI);
TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI);
return false; return false;
} }
return true; return true;
} }
// If the macro expansion of (d)div(u) would always trap or break, insert // If the macro expansion of (d)div(u) or (d)rem(u) would always trap or
// the trap/break and exit. This gives a different result to GAS. GAS has // break, insert the trap/break and exit. This gives a different result to
// an inconsistency/missed optimization in that not all cases are handled // GAS. GAS has an inconsistency/missed optimization in that not all cases
// equivalently. As the observed behaviour is the same, we're ok. // are handled equivalently. As the observed behaviour is the same, we're ok.
if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) { if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) {
if (UseTraps) { if (UseTraps) {
TOut.emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, STI); TOut.emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, STI);
return false; return false;
} }
TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI);
return false; return false;
} }
// (d)rem(u) $0, $X, $Y is a special case. Like div $zero, $X, $Y, it does
// not expand to macro sequence.
if (isRem && (RdReg == Mips::ZERO || RdReg == Mips::ZERO_64)) {
TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI);
return false;
}
// Temporary label for first branch traget // Temporary label for first branch traget
MCContext &Context = TOut.getStreamer().getContext(); MCContext &Context = TOut.getStreamer().getContext();
MCSymbol *BrTarget; MCSymbol *BrTarget;
MCOperand LabelOp; MCOperand LabelOp;
if (UseTraps) { if (UseTraps) {
TOut.emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, STI); TOut.emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, STI);
} else { } else {
// Branch to the li instruction. // Branch to the li instruction.
BrTarget = Context.createTempSymbol(); BrTarget = Context.createTempSymbol();
LabelOp = MCOperand::createExpr(MCSymbolRefExpr::create(BrTarget, Context)); LabelOp = MCOperand::createExpr(MCSymbolRefExpr::create(BrTarget, Context));
TOut.emitRRX(Mips::BNE, RtReg, ZeroReg, LabelOp, IDLoc, STI); TOut.emitRRX(Mips::BNE, RtReg, ZeroReg, LabelOp, IDLoc, STI);
} }
TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI); TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI);
if (!UseTraps) if (!UseTraps)
TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI);
if (!Signed) { if (!Signed) {
if (!UseTraps) if (!UseTraps)
TOut.getStreamer().EmitLabel(BrTarget); TOut.getStreamer().EmitLabel(BrTarget);
TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI);
return false; return false;
} }
unsigned ATReg = getATReg(IDLoc); unsigned ATReg = getATReg(IDLoc);
if (!ATReg) if (!ATReg)
return true; return true;
if (!UseTraps) if (!UseTraps)
TOut.getStreamer().EmitLabel(BrTarget); TOut.getStreamer().EmitLabel(BrTarget);
TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, STI); TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, STI);
// Temporary label for the second branch target. // Temporary label for the second branch target.
MCSymbol *BrTargetEnd = Context.createTempSymbol(); MCSymbol *BrTargetEnd = Context.createTempSymbol();
MCOperand LabelOpEnd = MCOperand LabelOpEnd =
MCOperand::createExpr(MCSymbolRefExpr::create(BrTargetEnd, Context)); MCOperand::createExpr(MCSymbolRefExpr::create(BrTargetEnd, Context));
// Branch to the mflo instruction. // Branch to the mflo instruction.
TOut.emitRRX(Mips::BNE, RtReg, ATReg, LabelOpEnd, IDLoc, STI); TOut.emitRRX(Mips::BNE, RtReg, ATReg, LabelOpEnd, IDLoc, STI);
if (IsMips64) { if (IsMips64) {
TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, STI); TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, STI);
TOut.emitRRI(Mips::DSLL32, ATReg, ATReg, 0x1f, IDLoc, STI); TOut.emitDSLL(ATReg, ATReg, 63, IDLoc, STI);
} else { } else {
TOut.emitRI(Mips::LUi, ATReg, (uint16_t)0x8000, IDLoc, STI); TOut.emitRI(Mips::LUi, ATReg, (uint16_t)0x8000, IDLoc, STI);
} }
if (UseTraps) if (UseTraps)
TOut.emitRRI(Mips::TEQ, RsReg, ATReg, 0x6, IDLoc, STI); TOut.emitRRI(Mips::TEQ, RsReg, ATReg, 0x6, IDLoc, STI);
else { else {
// Branch to the mflo instruction. // Branch to the mflo instruction.
TOut.emitRRX(Mips::BNE, RsReg, ATReg, LabelOpEnd, IDLoc, STI); TOut.emitRRX(Mips::BNE, RsReg, ATReg, LabelOpEnd, IDLoc, STI);
TOut.emitRRI(Mips::SLL, ZeroReg, ZeroReg, 0, IDLoc, STI); TOut.emitNop(IDLoc, STI);
TOut.emitII(Mips::BREAK, 0x6, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x6, 0, IDLoc, STI);
} }
TOut.getStreamer().EmitLabel(BrTargetEnd); TOut.getStreamer().EmitLabel(BrTargetEnd);
TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); TOut.emitR(isDiv ? Mips::MFLO : Mips::MFHI, RdReg, IDLoc, STI);
return false; return false;
} }
bool MipsAsmParser::expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, bool MipsAsmParser::expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU,
SMLoc IDLoc, MCStreamer &Out, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI) { const MCSubtargetInfo *STI) {
MipsTargetStreamer &TOut = getTargetStreamer(); MipsTargetStreamer &TOut = getTargetStreamer();
▲ Show 20 Lines • Show All 4,217 Lines • Show Last 20 Lines

llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td

Show First 20 Lines • Show All 1,026 Lines • ▼ Show 20 Lineslet AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"ddivu $rt, $rs", (DUDivMacro GPR64Opnd:$rt, def : MipsInstAlias<"ddivu $rt, $rs", (DUDivMacro GPR64Opnd:$rt,
GPR64Opnd:$rt, GPR64Opnd:$rt,
GPR64Opnd:$rs), 0>, GPR64Opnd:$rs), 0>,
ISA_MIPS3_NOT_32R6_64R6; ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR64Opnd:$rd, def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR64Opnd:$rd,
GPR64Opnd:$rd, GPR64Opnd:$rd,
imm64:$imm), 0>, imm64:$imm), 0>,
ISA_MIPS3_NOT_32R6_64R6; ISA_MIPS3_NOT_32R6_64R6;
def DSRemMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, GPR64Opnd:$rt),
"drem\t$rd, $rs, $rt">,
ISA_MIPS3_NOT_32R6_64R6;
def DSRemIMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, simm32_relaxed:$imm),
"drem\t$rd, $rs, $imm">,
ISA_MIPS3_NOT_32R6_64R6;
def DURemMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, GPR64Opnd:$rt),
"dremu\t$rd, $rs, $rt">,
ISA_MIPS3_NOT_32R6_64R6;
def DURemIMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, simm32_relaxed:$imm),
"dremu\t$rd, $rs, $imm">,
ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"drem $rt, $rs", (DSRemMacro GPR64Opnd:$rt,
GPR64Opnd:$rt,
GPR64Opnd:$rs), 0>,
ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"drem $rd, $imm", (DSRemIMacro GPR64Opnd:$rd,
GPR64Opnd:$rd,
simm32_relaxed:$imm), 0>,
ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"dremu $rt, $rs", (DURemMacro GPR64Opnd:$rt,
GPR64Opnd:$rt,
GPR64Opnd:$rs), 0>,
ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"dremu $rd, $imm", (DURemIMacro GPR64Opnd:$rd,
GPR64Opnd:$rd,
simm32_relaxed:$imm), 0>,
ISA_MIPS3_NOT_32R6_64R6;
} }
def NORImm64 : NORIMM_DESC_BASE<GPR64Opnd, imm64>, GPR_64; def NORImm64 : NORIMM_DESC_BASE<GPR64Opnd, imm64>, GPR_64;
def : MipsInstAlias<"nor\t$rs, $imm", (NORImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, def : MipsInstAlias<"nor\t$rs, $imm", (NORImm64 GPR64Opnd:$rs, GPR64Opnd:$rs,
imm64:$imm)>, GPR_64; imm64:$imm)>, GPR_64;
def SLTImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs), def SLTImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs),
(ins GPR64Opnd:$rt, imm64:$imm), (ins GPR64Opnd:$rt, imm64:$imm),
"slt\t$rs, $rt, $imm">, GPR_64; "slt\t$rs, $rt, $imm">, GPR_64;
def : MipsInstAlias<"slt\t$rs, $imm", (SLTImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, def : MipsInstAlias<"slt\t$rs, $imm", (SLTImm64 GPR64Opnd:$rs, GPR64Opnd:$rs,
imm64:$imm)>, GPR_64; imm64:$imm)>, GPR_64;
def SLTUImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs), def SLTUImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs),
(ins GPR64Opnd:$rt, imm64:$imm), (ins GPR64Opnd:$rt, imm64:$imm),
"sltu\t$rs, $rt, $imm">, GPR_64; "sltu\t$rs, $rt, $imm">, GPR_64;
def : MipsInstAlias<"sltu\t$rs, $imm", (SLTUImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, def : MipsInstAlias<"sltu\t$rs, $imm", (SLTUImm64 GPR64Opnd:$rs, GPR64Opnd:$rs,
imm64:$imm)>, GPR_64; imm64:$imm)>, GPR_64;

llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

Show First 20 Lines • Show All 2,944 Lines • ▼ Show 20 Linesdef : MipsInstAlias<"divu $rt, $rs", (UDivMacro GPR32NonZeroOpnd:$rt,
GPR32NonZeroOpnd:$rt, GPR32NonZeroOpnd:$rt,
GPR32Opnd:$rs), 0>, GPR32Opnd:$rs), 0>,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"divu $rd, $imm", (UDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd, def : MipsInstAlias<"divu $rd, $imm", (UDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm32:$imm), 0>, simm32:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def SRemMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"rem\t$rd, $rs, $rt">,
ISA_MIPS1_NOT_32R6_64R6;
def SRemIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm32_relaxed:$imm),
"rem\t$rd, $rs, $imm">,
ISA_MIPS1_NOT_32R6_64R6;
def URemMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"remu\t$rd, $rs, $rt">,
ISA_MIPS1_NOT_32R6_64R6;
def URemIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm32_relaxed:$imm),
"remu\t$rd, $rs, $imm">,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"rem $rt, $rs", (SRemMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"rem $rd, $imm", (SRemIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm32_relaxed:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"remu $rt, $rs", (URemMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"remu $rd, $imm", (URemIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm32_relaxed:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulh\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulh\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
def Ulhu : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulhu : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulhu\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulhu\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
def Ulw : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulw : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulw\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulw\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
▲ Show 20 Lines • Show All 314 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/macro-ddiv.s

Show All 10 Lines
# CHECK-NOTRAP: .Ltmp0 # CHECK-NOTRAP: .Ltmp0
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $11, $1, .Ltmp1 # encoding: [0x15,0x61,A,A] # CHECK-NOTRAP: bne $11, $1, .Ltmp1 # encoding: [0x15,0x61,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16 # CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-NOTRAP: bne $25, $1, .Ltmp1 # encoding: [0x17,0x21,A,A] # CHECK-NOTRAP: bne $25, $1, .Ltmp1 # encoding: [0x17,0x21,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16 # CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp1 # CHECK-NOTRAP: .Ltmp1
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
# CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
# CHECK-TRAP: ddiv $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1e]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $11, $1, .Ltmp0 # encoding: [0x15,0x61,A,A] # CHECK-TRAP: bne $11, $1, .Ltmp0 # encoding: [0x15,0x61,A,A]
Show All 12 Lines
# CHECK-NOTRAP: .Ltmp2: # CHECK-NOTRAP: .Ltmp2:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $12, $1, .Ltmp3 # encoding: [0x15,0x81,A,A] # CHECK-NOTRAP: bne $12, $1, .Ltmp3 # encoding: [0x15,0x81,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16 # CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-NOTRAP: bne $24, $1, .Ltmp3 # encoding: [0x17,0x01,A,A] # CHECK-NOTRAP: bne $24, $1, .Ltmp3 # encoding: [0x17,0x01,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16 # CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp3 # CHECK-NOTRAP: .Ltmp3
# CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
# CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
# CHECK-TRAP: ddiv $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1e]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $12, $1, .Ltmp1 # encoding: [0x15,0x81,A,A] # CHECK-TRAP: bne $12, $1, .Ltmp1 # encoding: [0x15,0x81,A,A]
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# CHECK-NOTRAP: .Ltmp6: # CHECK-NOTRAP: .Ltmp6:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $6, $1, .Ltmp7 # encoding: [0x14,0xc1,A,A] # CHECK-NOTRAP: bne $6, $1, .Ltmp7 # encoding: [0x14,0xc1,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp7-4, kind: fixup_Mips_PC16 # CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp7-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-NOTRAP: bne $5, $1, .Ltmp7 # encoding: [0x14,0xa1,A,A] # CHECK-NOTRAP: bne $5, $1, .Ltmp7 # encoding: [0x14,0xa1,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp7-4, kind: fixup_Mips_PC16 # CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp7-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp7: # CHECK-NOTRAP: .Ltmp7:
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
# CHECK-TRAP: ddiv $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1e]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $6, $1, .Ltmp3 # encoding: [0x14,0xc1,A,A] # CHECK-TRAP: bne $6, $1, .Ltmp3 # encoding: [0x14,0xc1,A,A]
▲ Show 20 Lines • Show All 132 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/macro-drem.s

# RUN: llvm-mc %s -triple=mips64el-unknown-linux -show-encoding -mcpu=mips64 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mips64el-unknown-linux -show-encoding -mcpu=mips64 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
drem $4,$5
# CHECK-NOTRAP: bne $5, $zero, .Ltmp0 # encoding: [A,A,0xa0,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp0-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: .Ltmp0
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $5, $1, .Ltmp1 # encoding: [A,A,0xa1,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-NOTRAP: bne $4, $1, .Ltmp1 # encoding: [A,A,0x81,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: .Ltmp1
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,1
# CHECK-NOTRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,-1
# CHECK-NOTRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$6
# CHECK-NOTRAP: bne $6, $zero, .Ltmp2 # encoding: [A,A,0xc0,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp2-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddiv $zero, $5, $6 # encoding: [0x1e,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: .Ltmp2:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $6, $1, .Ltmp3 # encoding: [A,A,0xc1,0x14]
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-NOTRAP: bne $5, $1, .Ltmp3 # encoding: [A,A,0xa1,0x14]
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: .Ltmp3:
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $0,$5,$4
# CHECK-NOTRAP: ddiv $zero, $5, $4 # encoding: [0x1e,0x00,0xa4,0x00]
drem $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
drem $0,$4,$5
# CHECK-NOTRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
drem $4,$5,1
# CHECK-NOTRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,$5,-1
# CHECK-NOTRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $5, $1, .Ltmp2 # encoding: [A,A,0xa1,0x14]
# CHECK-TRAP: # fixup A - offset: 0, value: .Ltmp2-4, kind: fixup_Mips_PC16
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-TRAP: teq $4, $1, 6 # encoding: [0xb4,0x01,0x81,0x00]
# CHECK-TRAP: .Ltmp2
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,1
# CHECK-TRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,-1
# CHECK-TRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x1e,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$6
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: ddiv $zero, $5, $6 # encoding: [0x1e,0x00,0xa6,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $6, $1, .Ltmp3 # encoding: [A,A,0xc1,0x14]
# CHECK-TRAP; # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
# CHECK-TRAP: teq $5, $1, 6 # encoding: [0xb4,0x01,0xa1,0x00]
# CHECK-TRAP: .Ltmp3
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,$0,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $0,$5,$4
# CHECK-TRAP: ddiv $zero, $5, $4 # encoding: [0x1e,0x00,0xa4,0x00]
drem $4,$5,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $4,$0,0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
drem $0,$4,$5
# CHECK-TRAP: ddiv $zero, $4, $5 # encoding: [0x1e,0x00,0x85,0x00]
drem $4,$5,1
# CHECK-TRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,$5,-1
# CHECK-TRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
drem $4,$5,2
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x10000
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x1a5a5
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,0x8000
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
drem $4,$5,-0x8000
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x1e,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]

llvm/trunk/test/MC/Mips/macro-dremu.s

# RUN: llvm-mc %s -triple=mips64el-unknown-linux -show-encoding -mcpu=mips64 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mips64el-unknown-linux -show-encoding -mcpu=mips64 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
dremu $4,$5
# CHECK-NOTRAP: bne $5, $zero, .Ltmp0 # encoding: [A,A,0xa0,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp0-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: .Ltmp0
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,1
# CHECK-NOTRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
dremu $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x1f,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,$6
# CHECK-NOTRAP: bne $6, $zero, .Ltmp1 # encoding: [A,A,0xc0,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddivu $zero, $5, $6 # encoding: [0x1f,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: .Ltmp1
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: ddivu $zero, $5, $6 # encoding: [0x1f,0x00,0xa6,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $0,$4,$5
# CHECK-NOTRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
# CHECK-TRAP: ddivu $zero, $4, $5 # encoding: [0x1f,0x00,0x85,0x00]
dremu $0,$5,$4
# CHECK-NOTRAP: ddivu $zero, $5, $4 # encoding: [0x1f,0x00,0xa4,0x00]
# CHECK-TRAP: ddivu $zero, $5, $4 # encoding: [0x1f,0x00,0xa4,0x00]
dremu $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
dremu $4,$5,1
# CHECK-NOTRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: or $4, $zero, $zero # encoding: [0x25,0x20,0x00,0x00]
dremu $4,$5,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
dremu $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x1f,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]

llvm/trunk/test/MC/Mips/macro-rem.s

# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
rem $4,$5
# CHECK-NOTRAP: bnez $5, $tmp0 # encoding: [A,A,0xa0,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp0)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: div $zero, $4, $5 # encoding: [0x1a,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: $tmp0
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $5, $1, $tmp1 # encoding: [A,A,0xa1,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp1)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NOTRAP: bne $4, $1, $tmp1 # encoding: [A,A,0x81,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp1)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: $tmp1
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: div $zero, $4, $5 # encoding: [0x1a,0x00,0x85,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $5, $1, $tmp0 # encoding: [A,A,0xa1,0x14]
# CHECK-TRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-TRAP: teq $4, $1, 6 # encoding: [0xb4,0x01,0x81,0x00]
# CHECK-TRAP: $tmp0
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
rem $4,-1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
rem $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x1a,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,$6
# CHECK-NOTRAP: bnez $6, $tmp2 # encoding: [A,A,0xc0,0x14]
# CHECK-NOTRAP: div $zero, $5, $6 # encoding: [0x1a,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECk-NOTRAP: $tmp2
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $6, $1, $tmp3 # encoding: [A,A,0xc1,0x14]
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NOTRAP: bne $5, $1, $tmp3 # encoding: [A,A,0xa1,0x14]
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x0d,0x00,0x06,0x00]
# CHECK-NOTRAP: $tmp3
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: div $zero, $5, $6 # encoding: [0x1a,0x00,0xa6,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: bne $6, $1, $tmp1 # encoding: [A,A,0xc1,0x14]
# CHECK-TRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-TRAP: teq $5, $1, 6 # encoding: [0xb4,0x01,0xa1,0x00]
# CHECK-TRAP: $tmp1
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $0,$5,$4
# CHECK-NOTRAP: div $zero, $5, $4 # encoding: [0x1a,0x00,0xa4,0x00]
# CHECK-TRAP: div $zero, $5, $4 # encoding: [0x1a,0x00,0xa4,0x00]
rem $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
rem $4,$5,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
rem $4,$5,-1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
rem $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
rem $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x1a,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]

llvm/trunk/test/MC/Mips/macro-remu.s

# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
remu $4,$5
# CHECK-NOTRAP: bnez $5, $tmp0 # encoding: [A,A,0xa0,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp0)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: divu $zero, $4, $5 # encoding: [0x1b,0x00,0x85,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00]
# CHECK-TRAP: divu $zero, $4, $5 # encoding: [0x1b,0x00,0x85,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
remu $4,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,$6
# CHECK-NOTRAP: bnez $6, $tmp1 # encoding: [A,A,0xc0,0x14]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp1)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: divu $zero, $5, $6 # encoding: [0x1b,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-NOTRAP: $tmp1
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00]
# CHECK-TRAP: divu $zero, $5, $6 # encoding: [0x1b,0x00,0xa6,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $0,$5,$4
# CHECK-NOTRAP: divu $zero, $5, $4 # encoding: [0x1b,0x00,0xa4,0x00]
# CHECK-TRAP: divu $zero, $5, $4 # encoding: [0x1b,0x00,0xa4,0x00]
remu $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
remu $4,$5,1
# CHECK-NOTRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
# CHECK-TRAP: move $4, $zero # encoding: [0x25,0x20,0x00,0x00]
remu $4,$5,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
remu $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NOTRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
# CHECK-TRAP: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-TRAP: divu $zero, $5, $1 # encoding: [0x1b,0x00,0xa1,0x00]
# CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]