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Differential D158602

[AMDGPU] Don't wait for counters in chain function prologues
AbandonedPublic

Authored by rovka on Aug 23 2023, 5:29 AM.

Details

Reviewers
arsenm
Group Reviewers
Restricted Project
Summary

All counters (lgkmcnt, vmcnt, storecnt, etc.) are presumed in an unknown
state at function entry, so we needn't insert waits for them in the
prologue.

Diff Detail

Event Timeline

rovka created this revision.Aug 23 2023, 5:29 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 23 2023, 5:29 AM
Herald added subscribers: foad, kerbowa, hiraditya and 6 others. · View Herald Transcript
rovka requested review of this revision.Aug 23 2023, 5:29 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 23 2023, 5:29 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
Harbormaster completed remote builds in B254315: Diff 552675.Aug 23 2023, 5:30 AM
rovka added a parent revision: D156413: [AMDGPU][PEI] Set up SP for chain functions.Aug 23 2023, 5:30 AM
rovka added a reviewer: Restricted Project.
rovka added a child revision: D158604: [AMDGPU] Add llvm.amdgcn.set.inactive.chain.arg intrinsic.Aug 23 2023, 5:42 AM
arsenm accepted this revision.Aug 23 2023, 4:56 PM
This revision is now accepted and ready to land.Aug 23 2023, 4:56 PM
rovka updated this revision to Diff 554614.Aug 30 2023, 1:04 AM

Rebase

Harbormaster completed remote builds in B255720: Diff 554614.Aug 30 2023, 3:34 AM
ruiling added a subscriber: ruiling.Sep 21 2023, 8:41 AM

I don't quite understand the change, now that the counters are in unknown state, shouldn't we wait for their arrival so that we can access the registers for the arguments (which may be loaded from memory in the caller)? I think we definitely need these waits at the entry of cs_chain* function.

foad added a comment.Sep 21 2023, 10:00 AM

now that the counters are in unknown state, shouldn't we wait for their arrival so that we can access the registers for the arguments (which may be loaded from memory in the caller)?

Agreed. The patch description does not make sense to me.

rovka abandoned this revision.Sep 22 2023, 12:24 AM

Sorry, I think I misunderstood the docs.

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
2 lines
test/
CodeGen/
AMDGPU/
38 lines
34 lines

Diff 554614

llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

Show First 20 Lines • Show All 1,841 Lines • ▼ Show 20 Linesbool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
Encoding.VGPRL = Encoding.VGPR0 + NumVGPRsMax - 1; Encoding.VGPRL = Encoding.VGPR0 + NumVGPRsMax - 1;
Encoding.SGPR0 = TRI->getEncodingValue(AMDGPU::SGPR0); Encoding.SGPR0 = TRI->getEncodingValue(AMDGPU::SGPR0);
Encoding.SGPRL = Encoding.SGPR0 + NumSGPRsMax - 1; Encoding.SGPRL = Encoding.SGPR0 + NumSGPRsMax - 1;
TrackedWaitcntSet.clear(); TrackedWaitcntSet.clear();
BlockInfos.clear(); BlockInfos.clear();
bool Modified = false; bool Modified = false;
if (!MFI->isEntryFunction()) { if (!MFI->isEntryFunction() && !MFI->isChainFunction()) {
// Wait for any outstanding memory operations that the input registers may // Wait for any outstanding memory operations that the input registers may
// depend on. We can't track them and it's better to do the wait after the // depend on. We can't track them and it's better to do the wait after the
// costly call sequence. // costly call sequence.
// TODO: Could insert earlier and schedule more liberally with operations // TODO: Could insert earlier and schedule more liberally with operations
// that only use caller preserved registers. // that only use caller preserved registers.
MachineBasicBlock &EntryBB = MF.front(); MachineBasicBlock &EntryBB = MF.front();
MachineBasicBlock::iterator I = EntryBB.begin(); MachineBasicBlock::iterator I = EntryBB.begin();
▲ Show 20 Lines • Show All 127 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX11 %s ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX11 %s
; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX10 %s ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX10 %s
; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX11 %s ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX11 %s
; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX10 %s ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX10 %s
declare amdgpu_gfx void @use(...) declare amdgpu_gfx void @use(...)
; FIXME: The values of the counters are undefined on entry to amdgpu_cs_chain functions, so these waits are unnecessary.
define amdgpu_cs_chain void @amdgpu_cs_chain_no_stack({ptr, i32, <4 x i32>} inreg %a, {ptr, i32, <4 x i32>} %b) { define amdgpu_cs_chain void @amdgpu_cs_chain_no_stack({ptr, i32, <4 x i32>} inreg %a, {ptr, i32, <4 x i32>} %b) {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_no_stack: ; GISEL-GFX11-LABEL: amdgpu_cs_chain_no_stack:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_endpgm ; GISEL-GFX11-NEXT: s_endpgm
; ;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_no_stack: ; GISEL-GFX10-LABEL: amdgpu_cs_chain_no_stack:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_endpgm ; GISEL-GFX10-NEXT: s_endpgm
; ;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_no_stack: ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_no_stack:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_endpgm ; DAGISEL-GFX11-NEXT: s_endpgm
; ;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_no_stack: ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_no_stack:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_endpgm ; DAGISEL-GFX10-NEXT: s_endpgm
ret void ret void
} }
define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr, <4 x i32> %vgpr) { define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr, <4 x i32> %vgpr) {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call: ; GISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11
; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5] ; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX11-NEXT: s_endpgm ; GISEL-GFX11-NEXT: s_endpgm
; ;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call: ; GISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
; GISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
; GISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11
; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s0 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, s1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, s1
; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, s2 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, s2
; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, s3 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, s3
; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49] ; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51] ; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5] ; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX10-NEXT: s_endpgm ; GISEL-GFX10-NEXT: s_endpgm
; ;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call: ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v6, v10 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v6, v10
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v4, v8 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v4, v8
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5] ; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
; DAGISEL-GFX11-NEXT: s_endpgm ; DAGISEL-GFX11-NEXT: s_endpgm
; ;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call: ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8
Show All 9 Lines
; DAGISEL-GFX10-NEXT: s_endpgm ; DAGISEL-GFX10-NEXT: s_endpgm
call amdgpu_gfx void @use(<4 x i32> %sgpr, <4 x i32> %vgpr) call amdgpu_gfx void @use(<4 x i32> %sgpr, <4 x i32> %vgpr)
ret void ret void
} }
define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24 x i32> %vgprs) { define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24 x i32> %vgprs) {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_spill: ; GISEL-GFX11-LABEL: amdgpu_cs_chain_spill:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: v_dual_mov_b32 v32, v8 :: v_dual_mov_b32 v33, v9 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v32, v8 :: v_dual_mov_b32 v33, v9
; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 4 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 4
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
; GISEL-GFX11-NEXT: scratch_store_b32 off, v17, s24 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v17, s24
; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 8 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 8
; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 12 ; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 12
; GISEL-GFX11-NEXT: scratch_store_b32 off, v18, s24 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v18, s24
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; GISEL-GFX11-NEXT: v_dual_mov_b32 v28, v36 :: v_dual_mov_b32 v29, v37 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v28, v36 :: v_dual_mov_b32 v29, v37
; GISEL-GFX11-NEXT: v_dual_mov_b32 v30, v38 :: v_dual_mov_b32 v31, v39 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v30, v38 :: v_dual_mov_b32 v31, v39
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[24:25] ; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[24:25]
; GISEL-GFX11-NEXT: s_endpgm ; GISEL-GFX11-NEXT: s_endpgm
; ;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_spill: ; GISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_getpc_b64 s[24:25] ; GISEL-GFX10-NEXT: s_getpc_b64 s[24:25]
; GISEL-GFX10-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: v_mov_b32_e32 v32, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v32, v8
; GISEL-GFX10-NEXT: s_load_dwordx2 s[24:25], s[24:25], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[24:25], s[24:25], 0x0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v33, v9 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v33, v9
; GISEL-GFX10-NEXT: v_mov_b32_e32 v34, v10 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v34, v10
; GISEL-GFX10-NEXT: v_mov_b32_e32 v35, v11 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v35, v11
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49] ; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51] ; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[24:25] ; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[24:25]
; GISEL-GFX10-NEXT: s_endpgm ; GISEL-GFX10-NEXT: s_endpgm
; ;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_spill: ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_spill:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v32, v15 :: v_dual_mov_b32 v33, v14 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v32, v15 :: v_dual_mov_b32 v33, v14
; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 60 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 60
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v31, s24 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v31, s24
; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 56 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 56
; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 52 ; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 52
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v30, s24 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v30, s24
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v28, v35 :: v_dual_mov_b32 v29, v34 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v28, v35 :: v_dual_mov_b32 v29, v34
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v30, v33 :: v_dual_mov_b32 v31, v32 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v30, v33 :: v_dual_mov_b32 v31, v32
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[24:25] ; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[24:25]
; DAGISEL-GFX11-NEXT: s_endpgm ; DAGISEL-GFX11-NEXT: s_endpgm
; ;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_spill: ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[24:25] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[24:25]
; DAGISEL-GFX10-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v32, v15 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v32, v15
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[24:25], s[24:25], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[24:25], s[24:25], 0x0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v33, v14 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v33, v14
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v34, v13 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v34, v13
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v35, v12 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v35, v12
▲ Show 20 Lines • Show All 151 Lines • ▼ Show 20 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain void @chain_to_chain(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain void @chain_to_chain(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_to_chain: ; GISEL-GFX11-LABEL: chain_to_chain:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s3
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_to_chain: ; GISEL-GFX10-LABEL: chain_to_chain:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_to_chain: ; DAGISEL-GFX11-LABEL: chain_to_chain:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_to_chain: ; DAGISEL-GFX10-LABEL: chain_to_chain:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: ;;#ASMSTART ; DAGISEL-GFX10-NEXT: ;;#ASMSTART
; DAGISEL-GFX10-NEXT: s_nop ; DAGISEL-GFX10-NEXT: s_nop
; DAGISEL-GFX10-NEXT: ;;#ASMEND ; DAGISEL-GFX10-NEXT: ;;#ASMEND
; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain void @chain_to_chain_wwm(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain void @chain_to_chain_wwm(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_to_chain_wwm: ; GISEL-GFX11-LABEL: chain_to_chain_wwm:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3
; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 4 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 4
; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v2, v1 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v2, v1
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s3
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v2 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v2
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_to_chain_wwm: ; GISEL-GFX10-LABEL: chain_to_chain_wwm:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3
; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 4 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 4
; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, v1
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v2 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v2
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_to_chain_wwm: ; DAGISEL-GFX11-LABEL: chain_to_chain_wwm:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3
; DAGISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo ; DAGISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, 4 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, 4
; DAGISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo ; DAGISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo
; DAGISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) ; DAGISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v2, v1 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v2, v1
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v2 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v2
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_to_chain_wwm: ; DAGISEL-GFX10-LABEL: chain_to_chain_wwm:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3
; DAGISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo ; DAGISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, 4 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, 4
Show All 13 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
%c = insertelement <3 x i32> %b, i32 %w, i32 0 %c = insertelement <3 x i32> %b, i32 %w, i32 0
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %c, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %c, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain void @chain_to_chain_use_all_v0_v7(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain void @chain_to_chain_use_all_v0_v7(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_to_chain_use_all_v0_v7: ; GISEL-GFX11-LABEL: chain_to_chain_use_all_v0_v7:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v11, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v11, v8
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s3
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v11 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v11
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_to_chain_use_all_v0_v7: ; GISEL-GFX10-LABEL: chain_to_chain_use_all_v0_v7:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v11 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v11
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_to_chain_use_all_v0_v7: ; DAGISEL-GFX11-LABEL: chain_to_chain_use_all_v0_v7:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v11, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v11, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v11 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v11
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_to_chain_use_all_v0_v7: ; DAGISEL-GFX10-LABEL: chain_to_chain_use_all_v0_v7:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: ;;#ASMSTART ; DAGISEL-GFX10-NEXT: ;;#ASMSTART
; DAGISEL-GFX10-NEXT: s_nop ; DAGISEL-GFX10-NEXT: s_nop
; DAGISEL-GFX10-NEXT: ;;#ASMEND ; DAGISEL-GFX10-NEXT: ;;#ASMEND
; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v11 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v11
; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain void @chain_to_chain_fewer_args(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain void @chain_to_chain_fewer_args(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_to_chain_fewer_args: ; GISEL-GFX11-LABEL: chain_to_chain_fewer_args:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX11-NEXT: s_mov_b32 s2, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s2, s0
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s2 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s2
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: s_getpc_b64 s[2:3] ; GISEL-GFX11-NEXT: s_getpc_b64 s[2:3]
; GISEL-GFX11-NEXT: s_add_u32 s2, s2, chain_callee_2@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s2, s2, chain_callee_2@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s3, s3, chain_callee_2@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s3, s3, chain_callee_2@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[2:3] ; GISEL-GFX11-NEXT: s_setpc_b64 s[2:3]
; ;
; GISEL-GFX10-LABEL: chain_to_chain_fewer_args: ; GISEL-GFX10-LABEL: chain_to_chain_fewer_args:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX10-NEXT: s_mov_b32 s2, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s2, s0
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s2 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s2
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: s_getpc_b64 s[2:3] ; GISEL-GFX10-NEXT: s_getpc_b64 s[2:3]
; GISEL-GFX10-NEXT: s_add_u32 s2, s2, chain_callee_2@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s2, s2, chain_callee_2@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s3, s3, chain_callee_2@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s3, s3, chain_callee_2@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[2:3] ; GISEL-GFX10-NEXT: s_setpc_b64 s[2:3]
; ;
; DAGISEL-GFX11-LABEL: chain_to_chain_fewer_args: ; DAGISEL-GFX11-LABEL: chain_to_chain_fewer_args:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s2, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s2, s0
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s2 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s2
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_to_chain_fewer_args: ; DAGISEL-GFX10-LABEL: chain_to_chain_fewer_args:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s2, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s2, s0
; DAGISEL-GFX10-NEXT: ;;#ASMSTART ; DAGISEL-GFX10-NEXT: ;;#ASMSTART
; DAGISEL-GFX10-NEXT: s_nop ; DAGISEL-GFX10-NEXT: s_nop
; DAGISEL-GFX10-NEXT: ;;#ASMEND ; DAGISEL-GFX10-NEXT: ;;#ASMEND
; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s2 ; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s2
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
%s = shufflevector <3 x i32> %a, <3 x i32> zeroinitializer, <2 x i32> <i32 0, i32 1> %s = shufflevector <3 x i32> %a, <3 x i32> zeroinitializer, <2 x i32> <i32 0, i32 1>
%v = shufflevector <3 x i32> %b, <3 x i32> zeroinitializer, <2 x i32> <i32 0, i32 1> %v = shufflevector <3 x i32> %b, <3 x i32> zeroinitializer, <2 x i32> <i32 0, i32 1>
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <2 x i32>, <2 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v2i32(ptr @chain_callee_2, i32 -1, <2 x i32> inreg %s, <2 x i32> %v, i32 0) call void(ptr, i32, <2 x i32>, <2 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v2i32(ptr @chain_callee_2, i32 -1, <2 x i32> inreg %s, <2 x i32> %v, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain void @chain_to_chain_more_args(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain void @chain_to_chain_more_args(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_to_chain_more_args: ; GISEL-GFX11-LABEL: chain_to_chain_more_args:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s3
; GISEL-GFX11-NEXT: s_mov_b32 s3, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, 0
; GISEL-GFX11-NEXT: v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v11, 0 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v11, 0
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_to_chain_more_args: ; GISEL-GFX10-LABEL: chain_to_chain_more_args:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: s_mov_b32 s3, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, 0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX10-NEXT: v_mov_b32_e32 v11, 0 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v11, 0
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_to_chain_more_args: ; DAGISEL-GFX11-LABEL: chain_to_chain_more_args:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, 0
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v11, 0 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v11, 0
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_to_chain_more_args: ; DAGISEL-GFX10-LABEL: chain_to_chain_more_args:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee_2@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee_2@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: ;;#ASMSTART ; DAGISEL-GFX10-NEXT: ;;#ASMSTART
; DAGISEL-GFX10-NEXT: s_nop ; DAGISEL-GFX10-NEXT: s_nop
Show All 10 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <4 x i32>, <4 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v4i32(ptr @chain_callee_2, i32 -1, <4 x i32> inreg %s, <4 x i32> %v, i32 0) call void(ptr, i32, <4 x i32>, <4 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v4i32(ptr @chain_callee_2, i32 -1, <4 x i32> inreg %s, <4 x i32> %v, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain void @amdgpu_cs_chain_dont_realign_stack(i32 %idx) { define amdgpu_cs_chain void @amdgpu_cs_chain_dont_realign_stack(i32 %idx) {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_dont_realign_stack: ; GISEL-GFX11-LABEL: amdgpu_cs_chain_dont_realign_stack:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s3, 4 ; GISEL-GFX11-NEXT: s_mov_b32 s3, 4
; GISEL-GFX11-NEXT: s_mov_b32 s2, 3 ; GISEL-GFX11-NEXT: s_mov_b32 s2, 3
; GISEL-GFX11-NEXT: s_mov_b32 s1, 2 ; GISEL-GFX11-NEXT: s_mov_b32 s1, 2
; GISEL-GFX11-NEXT: s_mov_b32 s0, 1 ; GISEL-GFX11-NEXT: s_mov_b32 s0, 1
; GISEL-GFX11-NEXT: v_lshlrev_b32_e32 v0, 4, v8 ; GISEL-GFX11-NEXT: v_lshlrev_b32_e32 v0, 4, v8
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
; GISEL-GFX11-NEXT: v_add_nc_u32_e32 v4, s32, v0 ; GISEL-GFX11-NEXT: v_add_nc_u32_e32 v4, s32, v0
; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3
; GISEL-GFX11-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2
; GISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc ; GISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc
; GISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX11-NEXT: s_endpgm ; GISEL-GFX11-NEXT: s_endpgm
; ;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_dont_realign_stack: ; GISEL-GFX10-LABEL: amdgpu_cs_chain_dont_realign_stack:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v8 ; GISEL-GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v8
; GISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32 ; GISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 1
; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, 3 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, 3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, 4 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, 4
; GISEL-GFX10-NEXT: v_add_nc_u32_e32 v0, v2, v0 ; GISEL-GFX10-NEXT: v_add_nc_u32_e32 v0, v2, v0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, 2 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, 2
; GISEL-GFX10-NEXT: buffer_store_dword v1, v0, s[48:51], 0 offen ; GISEL-GFX10-NEXT: buffer_store_dword v1, v0, s[48:51], 0 offen
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: buffer_store_dword v2, v0, s[48:51], 0 offen offset:4 ; GISEL-GFX10-NEXT: buffer_store_dword v2, v0, s[48:51], 0 offen offset:4
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: buffer_store_dword v3, v0, s[48:51], 0 offen offset:8 ; GISEL-GFX10-NEXT: buffer_store_dword v3, v0, s[48:51], 0 offen offset:8
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: buffer_store_dword v4, v0, s[48:51], 0 offen offset:12 ; GISEL-GFX10-NEXT: buffer_store_dword v4, v0, s[48:51], 0 offen offset:12
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: s_endpgm ; GISEL-GFX10-NEXT: s_endpgm
; ;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_dont_realign_stack: ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_dont_realign_stack:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
; DAGISEL-GFX11-NEXT: v_lshl_add_u32 v4, v8, 4, s32 ; DAGISEL-GFX11-NEXT: v_lshl_add_u32 v4, v8, 4, s32
; DAGISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc ; DAGISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc
; DAGISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; DAGISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; DAGISEL-GFX11-NEXT: s_endpgm ; DAGISEL-GFX11-NEXT: s_endpgm
; ;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_dont_realign_stack: ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_dont_realign_stack:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 4 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 4
; DAGISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32 ; DAGISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v3, 2 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v3, 2
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, 1 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, 1
; DAGISEL-GFX10-NEXT: v_lshl_add_u32 v1, v8, 4, v2 ; DAGISEL-GFX10-NEXT: v_lshl_add_u32 v1, v8, 4, v2
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v2, 3 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v2, 3
; DAGISEL-GFX10-NEXT: buffer_store_dword v0, v1, s[48:51], 0 offen offset:12 ; DAGISEL-GFX10-NEXT: buffer_store_dword v0, v1, s[48:51], 0 offen offset:12
Show All 22 Lines

llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX11 %s ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX11 %s
; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX10 %s ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX10 %s
; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX11 %s ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX11 %s
; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX10 %s ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX10 %s
; FIXME: The values of the counters are undefined on entry to amdgpu_cs_chain_preserve functions, so these waits are unnecessary.
define amdgpu_cs_chain_preserve void @amdgpu_cs_chain_preserve_no_stack({ptr, i32, <4 x i32>} inreg %a, {ptr, i32, <4 x i32>} %b) { define amdgpu_cs_chain_preserve void @amdgpu_cs_chain_preserve_no_stack({ptr, i32, <4 x i32>} inreg %a, {ptr, i32, <4 x i32>} %b) {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_no_stack: ; GISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_no_stack:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_endpgm ; GISEL-GFX11-NEXT: s_endpgm
; ;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_no_stack: ; GISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_no_stack:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_endpgm ; GISEL-GFX10-NEXT: s_endpgm
; ;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_no_stack: ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_no_stack:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_endpgm ; DAGISEL-GFX11-NEXT: s_endpgm
; ;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_no_stack: ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_no_stack:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_endpgm ; DAGISEL-GFX10-NEXT: s_endpgm
ret void ret void
} }
define amdgpu_cs void @cs_to_chain_preserve(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs void @cs_to_chain_preserve(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: cs_to_chain_preserve: ; GISEL-GFX11-LABEL: cs_to_chain_preserve:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v10, v2 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v10, v2
▲ Show 20 Lines • Show All 85 Lines • ▼ Show 20 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_preserve_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_preserve_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain void @chain_to_chain_preserve(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain void @chain_to_chain_preserve(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_to_chain_preserve: ; GISEL-GFX11-LABEL: chain_to_chain_preserve:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s3
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_to_chain_preserve: ; GISEL-GFX10-LABEL: chain_to_chain_preserve:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_to_chain_preserve: ; DAGISEL-GFX11-LABEL: chain_to_chain_preserve:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_to_chain_preserve: ; DAGISEL-GFX10-LABEL: chain_to_chain_preserve:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: ;;#ASMSTART ; DAGISEL-GFX10-NEXT: ;;#ASMSTART
; DAGISEL-GFX10-NEXT: s_nop ; DAGISEL-GFX10-NEXT: s_nop
; DAGISEL-GFX10-NEXT: ;;#ASMEND ; DAGISEL-GFX10-NEXT: ;;#ASMEND
; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX10-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_preserve_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_preserve_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_preserve(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_preserve(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_preserve_to_chain_preserve: ; GISEL-GFX11-LABEL: chain_preserve_to_chain_preserve:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s3
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload ; GISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_preserve_to_chain_preserve: ; GISEL-GFX10-LABEL: chain_preserve_to_chain_preserve:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload ; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_preserve: ; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_preserve:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload ; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_preserve: ; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_preserve:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
Show All 9 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_preserve_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_preserve_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain_preserve void @chain_preserve_to_chain(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain_preserve void @chain_preserve_to_chain(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_preserve_to_chain: ; GISEL-GFX11-LABEL: chain_preserve_to_chain:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s3
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload ; GISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload
; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_preserve_to_chain: ; GISEL-GFX10-LABEL: chain_preserve_to_chain:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload ; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_preserve_to_chain: ; DAGISEL-GFX11-LABEL: chain_preserve_to_chain:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s3
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload ; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_preserve_to_chain: ; DAGISEL-GFX10-LABEL: chain_preserve_to_chain:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
Show All 9 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_wwm(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_wwm(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_preserve_to_chain_wwm: ; GISEL-GFX11-LABEL: chain_preserve_to_chain_wwm:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3
; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 4 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 4
; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX11-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
Show All 9 Lines
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_preserve_to_chain_wwm: ; GISEL-GFX10-LABEL: chain_preserve_to_chain_wwm:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3
; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 4 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 4
; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo ; GISEL-GFX10-NEXT: s_not_b32 exec_lo, exec_lo
; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, v1
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v2 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v2
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload ; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_wwm: ; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_wwm:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, 3
Show All 9 Lines
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v2 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v2
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload ; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_wwm: ; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_wwm:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s3, s0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, 3
Show All 16 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
%c = insertelement <3 x i32> %b, i32 %w, i32 0 %c = insertelement <3 x i32> %b, i32 %w, i32 0
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %c, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %c, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_use_all_v0_v7(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_use_all_v0_v7(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_preserve_to_chain_use_all_v0_v7: ; GISEL-GFX11-LABEL: chain_preserve_to_chain_use_all_v0_v7:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s3, s0
; GISEL-GFX11-NEXT: s_clause 0x1 ; GISEL-GFX11-NEXT: s_clause 0x1
; GISEL-GFX11-NEXT: scratch_store_b32 off, v11, s32 offset:4 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v11, s32 offset:4
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
; GISEL-GFX11-NEXT: v_mov_b32_e32 v11, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v11, v8
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
Show All 9 Lines
; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; GISEL-GFX10-LABEL: chain_preserve_to_chain_use_all_v0_v7: ; GISEL-GFX10-LABEL: chain_preserve_to_chain_use_all_v0_v7:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_mov_b32 s3, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s3, s0
; GISEL-GFX10-NEXT: buffer_store_dword v11, off, s[48:51], s32 offset:4 ; 4-byte Folded Spill ; GISEL-GFX10-NEXT: buffer_store_dword v11, off, s[48:51], s32 offset:4 ; 4-byte Folded Spill
; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
; GISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s3 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v11 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v11
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: s_clause 0x1 ; GISEL-GFX10-NEXT: s_clause 0x1
; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32
; GISEL-GFX10-NEXT: buffer_load_dword v11, off, s[48:51], s32 offset:4 ; GISEL-GFX10-NEXT: buffer_load_dword v11, off, s[48:51], s32 offset:4
; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5] ; GISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_use_all_v0_v7: ; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_use_all_v0_v7:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_clause 0x1 ; DAGISEL-GFX11-NEXT: s_clause 0x1
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v11, s32 offset:4 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v11, s32 offset:4
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
Show All 9 Lines
; DAGISEL-GFX11-NEXT: s_clause 0x1 ; DAGISEL-GFX11-NEXT: s_clause 0x1
; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32
; DAGISEL-GFX11-NEXT: scratch_load_b32 v11, off, s32 offset:4 ; DAGISEL-GFX11-NEXT: scratch_load_b32 v11, off, s32 offset:4
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_use_all_v0_v7: ; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_use_all_v0_v7:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_callee@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_callee@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: buffer_store_dword v11, off, s[48:51], s32 offset:4 ; 4-byte Folded Spill ; DAGISEL-GFX10-NEXT: buffer_store_dword v11, off, s[48:51], s32 offset:4 ; 4-byte Folded Spill
; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v11, v8
Show All 12 Lines; DAGISEL-GFX10-NEXT: s_setpc_b64 s[4:5]
call void asm "s_nop", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v16},~{s0}"() call void asm "s_nop", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v16},~{s0}"()
call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0) call void(ptr, i32, <3 x i32>, <3 x i32>, i32, ...) @llvm.amdgcn.cs.chain.v3i32(ptr @chain_callee, i32 -1, <3 x i32> inreg %a, <3 x i32> %b, i32 0)
unreachable unreachable
} }
define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_preserve_fewer_args(<3 x i32> inreg %a, <3 x i32> %b) { define amdgpu_cs_chain_preserve void @chain_preserve_to_chain_preserve_fewer_args(<3 x i32> inreg %a, <3 x i32> %b) {
; GISEL-GFX11-LABEL: chain_preserve_to_chain_preserve_fewer_args: ; GISEL-GFX11-LABEL: chain_preserve_to_chain_preserve_fewer_args:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_mov_b32 s2, s0 ; GISEL-GFX11-NEXT: s_mov_b32 s2, s0
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; GISEL-GFX11-NEXT: ;;#ASMSTART ; GISEL-GFX11-NEXT: ;;#ASMSTART
; GISEL-GFX11-NEXT: s_nop ; GISEL-GFX11-NEXT: s_nop
; GISEL-GFX11-NEXT: ;;#ASMEND ; GISEL-GFX11-NEXT: ;;#ASMEND
; GISEL-GFX11-NEXT: s_mov_b32 s0, s2 ; GISEL-GFX11-NEXT: s_mov_b32 s0, s2
; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload ; GISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload
; GISEL-GFX11-NEXT: s_getpc_b64 s[2:3] ; GISEL-GFX11-NEXT: s_getpc_b64 s[2:3]
; GISEL-GFX11-NEXT: s_add_u32 s2, s2, chain_preserve_callee_2@gotpcrel32@lo+4 ; GISEL-GFX11-NEXT: s_add_u32 s2, s2, chain_preserve_callee_2@gotpcrel32@lo+4
; GISEL-GFX11-NEXT: s_addc_u32 s3, s3, chain_preserve_callee_2@gotpcrel32@hi+12 ; GISEL-GFX11-NEXT: s_addc_u32 s3, s3, chain_preserve_callee_2@gotpcrel32@hi+12
; GISEL-GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x0 ; GISEL-GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX11-NEXT: s_setpc_b64 s[2:3] ; GISEL-GFX11-NEXT: s_setpc_b64 s[2:3]
; ;
; GISEL-GFX10-LABEL: chain_preserve_to_chain_preserve_fewer_args: ; GISEL-GFX10-LABEL: chain_preserve_to_chain_preserve_fewer_args:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_mov_b32 s2, s0 ; GISEL-GFX10-NEXT: s_mov_b32 s2, s0
; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
; GISEL-GFX10-NEXT: ;;#ASMSTART ; GISEL-GFX10-NEXT: ;;#ASMSTART
; GISEL-GFX10-NEXT: s_nop ; GISEL-GFX10-NEXT: s_nop
; GISEL-GFX10-NEXT: ;;#ASMEND ; GISEL-GFX10-NEXT: ;;#ASMEND
; GISEL-GFX10-NEXT: s_mov_b32 s0, s2 ; GISEL-GFX10-NEXT: s_mov_b32 s0, s2
; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, v1
; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1 ; GISEL-GFX10-NEXT: s_mov_b32 exec_lo, -1
; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload ; GISEL-GFX10-NEXT: buffer_load_dword v16, off, s[48:51], s32 ; 4-byte Folded Reload
; GISEL-GFX10-NEXT: s_getpc_b64 s[2:3] ; GISEL-GFX10-NEXT: s_getpc_b64 s[2:3]
; GISEL-GFX10-NEXT: s_add_u32 s2, s2, chain_preserve_callee_2@gotpcrel32@lo+4 ; GISEL-GFX10-NEXT: s_add_u32 s2, s2, chain_preserve_callee_2@gotpcrel32@lo+4
; GISEL-GFX10-NEXT: s_addc_u32 s3, s3, chain_preserve_callee_2@gotpcrel32@hi+12 ; GISEL-GFX10-NEXT: s_addc_u32 s3, s3, chain_preserve_callee_2@gotpcrel32@hi+12
; GISEL-GFX10-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-GFX10-NEXT: s_setpc_b64 s[2:3] ; GISEL-GFX10-NEXT: s_setpc_b64 s[2:3]
; ;
; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_preserve_fewer_args: ; DAGISEL-GFX11-LABEL: chain_preserve_to_chain_preserve_fewer_args:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee_2@gotpcrel32@lo+4 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, chain_preserve_callee_2@gotpcrel32@lo+4
; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee_2@gotpcrel32@hi+12 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, chain_preserve_callee_2@gotpcrel32@hi+12
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: s_mov_b32 s2, s0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s2, s0
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32 ; 4-byte Folded Spill
; DAGISEL-GFX11-NEXT: ;;#ASMSTART ; DAGISEL-GFX11-NEXT: ;;#ASMSTART
; DAGISEL-GFX11-NEXT: s_nop ; DAGISEL-GFX11-NEXT: s_nop
; DAGISEL-GFX11-NEXT: ;;#ASMEND ; DAGISEL-GFX11-NEXT: ;;#ASMEND
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s2 ; DAGISEL-GFX11-NEXT: s_mov_b32 s0, s2
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1 ; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v8, v1
; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1 ; DAGISEL-GFX11-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload ; DAGISEL-GFX11-NEXT: scratch_load_b32 v16, off, s32 ; 4-byte Folded Reload
; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5] ; DAGISEL-GFX11-NEXT: s_setpc_b64 s[4:5]
; ;
; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_preserve_fewer_args: ; DAGISEL-GFX10-LABEL: chain_preserve_to_chain_preserve_fewer_args:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5] ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee_2@gotpcrel32@lo+4 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, chain_preserve_callee_2@gotpcrel32@lo+4
; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee_2@gotpcrel32@hi+12 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, chain_preserve_callee_2@gotpcrel32@hi+12
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, v8
; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: s_mov_b32 s2, s0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s2, s0
; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill ; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32 ; 4-byte Folded Spill
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} }
; Note that amdgpu_cs_chain_preserve functions are not allowed to call ; Note that amdgpu_cs_chain_preserve functions are not allowed to call
; llvm.amdgcn.cs.chain with more vgpr args than they received as parameters. ; llvm.amdgcn.cs.chain with more vgpr args than they received as parameters.
define amdgpu_cs_chain_preserve void @amdgpu_cs_chain_preserve_dont_realign_stack(i32 %idx) { define amdgpu_cs_chain_preserve void @amdgpu_cs_chain_preserve_dont_realign_stack(i32 %idx) {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack: ; GISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack:
; GISEL-GFX11: ; %bb.0: ; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s3, 4 ; GISEL-GFX11-NEXT: s_mov_b32 s3, 4
; GISEL-GFX11-NEXT: s_mov_b32 s2, 3 ; GISEL-GFX11-NEXT: s_mov_b32 s2, 3
; GISEL-GFX11-NEXT: s_mov_b32 s1, 2 ; GISEL-GFX11-NEXT: s_mov_b32 s1, 2
; GISEL-GFX11-NEXT: s_mov_b32 s0, 1 ; GISEL-GFX11-NEXT: s_mov_b32 s0, 1
; GISEL-GFX11-NEXT: v_lshlrev_b32_e32 v0, 4, v8 ; GISEL-GFX11-NEXT: v_lshlrev_b32_e32 v0, 4, v8
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
; GISEL-GFX11-NEXT: v_add_nc_u32_e32 v4, s32, v0 ; GISEL-GFX11-NEXT: v_add_nc_u32_e32 v4, s32, v0
; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3
; GISEL-GFX11-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2
; GISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc ; GISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc
; GISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX11-NEXT: s_endpgm ; GISEL-GFX11-NEXT: s_endpgm
; ;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack: ; GISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack:
; GISEL-GFX10: ; %bb.0: ; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v8 ; GISEL-GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v8
; GISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32 ; GISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32
; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 1 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 1
; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, 3 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, 3
; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, 4 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, 4
; GISEL-GFX10-NEXT: v_add_nc_u32_e32 v0, v2, v0 ; GISEL-GFX10-NEXT: v_add_nc_u32_e32 v0, v2, v0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, 2 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, 2
; GISEL-GFX10-NEXT: buffer_store_dword v1, v0, s[48:51], 0 offen ; GISEL-GFX10-NEXT: buffer_store_dword v1, v0, s[48:51], 0 offen
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: buffer_store_dword v2, v0, s[48:51], 0 offen offset:4 ; GISEL-GFX10-NEXT: buffer_store_dword v2, v0, s[48:51], 0 offen offset:4
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: buffer_store_dword v3, v0, s[48:51], 0 offen offset:8 ; GISEL-GFX10-NEXT: buffer_store_dword v3, v0, s[48:51], 0 offen offset:8
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: buffer_store_dword v4, v0, s[48:51], 0 offen offset:12 ; GISEL-GFX10-NEXT: buffer_store_dword v4, v0, s[48:51], 0 offen offset:12
; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GISEL-GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GISEL-GFX10-NEXT: s_endpgm ; GISEL-GFX10-NEXT: s_endpgm
; ;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack: ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack:
; DAGISEL-GFX11: ; %bb.0: ; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
; DAGISEL-GFX11-NEXT: v_lshl_add_u32 v4, v8, 4, s32 ; DAGISEL-GFX11-NEXT: v_lshl_add_u32 v4, v8, 4, s32
; DAGISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc ; DAGISEL-GFX11-NEXT: scratch_store_b128 v4, v[0:3], off dlc
; DAGISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; DAGISEL-GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; DAGISEL-GFX11-NEXT: s_endpgm ; DAGISEL-GFX11-NEXT: s_endpgm
; ;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack: ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_preserve_dont_realign_stack:
; DAGISEL-GFX10: ; %bb.0: ; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0 ; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 4 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 4
; DAGISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32 ; DAGISEL-GFX10-NEXT: v_lshrrev_b32_e64 v2, 5, s32
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v3, 2 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v3, 2
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, 1 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, 1
; DAGISEL-GFX10-NEXT: v_lshl_add_u32 v1, v8, 4, v2 ; DAGISEL-GFX10-NEXT: v_lshl_add_u32 v1, v8, 4, v2
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v2, 3 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v2, 3
; DAGISEL-GFX10-NEXT: buffer_store_dword v0, v1, s[48:51], 0 offen offset:12 ; DAGISEL-GFX10-NEXT: buffer_store_dword v0, v1, s[48:51], 0 offen offset:12
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