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[RISCV] Check floating point vector instruction with SEW=64 is valid when vsetvl insertion
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Authored by kito-cheng on Aug 16 2023, 7:42 AM.

Details

Summary

Scalar move and splat instruction are only demand the SEW is greater than
its own needs, but floating point vector with SEW=64 is not alwaws valid even
SEW=64 is valid, because we have a special configuration: zve64f.

So we need to check floating point vector instruction with SEW=64 is
valid when compute demand of floating point scalar move and splat
instruction.

Diff Detail

Event Timeline

kito-cheng created this revision.Aug 16 2023, 7:42 AM
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kito-cheng requested review of this revision.Aug 16 2023, 7:42 AM
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craig.topper added inline comments.Aug 16 2023, 9:49 AM
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
210

"must less" -> "must be less"

I would suggest an initial patch which simply disabled the problematic logic for zve64f. Adding the additional inference state can be a separate follow on. In particularly, you currently don't have test coverage for the optimization bits.

llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
1534

Instead of using a global, please just check the property of the subtarget as the call sites. Much easier to read.

craig.topper added inline comments.Aug 16 2023, 11:57 AM
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
332

Capitalize variable name

Changes:

  • Address comments
  • Remove optimization part
kito-cheng marked 3 inline comments as done.Aug 17 2023, 5:35 AM
reames accepted this revision.Aug 17 2023, 9:07 AM

LGTM

This revision is now accepted and ready to land.Aug 17 2023, 9:07 AM