AMDGPU: Remove special case constant folding of divide

[arsenm]

Summary

We should probably just swap this out for the fdiv, but that's what
the implementation is anyway.

[arsenm]

d45022b094a0a00b52057b464902693bc4e2db76

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

bool AMDGPULibCalls::evaluateScalarMathFunc(const FuncInfo &FInfo, double &Res0,
   case AMDGPULibFunc::EI_TANH:
     Res0 = tanh(opr0);
     return true;
 
   case AMDGPULibFunc::EI_TANPI:
     Res0 = tan(MATH_PI * opr0);
     return true;
 
-  case AMDGPULibFunc::EI_RECIP:
-    Res0 = 1.0 / opr0;
-    return true;
-
   // two-arg functions
-  case AMDGPULibFunc::EI_DIVIDE:
-    Res0 = opr0 / opr1;
-    return true;
-
   case AMDGPULibFunc::EI_POW:
   case AMDGPULibFunc::EI_POWR:
     Res0 = pow(opr0, opr1);
     return true;
 
   case AMDGPULibFunc::EI_POWN: {
     if (ConstantInt *iopr1 = dyn_cast_or_null<ConstantInt>(copr1)) {
       double val = (double)iopr1->getSExtValue();

llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll

entry:
   ret void
 }
 
 declare <16 x float> @_Z3sinDv16_f(<16 x float>)
 
 declare <16 x float> @_Z3cosDv16_f(<16 x float>)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_native_recip
-; GCN: store float 0x3FD5555560000000, ptr addrspace(1) %a
+; GCN: %call = tail call fast float @_Z12native_recipf(float 3.000000e+00)
 define amdgpu_kernel void @test_native_recip(ptr addrspace(1) nocapture %a) {
 entry:
   %call = call fast float @_Z12native_recipf(float 3.000000e+00)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z12native_recipf(float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_half_recip
-; GCN: store float 0x3FD5555560000000, ptr addrspace(1) %a
+;  GCN: %call = tail call fast float @_Z10half_recipf(float 3.000000e+00)
 define amdgpu_kernel void @test_half_recip(ptr addrspace(1) nocapture %a) {
 entry:
   %call = call fast float @_Z10half_recipf(float 3.000000e+00)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z10half_recipf(float)