AMDGPU: Replace some libcalls with intrinsics

[arsenm]

Summary

OpenCL loses fast math information by going through libcall wrappers
around intrinsics.

Do this to preserve call site flags which are lost when inlining. It's
not safe in general to propagate flags during inline, so avoid dealing
with this by just special casing some of the useful calls.

[rampitec]

Looks nice!

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

601–615

deferring the log handling since this exposed some failures when using fast math for denormal values (apparently the conformance test enforces some accuracy limit with fast math?)

[arsenm]

a70006c4c581ef3f9b355ec78ec38023faada6c6 minus the log cases

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

private:
 
   // __read_pipe/__write_pipe
   bool fold_read_write_pipe(CallInst *CI, IRBuilder<> &B,
                             const FuncInfo &FInfo);
 
   // Get a scalar native builtin single argument FP function
   FunctionCallee getNativeFunction(Module *M, const FuncInfo &FInfo);
 
+  /// Substitute a call to a known libcall with an intrinsic call. If \p
+  /// AllowMinSize is true, allow the replacement in a minsize function.
+  bool shouldReplaceLibcallWithIntrinsic(const CallInst *CI,
+                                         bool AllowMinSizeF32 = false,
+                                         bool AllowF64 = false);
+  void replaceLibCallWithSimpleIntrinsic(CallInst *CI, Intrinsic::ID IntrID);
+
+  bool tryReplaceLibcallWithSimpleIntrinsic(CallInst *CI, Intrinsic::ID IntrID,
+                                            bool AllowMinSizeF32 = false,
+                                            bool AllowF64 = false);
+
 protected:
   bool isUnsafeMath(const FPMathOperator *FPOp) const;
 
   bool canIncreasePrecisionOfConstantFold(const FPMathOperator *FPOp) const;
 
   static void replaceCall(Instruction *I, Value *With) {
     I->replaceAllUsesWith(With);
     I->eraseFromParent();
bool AMDGPULibCalls::fold(CallInst *CI) {
   if (FPMathOperator *FPOp = dyn_cast<FPMathOperator>(CI)) {
     // Under unsafe-math, evaluate calls if possible.
     // According to Brian Sumner, we can do this for all f32 function calls
     // using host's double function calls.
     if (canIncreasePrecisionOfConstantFold(FPOp) && evaluateCall(CI, FInfo))
       return true;
 
     // Copy fast flags from the original call.
-    B.setFastMathFlags(FPOp->getFastMathFlags());
+    FastMathFlags FMF = FPOp->getFastMathFlags();
+    B.setFastMathFlags(FMF);
 
-    // Specialized optimizations for each function call
+    // Specialized optimizations for each function call.
+    //
+    // TODO: Handle other simple intrinsic wrappers. Sqrt, copysign, fabs,
+    // ldexp, rounding intrinsics.
+    //
+    // TODO: Handle native functions
     switch (FInfo.getId()) {
+    case AMDGPULibFunc::EI_EXP:
+      if (FMF.none())
+        return false;
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::exp,
+                                                  FMF.approxFunc());
+    case AMDGPULibFunc::EI_EXP2:
+      if (FMF.none())
+        return false;
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::exp2,
+                                                  FMF.approxFunc());
+    case AMDGPULibFunc::EI_LOG:
+      if (FMF.none())
+        return false;
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::log,
+                                                  FMF.approxFunc());
+    case AMDGPULibFunc::EI_LOG2:
+      if (FMF.none())
+        return false;
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::log2,
+                                                  FMF.approxFunc());
+    case AMDGPULibFunc::EI_LOG10:
+      if (FMF.none())
+        return false;
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::log10,
+                                                  FMF.approxFunc());
+    case AMDGPULibFunc::EI_FMIN:
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::minnum, true,
+                                                  true);
+    case AMDGPULibFunc::EI_FMAX:
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::maxnum, true,
+                                                  true);
+    case AMDGPULibFunc::EI_FMA:
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::fma, true,
+                                                  true);
+    case AMDGPULibFunc::EI_MAD:
+      return tryReplaceLibcallWithSimpleIntrinsic(CI, Intrinsic::fmuladd, true,
+                                                  true);
     case AMDGPULibFunc::EI_POW:
     case AMDGPULibFunc::EI_POWR:
     case AMDGPULibFunc::EI_POWN:
       return fold_pow(FPOp, B, FInfo);
     case AMDGPULibFunc::EI_ROOTN:
       return fold_rootn(FPOp, B, FInfo);
     case AMDGPULibFunc::EI_SQRT:
       return fold_sqrt(FPOp, B, FInfo);
FunctionCallee AMDGPULibCalls::getNativeFunction(Module *M,
                                                  const FuncInfo &FInfo) {
   if (getArgType(FInfo) == AMDGPULibFunc::F64 || !HasNative(FInfo.getId()))
     return nullptr;
   FuncInfo nf = FInfo;
   nf.setPrefix(AMDGPULibFunc::NATIVE);
   return getFunction(M, nf);
 }
 
+// Some library calls are just wrappers around llvm intrinsics, but compiled
+// conservatively. Preserve the flags from the original call site by
+// substituting them with direct calls with all the flags.
+bool AMDGPULibCalls::shouldReplaceLibcallWithIntrinsic(const CallInst *CI,
+                                                       bool AllowMinSizeF32,
+                                                       bool AllowF64) {
+  Type *FltTy = CI->getType()->getScalarType();
+  const bool IsF32 = FltTy->isFloatTy();
+
+  // f64 intrinsics aren't implemented for most operations.
+  if (!IsF32 && !FltTy->isHalfTy() && (!AllowF64 || !FltTy->isDoubleTy()))
+    return false;
+
+  // We're implicitly inlining by replacing the libcall with the intrinsic, so
+  // don't do it for noinline call sites.
+  if (CI->isNoInline())
+    return false;
+
+  const Function *ParentF = CI->getFunction();
+  // TODO: Handle strictfp
+  if (ParentF->hasFnAttribute(Attribute::StrictFP))
+    return false;
+
+  if (IsF32 && !AllowMinSizeF32 && ParentF->hasMinSize())
+    return false;
+  return true;
+}
+
+void AMDGPULibCalls::replaceLibCallWithSimpleIntrinsic(CallInst *CI,
+                                                       Intrinsic::ID IntrID) {
+  CI->setCalledFunction(
+      Intrinsic::getDeclaration(CI->getModule(), IntrID, {CI->getType()}));
+}
+
+bool AMDGPULibCalls::tryReplaceLibcallWithSimpleIntrinsic(CallInst *CI,
+                                                          Intrinsic::ID IntrID,
+                                                          bool AllowMinSizeF32,
+                                                          bool AllowF64) {
+  if (!shouldReplaceLibcallWithIntrinsic(CI, AllowMinSizeF32, AllowF64))
+    return false;
+  replaceLibCallWithSimpleIntrinsic(CI, IntrID);
+  return true;
+}
+
 // fold sqrt -> native_sqrt (x)
 bool AMDGPULibCalls::fold_sqrt(FPMathOperator *FPOp, IRBuilder<> &B,
                                const FuncInfo &FInfo) {
   if (!isUnsafeMath(FPOp))
     return false;
 
   if (getArgType(FInfo) == AMDGPULibFunc::F32 && (getVecSize(FInfo) == 1) &&
       (FInfo.getPrefix() != AMDGPULibFunc::NATIVE)) {

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp.ll

 ;
   %exp = tail call half @_Z3expDh(half %arg)
   ret half %exp
 }
 
 define half @test_exp_f16_fast(half %arg) {
 ; CHECK-LABEL: define half @test_exp_f16_fast
 ; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call fast half @_Z3expDh(half [[ARG]])
+; CHECK-NEXT:    [[EXP:%.*]] = tail call fast half @llvm.exp.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[EXP]]
 ;
   %exp = tail call fast half @_Z3expDh(half %arg)
   ret half %exp
 }
 
 define <2 x half> @test_exp_v2f16(<2 x half> %arg) {
 ; CHECK-LABEL: define <2 x half> @test_exp_v2f16

 ;
   %exp = tail call <16 x half> @_Z3expDv16_Dh(<16 x half> %arg)
   ret <16 x half> %exp
 }
 
 define float @test_exp_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_exp_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR5:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call float @_Z3expf(float %arg) #0, !fpmath !0
   ret float %exp
 }
 
 define <2 x float> @test_exp_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[EXP]]
 ;
   %exp = tail call <2 x float> @_Z3expDv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %exp
 }
 
 define float @test_exp_cr_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_exp_cr_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call float @_Z3expf(float %arg) #0
   ret float %exp
 }
 
 define <2 x float> @test_exp_cr_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp_cr_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[EXP]]
 ;
   %exp = tail call <2 x float> @_Z3expDv2_f(<2 x float> %arg) #0
   ret <2 x float> %exp
 }
 
 ; "no-builtins" should be ignored
 define float @test_exp_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_exp_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call float @_Z3expf(float %arg) #0, !fpmath !0
   ret float %exp
 }
 
 define <2 x float> @test_exp_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_exp_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[EXP]]
 ;
   %exp = tail call <2 x float> @_Z3expDv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %exp
 }
 
 define float @test_exp_cr_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_exp_cr_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP:%.*]] = tail call float @_Z3expf(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call float @_Z3expf(float %arg) #0
   ret float %exp
 }
 
 define <2 x float> @test_exp_cr_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_exp_cr_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP:%.*]] = tail call <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[EXP]]
 ;
   %exp = tail call <2 x float> @_Z3expDv2_f(<2 x float> %arg) #0
   ret <2 x float> %exp
 }
 
 define float @test_exp_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_exp_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan ninf float @_Z3expf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan ninf float @llvm.exp.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call nnan ninf float @_Z3expf(float %arg), !fpmath !0
   ret float %exp
 }
 
 define <2 x float> @test_exp_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan nsz contract <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan nsz contract <2 x float> @llvm.exp.v2f32(<2 x float> [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[EXP]]
 ;
   %exp = tail call contract nsz nnan <2 x float> @_Z3expDv2_f(<2 x float> %arg), !fpmath !0
   ret <2 x float> %exp
 }
 
 define float @test_exp_f32_preserve_flags_md(float %arg) {
 ; CHECK-LABEL: define float @test_exp_f32_preserve_flags_md
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan ninf float @_Z3expf(float [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan ninf float @llvm.exp.f32(float [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call nnan ninf float @_Z3expf(float %arg), !fpmath !0, !foo !1
   ret float %exp
 }
 
 define <2 x float> @test_exp_v2f32_preserve_flags_md(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp_v2f32_preserve_flags_md
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan nsz contract <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan nsz contract <2 x float> @llvm.exp.v2f32(<2 x float> [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret <2 x float> [[EXP]]
 ;
   %exp = tail call contract nsz nnan <2 x float> @_Z3expDv2_f(<2 x float> %arg), !fpmath !0, !foo !1
   ret <2 x float> %exp
 }
 
 define float @test_exp_cr_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_exp_cr_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call ninf contract float @_Z3expf(float [[ARG]])
+; CHECK-NEXT:    [[EXP:%.*]] = tail call ninf contract float @llvm.exp.f32(float [[ARG]])
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call ninf contract float @_Z3expf(float %arg)
   ret float %exp
 }
 
 define <2 x float> @test_exp_cr_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp_cr_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan nsz <2 x float> @_Z3expDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT:    [[EXP:%.*]] = tail call nnan nsz <2 x float> @llvm.exp.v2f32(<2 x float> [[ARG]])
 ; CHECK-NEXT:    ret <2 x float> [[EXP]]
 ;
   %exp = tail call nnan nsz <2 x float> @_Z3expDv2_f(<2 x float> %arg)
   ret <2 x float> %exp
 }
 
 ; Test the libm name, not a recognized opencl builtin.
 declare float @expf(float) #2

 ;
   %exp = tail call double @exp(double %arg), !fpmath !0
   ret double %exp
 }
 
 define float @test_exp_f32_fast_noinline(float %arg) {
 ; CHECK-LABEL: define float @test_exp_f32_fast_noinline
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call fast float @_Z3expf(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call fast float @_Z3expf(float [[ARG]]) #[[ATTR7:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call fast float @_Z3expf(float %arg) #3, !fpmath !0
   ret float %exp
 }
 
 define float @test_exp_f32_fast_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_exp_f32_fast_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2:[0-9]+]] {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call fast float @_Z3expf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call fast float @llvm.exp.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call fast float @_Z3expf(float %arg), !fpmath !0
   ret float %exp
 }
 
 define float @test_exp_f32_fast_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_exp_f32_fast_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call fast float @_Z3expf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call fast float @llvm.exp.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call fast float @_Z3expf(float %arg), !fpmath !0
   ret float %exp
 }
 
 define float @test_exp_f32_nsz_contract_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_exp_f32_nsz_contract_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT:    [[EXP:%.*]] = tail call nsz contract float @_Z3expf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP:%.*]] = tail call nsz contract float @llvm.exp.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP]]
 ;
   %exp = tail call nsz contract float @_Z3expf(float %arg), !fpmath !0
   ret float %exp
 }
 
 define float @test_exp_f32_nsz_contract_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_exp_f32_nsz_contract_minsize

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp2.ll

 ;
   %exp2 = tail call half @_Z4exp2Dh(half %arg)
   ret half %exp2
 }
 
 define half @test_exp2_f16_fast(half %arg) {
 ; CHECK-LABEL: define half @test_exp2_f16_fast
 ; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast half @_Z4exp2Dh(half [[ARG]])
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast half @llvm.exp2.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[EXP2]]
 ;
   %exp2 = tail call fast half @_Z4exp2Dh(half %arg)
   ret half %exp2
 }
 
 define <2 x half> @test_exp2_v2f16(<2 x half> %arg) {
 ; CHECK-LABEL: define <2 x half> @test_exp2_v2f16

 ;
   %exp2 = tail call <16 x half> @_Z4exp2Dv16_Dh(<16 x half> %arg)
   ret <16 x half> %exp2
 }
 
 define float @test_exp2_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_exp2_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR5:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call float @_Z4exp2f(float %arg) #0, !fpmath !0
   ret float %exp2
 }
 
 define <2 x float> @test_exp2_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp2_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[EXP2]]
 ;
   %exp2 = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %exp2
 }
 
 define float @test_exp2_cr_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_exp2_cr_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call float @_Z4exp2f(float %arg) #0
   ret float %exp2
 }
 
 define <2 x float> @test_exp2_cr_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp2_cr_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[EXP2]]
 ;
   %exp2 = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> %arg) #0
   ret <2 x float> %exp2
 }
 
 ; "no-builtins" should be ignored
 define float @test_exp2_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_exp2_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call float @_Z4exp2f(float %arg) #0, !fpmath !0
   ret float %exp2
 }
 
 define <2 x float> @test_exp2_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_exp2_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[EXP2]]
 ;
   %exp2 = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %exp2
 }
 
 define float @test_exp2_cr_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_exp2_cr_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call float @_Z4exp2f(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call float @_Z4exp2f(float %arg) #0
   ret float %exp2
 }
 
 define <2 x float> @test_exp2_cr_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_exp2_cr_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[EXP2]]
 ;
   %exp2 = tail call <2 x float> @_Z4exp2Dv2_f(<2 x float> %arg) #0
   ret <2 x float> %exp2
 }
 
 define float @test_exp2_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_exp2_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan ninf float @_Z4exp2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan ninf float @llvm.exp2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call nnan ninf float @_Z4exp2f(float %arg), !fpmath !0
   ret float %exp2
 }
 
 define <2 x float> @test_exp2_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp2_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan nsz contract <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan nsz contract <2 x float> @llvm.exp2.v2f32(<2 x float> [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[EXP2]]
 ;
   %exp2 = tail call contract nsz nnan <2 x float> @_Z4exp2Dv2_f(<2 x float> %arg), !fpmath !0
   ret <2 x float> %exp2
 }
 
 define float @test_exp2_f32_preserve_flags_md(float %arg) {
 ; CHECK-LABEL: define float @test_exp2_f32_preserve_flags_md
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan ninf float @_Z4exp2f(float [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan ninf float @llvm.exp2.f32(float [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call nnan ninf float @_Z4exp2f(float %arg), !fpmath !0, !foo !1
   ret float %exp2
 }
 
 define <2 x float> @test_exp2_v2f32_preserve_flags_md(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp2_v2f32_preserve_flags_md
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan nsz contract <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan nsz contract <2 x float> @llvm.exp2.v2f32(<2 x float> [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret <2 x float> [[EXP2]]
 ;
   %exp2 = tail call contract nsz nnan <2 x float> @_Z4exp2Dv2_f(<2 x float> %arg), !fpmath !0, !foo !1
   ret <2 x float> %exp2
 }
 
 define float @test_exp2_cr_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_exp2_cr_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call ninf contract float @_Z4exp2f(float [[ARG]])
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call ninf contract float @llvm.exp2.f32(float [[ARG]])
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call ninf contract float @_Z4exp2f(float %arg)
   ret float %exp2
 }
 
 define <2 x float> @test_exp2_cr_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_exp2_cr_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan nsz <2 x float> @_Z4exp2Dv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call nnan nsz <2 x float> @llvm.exp2.v2f32(<2 x float> [[ARG]])
 ; CHECK-NEXT:    ret <2 x float> [[EXP2]]
 ;
   %exp2 = tail call nnan nsz <2 x float> @_Z4exp2Dv2_f(<2 x float> %arg)
   ret <2 x float> %exp2
 }
 
 ; Test the libm name, not a recognized opencl builtin.
 declare float @exp2f(float) #2

 ;
   %exp2 = tail call double @exp2(double %arg), !fpmath !0
   ret double %exp2
 }
 
 define float @test_exp2_f32_fast_noinline(float %arg) {
 ; CHECK-LABEL: define float @test_exp2_f32_fast_noinline
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast float @_Z4exp2f(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast float @_Z4exp2f(float [[ARG]]) #[[ATTR7:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call fast float @_Z4exp2f(float %arg) #3, !fpmath !0
   ret float %exp2
 }
 
 define float @test_exp2_f32_fast_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_exp2_f32_fast_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2:[0-9]+]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast float @_Z4exp2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast float @llvm.exp2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call fast float @_Z4exp2f(float %arg), !fpmath !0
   ret float %exp2
 }
 
 define float @test_exp2_f32_fast_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_exp2_f32_fast_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast float @_Z4exp2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast float @llvm.exp2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call fast float @_Z4exp2f(float %arg), !fpmath !0
   ret float %exp2
 }
 
 define float @test_exp2_f32_nsz_contract_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_exp2_f32_nsz_contract_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call nsz contract float @_Z4exp2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call nsz contract float @llvm.exp2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call nsz contract float @_Z4exp2f(float %arg), !fpmath !0
   ret float %exp2
 }
 
 define float @test_exp2_f32_nsz_contract_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_exp2_f32_nsz_contract_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
 ; CHECK-NEXT:    [[EXP2:%.*]] = tail call nsz contract float @_Z4exp2f(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[EXP2]]
 ;
   %exp2 = tail call nsz contract float @_Z4exp2f(float %arg), !fpmath !0
   ret float %exp2
 }
 
 define half @test_exp2_f16_fast_minsize(half %arg) #5 {
 ; CHECK-LABEL: define half @test_exp2_f16_fast_minsize
 ; CHECK-SAME: (half [[ARG:%.*]]) #[[ATTR3]] {
-; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast half @_Z4exp2Dh(half [[ARG]])
+; CHECK-NEXT:    [[EXP2:%.*]] = tail call fast half @llvm.exp2.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[EXP2]]
 ;
   %exp2 = tail call fast half @_Z4exp2Dh(half %arg)
   ret half %exp2
 }
 
 define float @test_exp2_f32_strictfp(float %arg) #6 {
 ; CHECK-LABEL: define float @test_exp2_f32_strictfp

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fma.ll

 declare <3 x half> @_Z3fmaDv3_DhS_S_(<3 x half>, <3 x half>, <3 x half>)
 declare <4 x half> @_Z3fmaDv4_DhS_S_(<4 x half>, <4 x half>, <4 x half>)
 declare <8 x half> @_Z3fmaDv8_DhS_S_(<8 x half>, <8 x half>, <8 x half>)
 declare <16 x half> @_Z3fmaDv16_DhS_S_(<16 x half>, <16 x half>, <16 x half>)
 
 define float @test_fma_f32(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_fma_f32
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call float @llvm.fma.f32(float [[X]], float [[Y]], float [[Z]])
 ; CHECK-NEXT:    ret float [[FMA]]
 ;
   %fma = tail call float @_Z3fmafff(float %x, float %y, float %z)
   ret float %fma
 }
 
 define <2 x float> @test_fma_v2f32(<2 x float> %x, <2 x float> %y, <2 x float> %z) {
 ; CHECK-LABEL: define <2 x float> @test_fma_v2f32
 ; CHECK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]], <2 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <2 x float> @_Z3fmaDv2_fS_S_(<2 x float> [[X]], <2 x float> [[Y]], <2 x float> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <2 x float> @llvm.fma.v2f32(<2 x float> [[X]], <2 x float> [[Y]], <2 x float> [[Z]])
 ; CHECK-NEXT:    ret <2 x float> [[FMA]]
 ;
   %fma = tail call <2 x float> @_Z3fmaDv2_fS_S_(<2 x float> %x, <2 x float> %y, <2 x float> %z)
   ret <2 x float> %fma
 }
 
 define <3 x float> @test_fma_v3f32(<3 x float> %x, <3 x float> %y, <3 x float> %z) {
 ; CHECK-LABEL: define <3 x float> @test_fma_v3f32
 ; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]], <3 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <3 x float> @_Z3fmaDv3_fS_S_(<3 x float> [[X]], <3 x float> [[Y]], <3 x float> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <3 x float> @llvm.fma.v3f32(<3 x float> [[X]], <3 x float> [[Y]], <3 x float> [[Z]])
 ; CHECK-NEXT:    ret <3 x float> [[FMA]]
 ;
   %fma = tail call <3 x float> @_Z3fmaDv3_fS_S_(<3 x float> %x, <3 x float> %y, <3 x float> %z)
   ret <3 x float> %fma
 }
 
 define <4 x float> @test_fma_v4f32(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
 ; CHECK-LABEL: define <4 x float> @test_fma_v4f32
 ; CHECK-SAME: (<4 x float> [[X:%.*]], <4 x float> [[Y:%.*]], <4 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <4 x float> @_Z3fmaDv4_fS_S_(<4 x float> [[X]], <4 x float> [[Y]], <4 x float> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <4 x float> @llvm.fma.v4f32(<4 x float> [[X]], <4 x float> [[Y]], <4 x float> [[Z]])
 ; CHECK-NEXT:    ret <4 x float> [[FMA]]
 ;
   %fma = tail call <4 x float> @_Z3fmaDv4_fS_S_(<4 x float> %x, <4 x float> %y, <4 x float> %z)
   ret <4 x float> %fma
 }
 
 define <8 x float> @test_fma_v8f32(<8 x float> %x, <8 x float> %y, <8 x float> %z) {
 ; CHECK-LABEL: define <8 x float> @test_fma_v8f32
 ; CHECK-SAME: (<8 x float> [[X:%.*]], <8 x float> [[Y:%.*]], <8 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <8 x float> @_Z3fmaDv8_fS_S_(<8 x float> [[X]], <8 x float> [[Y]], <8 x float> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <8 x float> @llvm.fma.v8f32(<8 x float> [[X]], <8 x float> [[Y]], <8 x float> [[Z]])
 ; CHECK-NEXT:    ret <8 x float> [[FMA]]
 ;
   %fma = tail call <8 x float> @_Z3fmaDv8_fS_S_(<8 x float> %x, <8 x float> %y, <8 x float> %z)
   ret <8 x float> %fma
 }
 
 define <16 x float> @test_fma_v16f32(<16 x float> %x, <16 x float> %y, <16 x float> %z) {
 ; CHECK-LABEL: define <16 x float> @test_fma_v16f32
 ; CHECK-SAME: (<16 x float> [[X:%.*]], <16 x float> [[Y:%.*]], <16 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <16 x float> @_Z3fmaDv16_fS_S_(<16 x float> [[X]], <16 x float> [[Y]], <16 x float> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <16 x float> @llvm.fma.v16f32(<16 x float> [[X]], <16 x float> [[Y]], <16 x float> [[Z]])
 ; CHECK-NEXT:    ret <16 x float> [[FMA]]
 ;
   %fma = tail call <16 x float> @_Z3fmaDv16_fS_S_(<16 x float> %x, <16 x float> %y, <16 x float> %z)
   ret <16 x float> %fma
 }
 
 define double @test_fma_f64(double %x, double %y, double %z) {
 ; CHECK-LABEL: define double @test_fma_f64
 ; CHECK-SAME: (double [[X:%.*]], double [[Y:%.*]], double [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call double @_Z3fmaddd(double [[X]], double [[Y]], double [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call double @llvm.fma.f64(double [[X]], double [[Y]], double [[Z]])
 ; CHECK-NEXT:    ret double [[FMA]]
 ;
   %fma = tail call double @_Z3fmaddd(double %x, double %y, double %z)
   ret double %fma
 }
 
 define <2 x double> @test_fma_v2f64(<2 x double> %x, <2 x double> %y, <2 x double> %z) {
 ; CHECK-LABEL: define <2 x double> @test_fma_v2f64
 ; CHECK-SAME: (<2 x double> [[X:%.*]], <2 x double> [[Y:%.*]], <2 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <2 x double> @_Z3fmaDv2_dS_S_(<2 x double> [[X]], <2 x double> [[Y]], <2 x double> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <2 x double> @llvm.fma.v2f64(<2 x double> [[X]], <2 x double> [[Y]], <2 x double> [[Z]])
 ; CHECK-NEXT:    ret <2 x double> [[FMA]]
 ;
   %fma = tail call <2 x double> @_Z3fmaDv2_dS_S_(<2 x double> %x, <2 x double> %y, <2 x double> %z)
   ret <2 x double> %fma
 }
 
 define <3 x double> @test_fma_v3f64(<3 x double> %x, <3 x double> %y, <3 x double> %z) {
 ; CHECK-LABEL: define <3 x double> @test_fma_v3f64
 ; CHECK-SAME: (<3 x double> [[X:%.*]], <3 x double> [[Y:%.*]], <3 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <3 x double> @_Z3fmaDv3_dS_S_(<3 x double> [[X]], <3 x double> [[Y]], <3 x double> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <3 x double> @llvm.fma.v3f64(<3 x double> [[X]], <3 x double> [[Y]], <3 x double> [[Z]])
 ; CHECK-NEXT:    ret <3 x double> [[FMA]]
 ;
   %fma = tail call <3 x double> @_Z3fmaDv3_dS_S_(<3 x double> %x, <3 x double> %y, <3 x double> %z)
   ret <3 x double> %fma
 }
 
 define <4 x double> @test_fma_v4f64(<4 x double> %x, <4 x double> %y, <4 x double> %z) {
 ; CHECK-LABEL: define <4 x double> @test_fma_v4f64
 ; CHECK-SAME: (<4 x double> [[X:%.*]], <4 x double> [[Y:%.*]], <4 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <4 x double> @_Z3fmaDv4_dS_S_(<4 x double> [[X]], <4 x double> [[Y]], <4 x double> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <4 x double> @llvm.fma.v4f64(<4 x double> [[X]], <4 x double> [[Y]], <4 x double> [[Z]])
 ; CHECK-NEXT:    ret <4 x double> [[FMA]]
 ;
   %fma = tail call <4 x double> @_Z3fmaDv4_dS_S_(<4 x double> %x, <4 x double> %y, <4 x double> %z)
   ret <4 x double> %fma
 }
 
 define <8 x double> @test_fma_v8f64(<8 x double> %x, <8 x double> %y, <8 x double> %z) {
 ; CHECK-LABEL: define <8 x double> @test_fma_v8f64
 ; CHECK-SAME: (<8 x double> [[X:%.*]], <8 x double> [[Y:%.*]], <8 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <8 x double> @_Z3fmaDv8_dS_S_(<8 x double> [[X]], <8 x double> [[Y]], <8 x double> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <8 x double> @llvm.fma.v8f64(<8 x double> [[X]], <8 x double> [[Y]], <8 x double> [[Z]])
 ; CHECK-NEXT:    ret <8 x double> [[FMA]]
 ;
   %fma = tail call <8 x double> @_Z3fmaDv8_dS_S_(<8 x double> %x, <8 x double> %y, <8 x double> %z)
   ret <8 x double> %fma
 }
 
 define <16 x double> @test_fma_v16f64(<16 x double> %x, <16 x double> %y, <16 x double> %z) {
 ; CHECK-LABEL: define <16 x double> @test_fma_v16f64
 ; CHECK-SAME: (<16 x double> [[X:%.*]], <16 x double> [[Y:%.*]], <16 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <16 x double> @_Z3fmaDv16_dS_S_(<16 x double> [[X]], <16 x double> [[Y]], <16 x double> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <16 x double> @llvm.fma.v16f64(<16 x double> [[X]], <16 x double> [[Y]], <16 x double> [[Z]])
 ; CHECK-NEXT:    ret <16 x double> [[FMA]]
 ;
   %fma = tail call <16 x double> @_Z3fmaDv16_dS_S_(<16 x double> %x, <16 x double> %y, <16 x double> %z)
   ret <16 x double> %fma
 }
 
 define half @test_fma_f16(half %x, half %y, half %z) {
 ; CHECK-LABEL: define half @test_fma_f16
 ; CHECK-SAME: (half [[X:%.*]], half [[Y:%.*]], half [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call half @_Z3fmaDhDhDh(half [[X]], half [[Y]], half [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call half @llvm.fma.f16(half [[X]], half [[Y]], half [[Z]])
 ; CHECK-NEXT:    ret half [[FMA]]
 ;
   %fma = tail call half @_Z3fmaDhDhDh(half %x, half %y, half %z)
   ret half %fma
 }
 
 define <2 x half> @test_fma_v2f16(<2 x half> %x, <2 x half> %y, <2 x half> %z) {
 ; CHECK-LABEL: define <2 x half> @test_fma_v2f16
 ; CHECK-SAME: (<2 x half> [[X:%.*]], <2 x half> [[Y:%.*]], <2 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <2 x half> @_Z3fmaDv2_DhS_S_(<2 x half> [[X]], <2 x half> [[Y]], <2 x half> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <2 x half> @llvm.fma.v2f16(<2 x half> [[X]], <2 x half> [[Y]], <2 x half> [[Z]])
 ; CHECK-NEXT:    ret <2 x half> [[FMA]]
 ;
   %fma = tail call <2 x half> @_Z3fmaDv2_DhS_S_(<2 x half> %x, <2 x half> %y, <2 x half> %z)
   ret <2 x half> %fma
 }
 
 define <3 x half> @test_fma_v3f16(<3 x half> %x, <3 x half> %y, <3 x half> %z) {
 ; CHECK-LABEL: define <3 x half> @test_fma_v3f16
 ; CHECK-SAME: (<3 x half> [[X:%.*]], <3 x half> [[Y:%.*]], <3 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <3 x half> @_Z3fmaDv3_DhS_S_(<3 x half> [[X]], <3 x half> [[Y]], <3 x half> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <3 x half> @llvm.fma.v3f16(<3 x half> [[X]], <3 x half> [[Y]], <3 x half> [[Z]])
 ; CHECK-NEXT:    ret <3 x half> [[FMA]]
 ;
   %fma = tail call <3 x half> @_Z3fmaDv3_DhS_S_(<3 x half> %x, <3 x half> %y, <3 x half> %z)
   ret <3 x half> %fma
 }
 
 define <4 x half> @test_fma_v4f16(<4 x half> %x, <4 x half> %y, <4 x half> %z) {
 ; CHECK-LABEL: define <4 x half> @test_fma_v4f16
 ; CHECK-SAME: (<4 x half> [[X:%.*]], <4 x half> [[Y:%.*]], <4 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <4 x half> @_Z3fmaDv4_DhS_S_(<4 x half> [[X]], <4 x half> [[Y]], <4 x half> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <4 x half> @llvm.fma.v4f16(<4 x half> [[X]], <4 x half> [[Y]], <4 x half> [[Z]])
 ; CHECK-NEXT:    ret <4 x half> [[FMA]]
 ;
   %fma = tail call <4 x half> @_Z3fmaDv4_DhS_S_(<4 x half> %x, <4 x half> %y, <4 x half> %z)
   ret <4 x half> %fma
 }
 
 define <8 x half> @test_fma_v8f16(<8 x half> %x, <8 x half> %y, <8 x half> %z) {
 ; CHECK-LABEL: define <8 x half> @test_fma_v8f16
 ; CHECK-SAME: (<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]], <8 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <8 x half> @_Z3fmaDv8_DhS_S_(<8 x half> [[X]], <8 x half> [[Y]], <8 x half> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <8 x half> @llvm.fma.v8f16(<8 x half> [[X]], <8 x half> [[Y]], <8 x half> [[Z]])
 ; CHECK-NEXT:    ret <8 x half> [[FMA]]
 ;
   %fma = tail call <8 x half> @_Z3fmaDv8_DhS_S_(<8 x half> %x, <8 x half> %y, <8 x half> %z)
   ret <8 x half> %fma
 }
 
 define <16 x half> @test_fma_v16f16(<16 x half> %x, <16 x half> %y, <16 x half> %z) {
 ; CHECK-LABEL: define <16 x half> @test_fma_v16f16
 ; CHECK-SAME: (<16 x half> [[X:%.*]], <16 x half> [[Y:%.*]], <16 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call <16 x half> @_Z3fmaDv16_DhS_S_(<16 x half> [[X]], <16 x half> [[Y]], <16 x half> [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call <16 x half> @llvm.fma.v16f16(<16 x half> [[X]], <16 x half> [[Y]], <16 x half> [[Z]])
 ; CHECK-NEXT:    ret <16 x half> [[FMA]]
 ;
   %fma = tail call <16 x half> @_Z3fmaDv16_DhS_S_(<16 x half> %x, <16 x half> %y, <16 x half> %z)
   ret <16 x half> %fma
 }
 
 define float @test_fma_f32_fast(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_fma_f32_fast
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @llvm.fma.f32(float [[X]], float [[Y]], float [[Z]])
 ; CHECK-NEXT:    ret float [[FMA]]
 ;
   %fma = tail call fast float @_Z3fmafff(float %x, float %y, float %z)
   ret float %fma
 }
 
 define float @test_fma_f32_noinline(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_fma_f32_noinline
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR3:[0-9]+]]
 ; CHECK-NEXT:    ret float [[FMA]]
 ;
   %fma = tail call fast float @_Z3fmafff(float %x, float %y, float %z) #1
   ret float %fma
 }
 
 define float @test_fma_f32_fast_minsize(float %x, float %y, float %z) #0 {
 ; CHECK-LABEL: define float @test_fma_f32_fast_minsize
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]])
+; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @llvm.fma.f32(float [[X]], float [[Y]], float [[Z]])
 ; CHECK-NEXT:    ret float [[FMA]]
 ;
   %fma = tail call fast float @_Z3fmafff(float %x, float %y, float %z)
   ret float %fma
 }
 
 define float @test_fma_f32_fast_strictfp(float %x, float %y, float %z) #2 {
 ; CHECK-LABEL: define float @test_fma_f32_fast_strictfp
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) #[[ATTR1:[0-9]+]] {
 ; CHECK-NEXT:    [[FMA:%.*]] = tail call nnan nsz float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR1]]
 ; CHECK-NEXT:    ret float [[FMA]]
 ;
   %fma = tail call nsz nnan float @_Z3fmafff(float %x, float %y, float %z) #2
   ret float %fma
 }
 
 define float @test_fma_f32_fast_nobuiltin(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_fma_f32_fast_nobuiltin
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT:    [[FMA:%.*]] = tail call fast float @_Z3fmafff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR4:[0-9]+]]
 ; CHECK-NEXT:    ret float [[FMA]]
 ;
   %fma = tail call fast float @_Z3fmafff(float %x, float %y, float %z) #3
   ret float %fma
 }
 
 attributes #0 = { minsize }
 attributes #1 = { noinline }
 attributes #2 = { strictfp }
 attributes #3 = { nobuiltin }

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax.ll

 declare <3 x half> @_Z4fmaxDv3_DhS_(<3 x half>, <3 x half>)
 declare <4 x half> @_Z4fmaxDv4_DhS_(<4 x half>, <4 x half>)
 declare <8 x half> @_Z4fmaxDv8_DhS_(<8 x half>, <8 x half>)
 declare <16 x half> @_Z4fmaxDv16_DhS_(<16 x half>, <16 x half>)
 
 define float @test_fmax_f32(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmax_f32
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call float @_Z4fmaxff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call float @llvm.maxnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call float @_Z4fmaxff(float %x, float %y)
   ret float %fmax
 }
 
 define float @test_fmax_f32_nnan(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmax_f32_nnan
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call nnan float @_Z4fmaxff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call nnan float @llvm.maxnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call nnan float @_Z4fmaxff(float %x, float %y)
   ret float %fmax
 }
 
 define <2 x float> @test_fmax_v2f32(<2 x float> %x, <2 x float> %y) {
 ; CHECK-LABEL: define <2 x float> @test_fmax_v2f32
 ; CHECK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <2 x float> @_Z4fmaxDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <2 x float> @llvm.maxnum.v2f32(<2 x float> [[X]], <2 x float> [[Y]])
 ; CHECK-NEXT:    ret <2 x float> [[FMAX]]
 ;
   %fmax = tail call <2 x float> @_Z4fmaxDv2_fS_(<2 x float> %x, <2 x float> %y)
   ret <2 x float> %fmax
 }
 
 define <3 x float> @test_fmax_v3f32(<3 x float> %x, <3 x float> %y) {
 ; CHECK-LABEL: define <3 x float> @test_fmax_v3f32
 ; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <3 x float> @_Z4fmaxDv3_fS_(<3 x float> [[X]], <3 x float> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <3 x float> @llvm.maxnum.v3f32(<3 x float> [[X]], <3 x float> [[Y]])
 ; CHECK-NEXT:    ret <3 x float> [[FMAX]]
 ;
   %fmax = tail call <3 x float> @_Z4fmaxDv3_fS_(<3 x float> %x, <3 x float> %y)
   ret <3 x float> %fmax
 }
 
 define <4 x float> @test_fmax_v4f32(<4 x float> %x, <4 x float> %y) {
 ; CHECK-LABEL: define <4 x float> @test_fmax_v4f32
 ; CHECK-SAME: (<4 x float> [[X:%.*]], <4 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <4 x float> @_Z4fmaxDv4_fS_(<4 x float> [[X]], <4 x float> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[X]], <4 x float> [[Y]])
 ; CHECK-NEXT:    ret <4 x float> [[FMAX]]
 ;
   %fmax = tail call <4 x float> @_Z4fmaxDv4_fS_(<4 x float> %x, <4 x float> %y)
   ret <4 x float> %fmax
 }
 
 define <8 x float> @test_fmax_v8f32(<8 x float> %x, <8 x float> %y) {
 ; CHECK-LABEL: define <8 x float> @test_fmax_v8f32
 ; CHECK-SAME: (<8 x float> [[X:%.*]], <8 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <8 x float> @_Z4fmaxDv8_fS_(<8 x float> [[X]], <8 x float> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <8 x float> @llvm.maxnum.v8f32(<8 x float> [[X]], <8 x float> [[Y]])
 ; CHECK-NEXT:    ret <8 x float> [[FMAX]]
 ;
   %fmax = tail call <8 x float> @_Z4fmaxDv8_fS_(<8 x float> %x, <8 x float> %y)
   ret <8 x float> %fmax
 }
 
 define <16 x float> @test_fmax_v16f32(<16 x float> %x, <16 x float> %y) {
 ; CHECK-LABEL: define <16 x float> @test_fmax_v16f32
 ; CHECK-SAME: (<16 x float> [[X:%.*]], <16 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <16 x float> @_Z4fmaxDv16_fS_(<16 x float> [[X]], <16 x float> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <16 x float> @llvm.maxnum.v16f32(<16 x float> [[X]], <16 x float> [[Y]])
 ; CHECK-NEXT:    ret <16 x float> [[FMAX]]
 ;
   %fmax = tail call <16 x float> @_Z4fmaxDv16_fS_(<16 x float> %x, <16 x float> %y)
   ret <16 x float> %fmax
 }
 
 define double @test_fmax_f64(double %x, double %y) {
 ; CHECK-LABEL: define double @test_fmax_f64
 ; CHECK-SAME: (double [[X:%.*]], double [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call double @_Z4fmaxdd(double [[X]], double [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call double @llvm.maxnum.f64(double [[X]], double [[Y]])
 ; CHECK-NEXT:    ret double [[FMAX]]
 ;
   %fmax = tail call double @_Z4fmaxdd(double %x, double %y)
   ret double %fmax
 }
 
 define <2 x double> @test_fmax_v2f64(<2 x double> %x, <2 x double> %y) {
 ; CHECK-LABEL: define <2 x double> @test_fmax_v2f64
 ; CHECK-SAME: (<2 x double> [[X:%.*]], <2 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <2 x double> @_Z4fmaxDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <2 x double> @llvm.maxnum.v2f64(<2 x double> [[X]], <2 x double> [[Y]])
 ; CHECK-NEXT:    ret <2 x double> [[FMAX]]
 ;
   %fmax = tail call <2 x double> @_Z4fmaxDv2_dS_(<2 x double> %x, <2 x double> %y)
   ret <2 x double> %fmax
 }
 
 define <3 x double> @test_fmax_v3f64(<3 x double> %x, <3 x double> %y) {
 ; CHECK-LABEL: define <3 x double> @test_fmax_v3f64
 ; CHECK-SAME: (<3 x double> [[X:%.*]], <3 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <3 x double> @_Z4fmaxDv3_dS_(<3 x double> [[X]], <3 x double> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <3 x double> @llvm.maxnum.v3f64(<3 x double> [[X]], <3 x double> [[Y]])
 ; CHECK-NEXT:    ret <3 x double> [[FMAX]]
 ;
   %fmax = tail call <3 x double> @_Z4fmaxDv3_dS_(<3 x double> %x, <3 x double> %y)
   ret <3 x double> %fmax
 }
 
 define <4 x double> @test_fmax_v4f64(<4 x double> %x, <4 x double> %y) {
 ; CHECK-LABEL: define <4 x double> @test_fmax_v4f64
 ; CHECK-SAME: (<4 x double> [[X:%.*]], <4 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <4 x double> @_Z4fmaxDv4_dS_(<4 x double> [[X]], <4 x double> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <4 x double> @llvm.maxnum.v4f64(<4 x double> [[X]], <4 x double> [[Y]])
 ; CHECK-NEXT:    ret <4 x double> [[FMAX]]
 ;
   %fmax = tail call <4 x double> @_Z4fmaxDv4_dS_(<4 x double> %x, <4 x double> %y)
   ret <4 x double> %fmax
 }
 
 define <8 x double> @test_fmax_v8f64(<8 x double> %x, <8 x double> %y) {
 ; CHECK-LABEL: define <8 x double> @test_fmax_v8f64
 ; CHECK-SAME: (<8 x double> [[X:%.*]], <8 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <8 x double> @_Z4fmaxDv8_dS_(<8 x double> [[X]], <8 x double> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <8 x double> @llvm.maxnum.v8f64(<8 x double> [[X]], <8 x double> [[Y]])
 ; CHECK-NEXT:    ret <8 x double> [[FMAX]]
 ;
   %fmax = tail call <8 x double> @_Z4fmaxDv8_dS_(<8 x double> %x, <8 x double> %y)
   ret <8 x double> %fmax
 }
 
 define <16 x double> @test_fmax_v16f64(<16 x double> %x, <16 x double> %y) {
 ; CHECK-LABEL: define <16 x double> @test_fmax_v16f64
 ; CHECK-SAME: (<16 x double> [[X:%.*]], <16 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <16 x double> @_Z4fmaxDv16_dS_(<16 x double> [[X]], <16 x double> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <16 x double> @llvm.maxnum.v16f64(<16 x double> [[X]], <16 x double> [[Y]])
 ; CHECK-NEXT:    ret <16 x double> [[FMAX]]
 ;
   %fmax = tail call <16 x double> @_Z4fmaxDv16_dS_(<16 x double> %x, <16 x double> %y)
   ret <16 x double> %fmax
 }
 
 define half @test_fmax_f16(half %x, half %y) {
 ; CHECK-LABEL: define half @test_fmax_f16
 ; CHECK-SAME: (half [[X:%.*]], half [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call half @_Z4fmaxDhDh(half [[X]], half [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call half @llvm.maxnum.f16(half [[X]], half [[Y]])
 ; CHECK-NEXT:    ret half [[FMAX]]
 ;
   %fmax = tail call half @_Z4fmaxDhDh(half %x, half %y)
   ret half %fmax
 }
 
 define <2 x half> @test_fmax_v2f16(<2 x half> %x, <2 x half> %y) {
 ; CHECK-LABEL: define <2 x half> @test_fmax_v2f16
 ; CHECK-SAME: (<2 x half> [[X:%.*]], <2 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <2 x half> @_Z4fmaxDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> [[X]], <2 x half> [[Y]])
 ; CHECK-NEXT:    ret <2 x half> [[FMAX]]
 ;
   %fmax = tail call <2 x half> @_Z4fmaxDv2_DhS_(<2 x half> %x, <2 x half> %y)
   ret <2 x half> %fmax
 }
 
 define <3 x half> @test_fmax_v3f16(<3 x half> %x, <3 x half> %y) {
 ; CHECK-LABEL: define <3 x half> @test_fmax_v3f16
 ; CHECK-SAME: (<3 x half> [[X:%.*]], <3 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <3 x half> @_Z4fmaxDv3_DhS_(<3 x half> [[X]], <3 x half> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <3 x half> @llvm.maxnum.v3f16(<3 x half> [[X]], <3 x half> [[Y]])
 ; CHECK-NEXT:    ret <3 x half> [[FMAX]]
 ;
   %fmax = tail call <3 x half> @_Z4fmaxDv3_DhS_(<3 x half> %x, <3 x half> %y)
   ret <3 x half> %fmax
 }
 
 define <4 x half> @test_fmax_v4f16(<4 x half> %x, <4 x half> %y) {
 ; CHECK-LABEL: define <4 x half> @test_fmax_v4f16
 ; CHECK-SAME: (<4 x half> [[X:%.*]], <4 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <4 x half> @_Z4fmaxDv4_DhS_(<4 x half> [[X]], <4 x half> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <4 x half> @llvm.maxnum.v4f16(<4 x half> [[X]], <4 x half> [[Y]])
 ; CHECK-NEXT:    ret <4 x half> [[FMAX]]
 ;
   %fmax = tail call <4 x half> @_Z4fmaxDv4_DhS_(<4 x half> %x, <4 x half> %y)
   ret <4 x half> %fmax
 }
 
 define <8 x half> @test_fmax_v8f16(<8 x half> %x, <8 x half> %y) {
 ; CHECK-LABEL: define <8 x half> @test_fmax_v8f16
 ; CHECK-SAME: (<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <8 x half> @_Z4fmaxDv8_DhS_(<8 x half> [[X]], <8 x half> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <8 x half> @llvm.maxnum.v8f16(<8 x half> [[X]], <8 x half> [[Y]])
 ; CHECK-NEXT:    ret <8 x half> [[FMAX]]
 ;
   %fmax = tail call <8 x half> @_Z4fmaxDv8_DhS_(<8 x half> %x, <8 x half> %y)
   ret <8 x half> %fmax
 }
 
 define <16 x half> @test_fmax_v16f16(<16 x half> %x, <16 x half> %y) {
 ; CHECK-LABEL: define <16 x half> @test_fmax_v16f16
 ; CHECK-SAME: (<16 x half> [[X:%.*]], <16 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call <16 x half> @_Z4fmaxDv16_DhS_(<16 x half> [[X]], <16 x half> [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call <16 x half> @llvm.maxnum.v16f16(<16 x half> [[X]], <16 x half> [[Y]])
 ; CHECK-NEXT:    ret <16 x half> [[FMAX]]
 ;
   %fmax = tail call <16 x half> @_Z4fmaxDv16_DhS_(<16 x half> %x, <16 x half> %y)
   ret <16 x half> %fmax
 }
 
 define float @test_fmax_f32_minsize(float %x, float %y) #0 {
 ; CHECK-LABEL: define float @test_fmax_f32_minsize
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call float @_Z4fmaxff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call float @llvm.maxnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call float @_Z4fmaxff(float %x, float %y)
   ret float %fmax
 }
 
 define float @test_fmax_f32_nnan_minsize(float %x, float %y) #0 {
 ; CHECK-LABEL: define float @test_fmax_f32_nnan_minsize
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call nnan float @_Z4fmaxff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call nnan float @llvm.maxnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call nnan float @_Z4fmaxff(float %x, float %y)
   ret float %fmax
 }
 
 define float @test_fmax_f32_noinline(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmax_f32_noinline
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call float @_Z4fmaxff(float [[X]], float [[Y]]) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call float @_Z4fmaxff(float [[X]], float [[Y]]) #[[ATTR3:[0-9]+]]
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call float @_Z4fmaxff(float %x, float %y) #1
   ret float %fmax
 }
 
 define float @test_fmax_f32_nnan_noinline(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmax_f32_nnan_noinline
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call nnan float @_Z4fmaxff(float [[X]], float [[Y]]) #[[ATTR2]]
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call nnan float @_Z4fmaxff(float [[X]], float [[Y]]) #[[ATTR3]]
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call nnan float @_Z4fmaxff(float %x, float %y) #1
   ret float %fmax
 }
 
 define float @test_fmax_f32_strictfp(float %x, float %y) #2 {
 ; CHECK-LABEL: define float @test_fmax_f32_strictfp
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR1:[0-9]+]] {
 ; CHECK-NEXT:    [[FMAX:%.*]] = tail call nnan nsz float @_Z4fmaxff(float [[X]], float [[Y]]) #[[ATTR1]]
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call nsz nnan float @_Z4fmaxff(float %x, float %y) #2
   ret float %fmax
 }
 
 define float @test_fmax_f32_fast_nobuiltin(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmax_f32_fast_nobuiltin
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMAX:%.*]] = tail call fast float @_Z4fmaxff(float [[X]], float [[Y]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT:    [[FMAX:%.*]] = tail call fast float @_Z4fmaxff(float [[X]], float [[Y]]) #[[ATTR4:[0-9]+]]
 ; CHECK-NEXT:    ret float [[FMAX]]
 ;
   %fmax = tail call fast float @_Z4fmaxff(float %x, float %y) #3
   ret float %fmax
 }
 
 attributes #0 = { minsize }
 attributes #1 = { noinline }
 attributes #2 = { strictfp }
 attributes #3 = { nobuiltin }

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin.ll

 declare <3 x half> @_Z4fminDv3_DhS_(<3 x half>, <3 x half>)
 declare <4 x half> @_Z4fminDv4_DhS_(<4 x half>, <4 x half>)
 declare <8 x half> @_Z4fminDv8_DhS_(<8 x half>, <8 x half>)
 declare <16 x half> @_Z4fminDv16_DhS_(<16 x half>, <16 x half>)
 
 define float @test_fmin_f32(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmin_f32
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call float @_Z4fminff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call float @llvm.minnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call float @_Z4fminff(float %x, float %y)
   ret float %fmin
 }
 
 define float @test_fmin_f32_nnan(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmin_f32_nnan
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call nnan float @_Z4fminff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call nnan float @llvm.minnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call nnan float @_Z4fminff(float %x, float %y)
   ret float %fmin
 }
 
 define <2 x float> @test_fmin_v2f32(<2 x float> %x, <2 x float> %y) {
 ; CHECK-LABEL: define <2 x float> @test_fmin_v2f32
 ; CHECK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <2 x float> @_Z4fminDv2_fS_(<2 x float> [[X]], <2 x float> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <2 x float> @llvm.minnum.v2f32(<2 x float> [[X]], <2 x float> [[Y]])
 ; CHECK-NEXT:    ret <2 x float> [[FMIN]]
 ;
   %fmin = tail call <2 x float> @_Z4fminDv2_fS_(<2 x float> %x, <2 x float> %y)
   ret <2 x float> %fmin
 }
 
 define <3 x float> @test_fmin_v3f32(<3 x float> %x, <3 x float> %y) {
 ; CHECK-LABEL: define <3 x float> @test_fmin_v3f32
 ; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <3 x float> @_Z4fminDv3_fS_(<3 x float> [[X]], <3 x float> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <3 x float> @llvm.minnum.v3f32(<3 x float> [[X]], <3 x float> [[Y]])
 ; CHECK-NEXT:    ret <3 x float> [[FMIN]]
 ;
   %fmin = tail call <3 x float> @_Z4fminDv3_fS_(<3 x float> %x, <3 x float> %y)
   ret <3 x float> %fmin
 }
 
 define <4 x float> @test_fmin_v4f32(<4 x float> %x, <4 x float> %y) {
 ; CHECK-LABEL: define <4 x float> @test_fmin_v4f32
 ; CHECK-SAME: (<4 x float> [[X:%.*]], <4 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <4 x float> @_Z4fminDv4_fS_(<4 x float> [[X]], <4 x float> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <4 x float> @llvm.minnum.v4f32(<4 x float> [[X]], <4 x float> [[Y]])
 ; CHECK-NEXT:    ret <4 x float> [[FMIN]]
 ;
   %fmin = tail call <4 x float> @_Z4fminDv4_fS_(<4 x float> %x, <4 x float> %y)
   ret <4 x float> %fmin
 }
 
 define <8 x float> @test_fmin_v8f32(<8 x float> %x, <8 x float> %y) {
 ; CHECK-LABEL: define <8 x float> @test_fmin_v8f32
 ; CHECK-SAME: (<8 x float> [[X:%.*]], <8 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <8 x float> @_Z4fminDv8_fS_(<8 x float> [[X]], <8 x float> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <8 x float> @llvm.minnum.v8f32(<8 x float> [[X]], <8 x float> [[Y]])
 ; CHECK-NEXT:    ret <8 x float> [[FMIN]]
 ;
   %fmin = tail call <8 x float> @_Z4fminDv8_fS_(<8 x float> %x, <8 x float> %y)
   ret <8 x float> %fmin
 }
 
 define <16 x float> @test_fmin_v16f32(<16 x float> %x, <16 x float> %y) {
 ; CHECK-LABEL: define <16 x float> @test_fmin_v16f32
 ; CHECK-SAME: (<16 x float> [[X:%.*]], <16 x float> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <16 x float> @_Z4fminDv16_fS_(<16 x float> [[X]], <16 x float> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <16 x float> @llvm.minnum.v16f32(<16 x float> [[X]], <16 x float> [[Y]])
 ; CHECK-NEXT:    ret <16 x float> [[FMIN]]
 ;
   %fmin = tail call <16 x float> @_Z4fminDv16_fS_(<16 x float> %x, <16 x float> %y)
   ret <16 x float> %fmin
 }
 
 define double @test_fmin_f64(double %x, double %y) {
 ; CHECK-LABEL: define double @test_fmin_f64
 ; CHECK-SAME: (double [[X:%.*]], double [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call double @_Z4fmindd(double [[X]], double [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call double @llvm.minnum.f64(double [[X]], double [[Y]])
 ; CHECK-NEXT:    ret double [[FMIN]]
 ;
   %fmin = tail call double @_Z4fmindd(double %x, double %y)
   ret double %fmin
 }
 
 define <2 x double> @test_fmin_v2f64(<2 x double> %x, <2 x double> %y) {
 ; CHECK-LABEL: define <2 x double> @test_fmin_v2f64
 ; CHECK-SAME: (<2 x double> [[X:%.*]], <2 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <2 x double> @_Z4fminDv2_dS_(<2 x double> [[X]], <2 x double> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <2 x double> @llvm.minnum.v2f64(<2 x double> [[X]], <2 x double> [[Y]])
 ; CHECK-NEXT:    ret <2 x double> [[FMIN]]
 ;
   %fmin = tail call <2 x double> @_Z4fminDv2_dS_(<2 x double> %x, <2 x double> %y)
   ret <2 x double> %fmin
 }
 
 define <3 x double> @test_fmin_v3f64(<3 x double> %x, <3 x double> %y) {
 ; CHECK-LABEL: define <3 x double> @test_fmin_v3f64
 ; CHECK-SAME: (<3 x double> [[X:%.*]], <3 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <3 x double> @_Z4fminDv3_dS_(<3 x double> [[X]], <3 x double> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <3 x double> @llvm.minnum.v3f64(<3 x double> [[X]], <3 x double> [[Y]])
 ; CHECK-NEXT:    ret <3 x double> [[FMIN]]
 ;
   %fmin = tail call <3 x double> @_Z4fminDv3_dS_(<3 x double> %x, <3 x double> %y)
   ret <3 x double> %fmin
 }
 
 define <4 x double> @test_fmin_v4f64(<4 x double> %x, <4 x double> %y) {
 ; CHECK-LABEL: define <4 x double> @test_fmin_v4f64
 ; CHECK-SAME: (<4 x double> [[X:%.*]], <4 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <4 x double> @_Z4fminDv4_dS_(<4 x double> [[X]], <4 x double> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <4 x double> @llvm.minnum.v4f64(<4 x double> [[X]], <4 x double> [[Y]])
 ; CHECK-NEXT:    ret <4 x double> [[FMIN]]
 ;
   %fmin = tail call <4 x double> @_Z4fminDv4_dS_(<4 x double> %x, <4 x double> %y)
   ret <4 x double> %fmin
 }
 
 define <8 x double> @test_fmin_v8f64(<8 x double> %x, <8 x double> %y) {
 ; CHECK-LABEL: define <8 x double> @test_fmin_v8f64
 ; CHECK-SAME: (<8 x double> [[X:%.*]], <8 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <8 x double> @_Z4fminDv8_dS_(<8 x double> [[X]], <8 x double> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <8 x double> @llvm.minnum.v8f64(<8 x double> [[X]], <8 x double> [[Y]])
 ; CHECK-NEXT:    ret <8 x double> [[FMIN]]
 ;
   %fmin = tail call <8 x double> @_Z4fminDv8_dS_(<8 x double> %x, <8 x double> %y)
   ret <8 x double> %fmin
 }
 
 define <16 x double> @test_fmin_v16f64(<16 x double> %x, <16 x double> %y) {
 ; CHECK-LABEL: define <16 x double> @test_fmin_v16f64
 ; CHECK-SAME: (<16 x double> [[X:%.*]], <16 x double> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <16 x double> @_Z4fminDv16_dS_(<16 x double> [[X]], <16 x double> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <16 x double> @llvm.minnum.v16f64(<16 x double> [[X]], <16 x double> [[Y]])
 ; CHECK-NEXT:    ret <16 x double> [[FMIN]]
 ;
   %fmin = tail call <16 x double> @_Z4fminDv16_dS_(<16 x double> %x, <16 x double> %y)
   ret <16 x double> %fmin
 }
 
 define half @test_fmin_f16(half %x, half %y) {
 ; CHECK-LABEL: define half @test_fmin_f16
 ; CHECK-SAME: (half [[X:%.*]], half [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call half @_Z4fminDhDh(half [[X]], half [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call half @llvm.minnum.f16(half [[X]], half [[Y]])
 ; CHECK-NEXT:    ret half [[FMIN]]
 ;
   %fmin = tail call half @_Z4fminDhDh(half %x, half %y)
   ret half %fmin
 }
 
 define <2 x half> @test_fmin_v2f16(<2 x half> %x, <2 x half> %y) {
 ; CHECK-LABEL: define <2 x half> @test_fmin_v2f16
 ; CHECK-SAME: (<2 x half> [[X:%.*]], <2 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <2 x half> @_Z4fminDv2_DhS_(<2 x half> [[X]], <2 x half> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <2 x half> @llvm.minnum.v2f16(<2 x half> [[X]], <2 x half> [[Y]])
 ; CHECK-NEXT:    ret <2 x half> [[FMIN]]
 ;
   %fmin = tail call <2 x half> @_Z4fminDv2_DhS_(<2 x half> %x, <2 x half> %y)
   ret <2 x half> %fmin
 }
 
 define <3 x half> @test_fmin_v3f16(<3 x half> %x, <3 x half> %y) {
 ; CHECK-LABEL: define <3 x half> @test_fmin_v3f16
 ; CHECK-SAME: (<3 x half> [[X:%.*]], <3 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <3 x half> @_Z4fminDv3_DhS_(<3 x half> [[X]], <3 x half> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <3 x half> @llvm.minnum.v3f16(<3 x half> [[X]], <3 x half> [[Y]])
 ; CHECK-NEXT:    ret <3 x half> [[FMIN]]
 ;
   %fmin = tail call <3 x half> @_Z4fminDv3_DhS_(<3 x half> %x, <3 x half> %y)
   ret <3 x half> %fmin
 }
 
 define <4 x half> @test_fmin_v4f16(<4 x half> %x, <4 x half> %y) {
 ; CHECK-LABEL: define <4 x half> @test_fmin_v4f16
 ; CHECK-SAME: (<4 x half> [[X:%.*]], <4 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <4 x half> @_Z4fminDv4_DhS_(<4 x half> [[X]], <4 x half> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <4 x half> @llvm.minnum.v4f16(<4 x half> [[X]], <4 x half> [[Y]])
 ; CHECK-NEXT:    ret <4 x half> [[FMIN]]
 ;
   %fmin = tail call <4 x half> @_Z4fminDv4_DhS_(<4 x half> %x, <4 x half> %y)
   ret <4 x half> %fmin
 }
 
 define <8 x half> @test_fmin_v8f16(<8 x half> %x, <8 x half> %y) {
 ; CHECK-LABEL: define <8 x half> @test_fmin_v8f16
 ; CHECK-SAME: (<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <8 x half> @_Z4fminDv8_DhS_(<8 x half> [[X]], <8 x half> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <8 x half> @llvm.minnum.v8f16(<8 x half> [[X]], <8 x half> [[Y]])
 ; CHECK-NEXT:    ret <8 x half> [[FMIN]]
 ;
   %fmin = tail call <8 x half> @_Z4fminDv8_DhS_(<8 x half> %x, <8 x half> %y)
   ret <8 x half> %fmin
 }
 
 define <16 x half> @test_fmin_v16f16(<16 x half> %x, <16 x half> %y) {
 ; CHECK-LABEL: define <16 x half> @test_fmin_v16f16
 ; CHECK-SAME: (<16 x half> [[X:%.*]], <16 x half> [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call <16 x half> @_Z4fminDv16_DhS_(<16 x half> [[X]], <16 x half> [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call <16 x half> @llvm.minnum.v16f16(<16 x half> [[X]], <16 x half> [[Y]])
 ; CHECK-NEXT:    ret <16 x half> [[FMIN]]
 ;
   %fmin = tail call <16 x half> @_Z4fminDv16_DhS_(<16 x half> %x, <16 x half> %y)
   ret <16 x half> %fmin
 }
 
 define float @test_fmin_f32_minsize(float %x, float %y) #0 {
 ; CHECK-LABEL: define float @test_fmin_f32_minsize
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call float @_Z4fminff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call float @llvm.minnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call float @_Z4fminff(float %x, float %y)
   ret float %fmin
 }
 
 define float @test_fmin_f32_nnan_minsize(float %x, float %y) #0 {
 ; CHECK-LABEL: define float @test_fmin_f32_nnan_minsize
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call nnan float @_Z4fminff(float [[X]], float [[Y]])
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call nnan float @llvm.minnum.f32(float [[X]], float [[Y]])
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call nnan float @_Z4fminff(float %x, float %y)
   ret float %fmin
 }
 
 define float @test_fmin_f32_noinline(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmin_f32_noinline
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call float @_Z4fminff(float [[X]], float [[Y]]) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call float @_Z4fminff(float [[X]], float [[Y]]) #[[ATTR3:[0-9]+]]
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call float @_Z4fminff(float %x, float %y) #1
   ret float %fmin
 }
 
 define float @test_fmin_f32_nnan_noinline(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmin_f32_nnan_noinline
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call nnan float @_Z4fminff(float [[X]], float [[Y]]) #[[ATTR2]]
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call nnan float @_Z4fminff(float [[X]], float [[Y]]) #[[ATTR3]]
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call nnan float @_Z4fminff(float %x, float %y) #1
   ret float %fmin
 }
 
 define float @test_fmin_f32_strictfp(float %x, float %y) #2 {
 ; CHECK-LABEL: define float @test_fmin_f32_strictfp
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) #[[ATTR1:[0-9]+]] {
 ; CHECK-NEXT:    [[FMIN:%.*]] = tail call nnan nsz float @_Z4fminff(float [[X]], float [[Y]]) #[[ATTR1]]
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call nsz nnan float @_Z4fminff(float %x, float %y) #2
   ret float %fmin
 }
 
 define float @test_fmin_f32_fast_nobuiltin(float %x, float %y) {
 ; CHECK-LABEL: define float @test_fmin_f32_fast_nobuiltin
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]]) {
-; CHECK-NEXT:    [[FMIN:%.*]] = tail call fast float @_Z4fminff(float [[X]], float [[Y]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT:    [[FMIN:%.*]] = tail call fast float @_Z4fminff(float [[X]], float [[Y]]) #[[ATTR4:[0-9]+]]
 ; CHECK-NEXT:    ret float [[FMIN]]
 ;
   %fmin = tail call fast float @_Z4fminff(float %x, float %y) #3
   ret float %fmin
 }
 
 attributes #0 = { minsize }
 attributes #1 = { noinline }
 attributes #2 = { strictfp }
 attributes #3 = { nobuiltin }

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log.ll

 ;
   %log = tail call half @_Z3logDh(half %arg)
   ret half %log
 }
 
 define half @test_log_f16_fast(half %arg) {
 ; CHECK-LABEL: define half @test_log_f16_fast
 ; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call fast half @_Z3logDh(half [[ARG]])
+; CHECK-NEXT:    [[LOG:%.*]] = tail call fast half @llvm.log.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[LOG]]
 ;
   %log = tail call fast half @_Z3logDh(half %arg)
   ret half %log
 }
 
 define <2 x half> @test_log_v2f16(<2 x half> %arg) {
 ; CHECK-LABEL: define <2 x half> @test_log_v2f16

 ;
   %log = tail call <16 x half> @_Z3logDv16_Dh(<16 x half> %arg)
   ret <16 x half> %log
 }
 
 define float @test_log_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_log_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR5:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call float @_Z3logf(float %arg) #0, !fpmath !0
   ret float %log
 }
 
 define <2 x float> @test_log_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG]]
 ;
   %log = tail call <2 x float> @_Z3logDv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %log
 }
 
 define float @test_log_cr_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_log_cr_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call float @_Z3logf(float %arg) #0
   ret float %log
 }
 
 define <2 x float> @test_log_cr_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log_cr_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[LOG]]
 ;
   %log = tail call <2 x float> @_Z3logDv2_f(<2 x float> %arg) #0
   ret <2 x float> %log
 }
 
 ; "no-builtins" should be ignored
 define float @test_log_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_log_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call float @_Z3logf(float %arg) #0, !fpmath !0
   ret float %log
 }
 
 define <2 x float> @test_log_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_log_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG]]
 ;
   %log = tail call <2 x float> @_Z3logDv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %log
 }
 
 define float @test_log_cr_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_log_cr_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG:%.*]] = tail call float @_Z3logf(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call float @_Z3logf(float %arg) #0
   ret float %log
 }
 
 define <2 x float> @test_log_cr_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_log_cr_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG:%.*]] = tail call <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[LOG]]
 ;
   %log = tail call <2 x float> @_Z3logDv2_f(<2 x float> %arg) #0
   ret <2 x float> %log
 }
 
 define float @test_log_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_log_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan ninf float @_Z3logf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan ninf float @llvm.log.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call nnan ninf float @_Z3logf(float %arg), !fpmath !0
   ret float %log
 }
 
 define <2 x float> @test_log_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan nsz contract <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan nsz contract <2 x float> @llvm.log.v2f32(<2 x float> [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG]]
 ;
   %log = tail call contract nsz nnan <2 x float> @_Z3logDv2_f(<2 x float> %arg), !fpmath !0
   ret <2 x float> %log
 }
 
 define float @test_log_f32_preserve_flags_md(float %arg) {
 ; CHECK-LABEL: define float @test_log_f32_preserve_flags_md
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan ninf float @_Z3logf(float [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan ninf float @llvm.log.f32(float [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call nnan ninf float @_Z3logf(float %arg), !fpmath !0, !foo !1
   ret float %log
 }
 
 define <2 x float> @test_log_v2f32_preserve_flags_md(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log_v2f32_preserve_flags_md
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan nsz contract <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan nsz contract <2 x float> @llvm.log.v2f32(<2 x float> [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret <2 x float> [[LOG]]
 ;
   %log = tail call contract nsz nnan <2 x float> @_Z3logDv2_f(<2 x float> %arg), !fpmath !0, !foo !1
   ret <2 x float> %log
 }
 
 define float @test_log_cr_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_log_cr_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call ninf contract float @_Z3logf(float [[ARG]])
+; CHECK-NEXT:    [[LOG:%.*]] = tail call ninf contract float @llvm.log.f32(float [[ARG]])
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call ninf contract float @_Z3logf(float %arg)
   ret float %log
 }
 
 define <2 x float> @test_log_cr_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log_cr_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan nsz <2 x float> @_Z3logDv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT:    [[LOG:%.*]] = tail call nnan nsz <2 x float> @llvm.log.v2f32(<2 x float> [[ARG]])
 ; CHECK-NEXT:    ret <2 x float> [[LOG]]
 ;
   %log = tail call nnan nsz <2 x float> @_Z3logDv2_f(<2 x float> %arg)
   ret <2 x float> %log
 }
 
 ; Test the libm name, not a recognized opencl builtin.
 declare float @logf(float) #2

 ;
   %log = tail call double @log(double %arg), !fpmath !0
   ret double %log
 }
 
 define float @test_log_f32_fast_noinline(float %arg) {
 ; CHECK-LABEL: define float @test_log_f32_fast_noinline
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call fast float @_Z3logf(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call fast float @_Z3logf(float [[ARG]]) #[[ATTR7:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call fast float @_Z3logf(float %arg) #3, !fpmath !0
   ret float %log
 }
 
 define float @test_log_f32_fast_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_log_f32_fast_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2:[0-9]+]] {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call fast float @_Z3logf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call fast float @llvm.log.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call fast float @_Z3logf(float %arg), !fpmath !0
   ret float %log
 }
 
 define float @test_log_f32_fast_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_log_f32_fast_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call fast float @_Z3logf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call fast float @llvm.log.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call fast float @_Z3logf(float %arg), !fpmath !0
   ret float %log
 }
 
 define float @test_log_f32_nsz_contract_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_log_f32_nsz_contract_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT:    [[LOG:%.*]] = tail call nsz contract float @_Z3logf(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG:%.*]] = tail call nsz contract float @llvm.log.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG]]
 ;
   %log = tail call nsz contract float @_Z3logf(float %arg), !fpmath !0
   ret float %log
 }
 
 define float @test_log_f32_nsz_contract_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_log_f32_nsz_contract_minsize

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log10.ll

 ;
   %log10 = tail call half @_Z5log10Dh(half %arg)
   ret half %log10
 }
 
 define half @test_log10_f16_fast(half %arg) {
 ; CHECK-LABEL: define half @test_log10_f16_fast
 ; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast half @_Z5log10Dh(half [[ARG]])
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast half @llvm.log10.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[LOG10]]
 ;
   %log10 = tail call fast half @_Z5log10Dh(half %arg)
   ret half %log10
 }
 
 define <2 x half> @test_log10_v2f16(<2 x half> %arg) {
 ; CHECK-LABEL: define <2 x half> @test_log10_v2f16

 ;
   %log10 = tail call <16 x half> @_Z5log10Dv16_Dh(<16 x half> %arg)
   ret <16 x half> %log10
 }
 
 define float @test_log10_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_log10_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR5:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call float @_Z5log10f(float %arg) #0, !fpmath !0
   ret float %log10
 }
 
 define <2 x float> @test_log10_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log10_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG10]]
 ;
   %log10 = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %log10
 }
 
 define float @test_log10_cr_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_log10_cr_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call float @_Z5log10f(float %arg) #0
   ret float %log10
 }
 
 define <2 x float> @test_log10_cr_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log10_cr_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[LOG10]]
 ;
   %log10 = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> %arg) #0
   ret <2 x float> %log10
 }
 
 ; "no-builtins" should be ignored
 define float @test_log10_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_log10_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call float @_Z5log10f(float %arg) #0, !fpmath !0
   ret float %log10
 }
 
 define <2 x float> @test_log10_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_log10_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG10]]
 ;
   %log10 = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %log10
 }
 
 define float @test_log10_cr_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_log10_cr_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call float @_Z5log10f(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call float @_Z5log10f(float %arg) #0
   ret float %log10
 }
 
 define <2 x float> @test_log10_cr_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_log10_cr_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[LOG10]]
 ;
   %log10 = tail call <2 x float> @_Z5log10Dv2_f(<2 x float> %arg) #0
   ret <2 x float> %log10
 }
 
 define float @test_log10_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_log10_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan ninf float @_Z5log10f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan ninf float @llvm.log10.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call nnan ninf float @_Z5log10f(float %arg), !fpmath !0
   ret float %log10
 }
 
 define <2 x float> @test_log10_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log10_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan nsz contract <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan nsz contract <2 x float> @llvm.log10.v2f32(<2 x float> [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG10]]
 ;
   %log10 = tail call contract nsz nnan <2 x float> @_Z5log10Dv2_f(<2 x float> %arg), !fpmath !0
   ret <2 x float> %log10
 }
 
 define float @test_log10_f32_preserve_flags_md(float %arg) {
 ; CHECK-LABEL: define float @test_log10_f32_preserve_flags_md
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan ninf float @_Z5log10f(float [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan ninf float @llvm.log10.f32(float [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call nnan ninf float @_Z5log10f(float %arg), !fpmath !0, !foo !1
   ret float %log10
 }
 
 define <2 x float> @test_log10_v2f32_preserve_flags_md(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log10_v2f32_preserve_flags_md
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan nsz contract <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan nsz contract <2 x float> @llvm.log10.v2f32(<2 x float> [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret <2 x float> [[LOG10]]
 ;
   %log10 = tail call contract nsz nnan <2 x float> @_Z5log10Dv2_f(<2 x float> %arg), !fpmath !0, !foo !1
   ret <2 x float> %log10
 }
 
 define float @test_log10_cr_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_log10_cr_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call ninf contract float @_Z5log10f(float [[ARG]])
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call ninf contract float @llvm.log10.f32(float [[ARG]])
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call ninf contract float @_Z5log10f(float %arg)
   ret float %log10
 }
 
 define <2 x float> @test_log10_cr_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log10_cr_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan nsz <2 x float> @_Z5log10Dv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call nnan nsz <2 x float> @llvm.log10.v2f32(<2 x float> [[ARG]])
 ; CHECK-NEXT:    ret <2 x float> [[LOG10]]
 ;
   %log10 = tail call nnan nsz <2 x float> @_Z5log10Dv2_f(<2 x float> %arg)
   ret <2 x float> %log10
 }
 
 ; Test the libm name, not a recognized opencl builtin.
 declare float @log10f(float) #2

 ;
   %log10 = tail call double @log10(double %arg), !fpmath !0
   ret double %log10
 }
 
 define float @test_log10_f32_fast_noinline(float %arg) {
 ; CHECK-LABEL: define float @test_log10_f32_fast_noinline
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast float @_Z5log10f(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast float @_Z5log10f(float [[ARG]]) #[[ATTR7:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call fast float @_Z5log10f(float %arg) #3, !fpmath !0
   ret float %log10
 }
 
 define float @test_log10_f32_fast_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_log10_f32_fast_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2:[0-9]+]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast float @_Z5log10f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast float @llvm.log10.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call fast float @_Z5log10f(float %arg), !fpmath !0
   ret float %log10
 }
 
 define float @test_log10_f32_fast_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_log10_f32_fast_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast float @_Z5log10f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast float @llvm.log10.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call fast float @_Z5log10f(float %arg), !fpmath !0
   ret float %log10
 }
 
 define float @test_log10_f32_nsz_contract_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_log10_f32_nsz_contract_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call nsz contract float @_Z5log10f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call nsz contract float @llvm.log10.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call nsz contract float @_Z5log10f(float %arg), !fpmath !0
   ret float %log10
 }
 
 define float @test_log10_f32_nsz_contract_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_log10_f32_nsz_contract_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
 ; CHECK-NEXT:    [[LOG10:%.*]] = tail call nsz contract float @_Z5log10f(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG10]]
 ;
   %log10 = tail call nsz contract float @_Z5log10f(float %arg), !fpmath !0
   ret float %log10
 }
 
 define half @test_log10_f16_fast_minsize(half %arg) #5 {
 ; CHECK-LABEL: define half @test_log10_f16_fast_minsize
 ; CHECK-SAME: (half [[ARG:%.*]]) #[[ATTR3]] {
-; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast half @_Z5log10Dh(half [[ARG]])
+; CHECK-NEXT:    [[LOG10:%.*]] = tail call fast half @llvm.log10.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[LOG10]]
 ;
   %log10 = tail call fast half @_Z5log10Dh(half %arg)
   ret half %log10
 }
 
 define float @test_log10_f32_strictfp(float %arg) #6 {
 ; CHECK-LABEL: define float @test_log10_f32_strictfp

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log2.ll

 ;
   %log2 = tail call half @_Z4log2Dh(half %arg)
   ret half %log2
 }
 
 define half @test_log2_f16_fast(half %arg) {
 ; CHECK-LABEL: define half @test_log2_f16_fast
 ; CHECK-SAME: (half [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast half @_Z4log2Dh(half [[ARG]])
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast half @llvm.log2.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[LOG2]]
 ;
   %log2 = tail call fast half @_Z4log2Dh(half %arg)
   ret half %log2
 }
 
 define <2 x half> @test_log2_v2f16(<2 x half> %arg) {
 ; CHECK-LABEL: define <2 x half> @test_log2_v2f16

 ;
   %log2 = tail call <16 x half> @_Z4log2Dv16_Dh(<16 x half> %arg)
   ret <16 x half> %log2
 }
 
 define float @test_log2_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_log2_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR5:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call float @_Z4log2f(float %arg) #0, !fpmath !0
   ret float %log2
 }
 
 define <2 x float> @test_log2_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log2_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG2]]
 ;
   %log2 = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %log2
 }
 
 define float @test_log2_cr_f32_nobuiltin_callsite(float %arg) {
 ; CHECK-LABEL: define float @test_log2_cr_f32_nobuiltin_callsite
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call float @_Z4log2f(float %arg) #0
   ret float %log2
 }
 
 define <2 x float> @test_log2_cr_v2f32_nobuiltin_callsite(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log2_cr_v2f32_nobuiltin_callsite
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[LOG2]]
 ;
   %log2 = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> %arg) #0
   ret <2 x float> %log2
 }
 
 ; "no-builtins" should be ignored
 define float @test_log2_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_log2_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call float @_Z4log2f(float %arg) #0, !fpmath !0
   ret float %log2
 }
 
 define <2 x float> @test_log2_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_log2_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]], !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]], !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG2]]
 ;
   %log2 = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> %arg) #0, !fpmath !0
   ret <2 x float> %log2
 }
 
 define float @test_log2_cr_f32_nobuiltins(float %arg) #1 {
 ; CHECK-LABEL: define float @test_log2_cr_f32_nobuiltins
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call float @_Z4log2f(float [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call float @_Z4log2f(float %arg) #0
   ret float %log2
 }
 
 define <2 x float> @test_log2_cr_v2f32_nobuiltins(<2 x float> %arg) #1 {
 ; CHECK-LABEL: define <2 x float> @test_log2_cr_v2f32_nobuiltins
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR5]]
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]) #[[ATTR6]]
 ; CHECK-NEXT:    ret <2 x float> [[LOG2]]
 ;
   %log2 = tail call <2 x float> @_Z4log2Dv2_f(<2 x float> %arg) #0
   ret <2 x float> %log2
 }
 
 define float @test_log2_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_log2_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan ninf float @_Z4log2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan ninf float @llvm.log2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call nnan ninf float @_Z4log2f(float %arg), !fpmath !0
   ret float %log2
 }
 
 define <2 x float> @test_log2_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log2_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan nsz contract <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan nsz contract <2 x float> @llvm.log2.v2f32(<2 x float> [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret <2 x float> [[LOG2]]
 ;
   %log2 = tail call contract nsz nnan <2 x float> @_Z4log2Dv2_f(<2 x float> %arg), !fpmath !0
   ret <2 x float> %log2
 }
 
 define float @test_log2_f32_preserve_flags_md(float %arg) {
 ; CHECK-LABEL: define float @test_log2_f32_preserve_flags_md
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan ninf float @_Z4log2f(float [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan ninf float @llvm.log2.f32(float [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call nnan ninf float @_Z4log2f(float %arg), !fpmath !0, !foo !1
   ret float %log2
 }
 
 define <2 x float> @test_log2_v2f32_preserve_flags_md(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log2_v2f32_preserve_flags_md
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan nsz contract <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]]), !fpmath !0, !foo !1
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan nsz contract <2 x float> @llvm.log2.v2f32(<2 x float> [[ARG]]), !fpmath !0, !foo !1
 ; CHECK-NEXT:    ret <2 x float> [[LOG2]]
 ;
   %log2 = tail call contract nsz nnan <2 x float> @_Z4log2Dv2_f(<2 x float> %arg), !fpmath !0, !foo !1
   ret <2 x float> %log2
 }
 
 define float @test_log2_cr_f32_preserve_flags(float %arg) {
 ; CHECK-LABEL: define float @test_log2_cr_f32_preserve_flags
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call ninf contract float @_Z4log2f(float [[ARG]])
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call ninf contract float @llvm.log2.f32(float [[ARG]])
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call ninf contract float @_Z4log2f(float %arg)
   ret float %log2
 }
 
 define <2 x float> @test_log2_cr_v2f32_preserve_flags(<2 x float> %arg) {
 ; CHECK-LABEL: define <2 x float> @test_log2_cr_v2f32_preserve_flags
 ; CHECK-SAME: (<2 x float> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan nsz <2 x float> @_Z4log2Dv2_f(<2 x float> [[ARG]])
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call nnan nsz <2 x float> @llvm.log2.v2f32(<2 x float> [[ARG]])
 ; CHECK-NEXT:    ret <2 x float> [[LOG2]]
 ;
   %log2 = tail call nnan nsz <2 x float> @_Z4log2Dv2_f(<2 x float> %arg)
   ret <2 x float> %log2
 }
 
 ; Test the libm name, not a recognized opencl builtin.
 declare float @log2f(float) #2

 ;
   %log2 = tail call double @log2(double %arg), !fpmath !0
   ret double %log2
 }
 
 define float @test_log2_f32_fast_noinline(float %arg) {
 ; CHECK-LABEL: define float @test_log2_f32_fast_noinline
 ; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast float @_Z4log2f(float [[ARG]]) #[[ATTR6:[0-9]+]], !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast float @_Z4log2f(float [[ARG]]) #[[ATTR7:[0-9]+]], !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call fast float @_Z4log2f(float %arg) #3, !fpmath !0
   ret float %log2
 }
 
 define float @test_log2_f32_fast_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_log2_f32_fast_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2:[0-9]+]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast float @_Z4log2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast float @llvm.log2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call fast float @_Z4log2f(float %arg), !fpmath !0
   ret float %log2
 }
 
 define float @test_log2_f32_fast_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_log2_f32_fast_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast float @_Z4log2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast float @llvm.log2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call fast float @_Z4log2f(float %arg), !fpmath !0
   ret float %log2
 }
 
 define float @test_log2_f32_nsz_contract_optsize(float %arg) #4 {
 ; CHECK-LABEL: define float @test_log2_f32_nsz_contract_optsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call nsz contract float @_Z4log2f(float [[ARG]]), !fpmath !0
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call nsz contract float @llvm.log2.f32(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call nsz contract float @_Z4log2f(float %arg), !fpmath !0
   ret float %log2
 }
 
 define float @test_log2_f32_nsz_contract_minsize(float %arg) #5 {
 ; CHECK-LABEL: define float @test_log2_f32_nsz_contract_minsize
 ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
 ; CHECK-NEXT:    [[LOG2:%.*]] = tail call nsz contract float @_Z4log2f(float [[ARG]]), !fpmath !0
 ; CHECK-NEXT:    ret float [[LOG2]]
 ;
   %log2 = tail call nsz contract float @_Z4log2f(float %arg), !fpmath !0
   ret float %log2
 }
 
 define half @test_log2_f16_fast_minsize(half %arg) #5 {
 ; CHECK-LABEL: define half @test_log2_f16_fast_minsize
 ; CHECK-SAME: (half [[ARG:%.*]]) #[[ATTR3]] {
-; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast half @_Z4log2Dh(half [[ARG]])
+; CHECK-NEXT:    [[LOG2:%.*]] = tail call fast half @llvm.log2.f16(half [[ARG]])
 ; CHECK-NEXT:    ret half [[LOG2]]
 ;
   %log2 = tail call fast half @_Z4log2Dh(half %arg)
   ret half %log2
 }
 
 define float @test_log2_f32_strictfp(float %arg) #6 {
 ; CHECK-LABEL: define float @test_log2_f32_strictfp

llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-mad.ll

 declare <3 x half> @_Z3madDv3_DhS_S_(<3 x half>, <3 x half>, <3 x half>)
 declare <4 x half> @_Z3madDv4_DhS_S_(<4 x half>, <4 x half>, <4 x half>)
 declare <8 x half> @_Z3madDv8_DhS_S_(<8 x half>, <8 x half>, <8 x half>)
 declare <16 x half> @_Z3madDv16_DhS_S_(<16 x half>, <16 x half>, <16 x half>)
 
 define float @test_mad_f32(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_mad_f32
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call float @_Z3madfff(float [[X]], float [[Y]], float [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call float @llvm.fmuladd.f32(float [[X]], float [[Y]], float [[Z]])
 ; CHECK-NEXT:    ret float [[MAD]]
 ;
   %mad = tail call float @_Z3madfff(float %x, float %y, float %z)
   ret float %mad
 }
 
 define <2 x float> @test_mad_v2f32(<2 x float> %x, <2 x float> %y, <2 x float> %z) {
 ; CHECK-LABEL: define <2 x float> @test_mad_v2f32
 ; CHECK-SAME: (<2 x float> [[X:%.*]], <2 x float> [[Y:%.*]], <2 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <2 x float> @_Z3madDv2_fS_S_(<2 x float> [[X]], <2 x float> [[Y]], <2 x float> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[X]], <2 x float> [[Y]], <2 x float> [[Z]])
 ; CHECK-NEXT:    ret <2 x float> [[MAD]]
 ;
   %mad = tail call <2 x float> @_Z3madDv2_fS_S_(<2 x float> %x, <2 x float> %y, <2 x float> %z)
   ret <2 x float> %mad
 }
 
 define <3 x float> @test_mad_v3f32(<3 x float> %x, <3 x float> %y, <3 x float> %z) {
 ; CHECK-LABEL: define <3 x float> @test_mad_v3f32
 ; CHECK-SAME: (<3 x float> [[X:%.*]], <3 x float> [[Y:%.*]], <3 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <3 x float> @_Z3madDv3_fS_S_(<3 x float> [[X]], <3 x float> [[Y]], <3 x float> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <3 x float> @llvm.fmuladd.v3f32(<3 x float> [[X]], <3 x float> [[Y]], <3 x float> [[Z]])
 ; CHECK-NEXT:    ret <3 x float> [[MAD]]
 ;
   %mad = tail call <3 x float> @_Z3madDv3_fS_S_(<3 x float> %x, <3 x float> %y, <3 x float> %z)
   ret <3 x float> %mad
 }
 
 define <4 x float> @test_mad_v4f32(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
 ; CHECK-LABEL: define <4 x float> @test_mad_v4f32
 ; CHECK-SAME: (<4 x float> [[X:%.*]], <4 x float> [[Y:%.*]], <4 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <4 x float> @_Z3madDv4_fS_S_(<4 x float> [[X]], <4 x float> [[Y]], <4 x float> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> [[X]], <4 x float> [[Y]], <4 x float> [[Z]])
 ; CHECK-NEXT:    ret <4 x float> [[MAD]]
 ;
   %mad = tail call <4 x float> @_Z3madDv4_fS_S_(<4 x float> %x, <4 x float> %y, <4 x float> %z)
   ret <4 x float> %mad
 }
 
 define <8 x float> @test_mad_v8f32(<8 x float> %x, <8 x float> %y, <8 x float> %z) {
 ; CHECK-LABEL: define <8 x float> @test_mad_v8f32
 ; CHECK-SAME: (<8 x float> [[X:%.*]], <8 x float> [[Y:%.*]], <8 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <8 x float> @_Z3madDv8_fS_S_(<8 x float> [[X]], <8 x float> [[Y]], <8 x float> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <8 x float> @llvm.fmuladd.v8f32(<8 x float> [[X]], <8 x float> [[Y]], <8 x float> [[Z]])
 ; CHECK-NEXT:    ret <8 x float> [[MAD]]
 ;
   %mad = tail call <8 x float> @_Z3madDv8_fS_S_(<8 x float> %x, <8 x float> %y, <8 x float> %z)
   ret <8 x float> %mad
 }
 
 define <16 x float> @test_mad_v16f32(<16 x float> %x, <16 x float> %y, <16 x float> %z) {
 ; CHECK-LABEL: define <16 x float> @test_mad_v16f32
 ; CHECK-SAME: (<16 x float> [[X:%.*]], <16 x float> [[Y:%.*]], <16 x float> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <16 x float> @_Z3madDv16_fS_S_(<16 x float> [[X]], <16 x float> [[Y]], <16 x float> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <16 x float> @llvm.fmuladd.v16f32(<16 x float> [[X]], <16 x float> [[Y]], <16 x float> [[Z]])
 ; CHECK-NEXT:    ret <16 x float> [[MAD]]
 ;
   %mad = tail call <16 x float> @_Z3madDv16_fS_S_(<16 x float> %x, <16 x float> %y, <16 x float> %z)
   ret <16 x float> %mad
 }
 
 define double @test_mad_f64(double %x, double %y, double %z) {
 ; CHECK-LABEL: define double @test_mad_f64
 ; CHECK-SAME: (double [[X:%.*]], double [[Y:%.*]], double [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call double @_Z3madddd(double [[X]], double [[Y]], double [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call double @llvm.fmuladd.f64(double [[X]], double [[Y]], double [[Z]])
 ; CHECK-NEXT:    ret double [[MAD]]
 ;
   %mad = tail call double @_Z3madddd(double %x, double %y, double %z)
   ret double %mad
 }
 
 define <2 x double> @test_mad_v2f64(<2 x double> %x, <2 x double> %y, <2 x double> %z) {
 ; CHECK-LABEL: define <2 x double> @test_mad_v2f64
 ; CHECK-SAME: (<2 x double> [[X:%.*]], <2 x double> [[Y:%.*]], <2 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <2 x double> @_Z3madDv2_dS_S_(<2 x double> [[X]], <2 x double> [[Y]], <2 x double> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <2 x double> @llvm.fmuladd.v2f64(<2 x double> [[X]], <2 x double> [[Y]], <2 x double> [[Z]])
 ; CHECK-NEXT:    ret <2 x double> [[MAD]]
 ;
   %mad = tail call <2 x double> @_Z3madDv2_dS_S_(<2 x double> %x, <2 x double> %y, <2 x double> %z)
   ret <2 x double> %mad
 }
 
 define <3 x double> @test_mad_v3f64(<3 x double> %x, <3 x double> %y, <3 x double> %z) {
 ; CHECK-LABEL: define <3 x double> @test_mad_v3f64
 ; CHECK-SAME: (<3 x double> [[X:%.*]], <3 x double> [[Y:%.*]], <3 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <3 x double> @_Z3madDv3_dS_S_(<3 x double> [[X]], <3 x double> [[Y]], <3 x double> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <3 x double> @llvm.fmuladd.v3f64(<3 x double> [[X]], <3 x double> [[Y]], <3 x double> [[Z]])
 ; CHECK-NEXT:    ret <3 x double> [[MAD]]
 ;
   %mad = tail call <3 x double> @_Z3madDv3_dS_S_(<3 x double> %x, <3 x double> %y, <3 x double> %z)
   ret <3 x double> %mad
 }
 
 define <4 x double> @test_mad_v4f64(<4 x double> %x, <4 x double> %y, <4 x double> %z) {
 ; CHECK-LABEL: define <4 x double> @test_mad_v4f64
 ; CHECK-SAME: (<4 x double> [[X:%.*]], <4 x double> [[Y:%.*]], <4 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <4 x double> @_Z3madDv4_dS_S_(<4 x double> [[X]], <4 x double> [[Y]], <4 x double> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <4 x double> @llvm.fmuladd.v4f64(<4 x double> [[X]], <4 x double> [[Y]], <4 x double> [[Z]])
 ; CHECK-NEXT:    ret <4 x double> [[MAD]]
 ;
   %mad = tail call <4 x double> @_Z3madDv4_dS_S_(<4 x double> %x, <4 x double> %y, <4 x double> %z)
   ret <4 x double> %mad
 }
 
 define <8 x double> @test_mad_v8f64(<8 x double> %x, <8 x double> %y, <8 x double> %z) {
 ; CHECK-LABEL: define <8 x double> @test_mad_v8f64
 ; CHECK-SAME: (<8 x double> [[X:%.*]], <8 x double> [[Y:%.*]], <8 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <8 x double> @_Z3madDv8_dS_S_(<8 x double> [[X]], <8 x double> [[Y]], <8 x double> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <8 x double> @llvm.fmuladd.v8f64(<8 x double> [[X]], <8 x double> [[Y]], <8 x double> [[Z]])
 ; CHECK-NEXT:    ret <8 x double> [[MAD]]
 ;
   %mad = tail call <8 x double> @_Z3madDv8_dS_S_(<8 x double> %x, <8 x double> %y, <8 x double> %z)
   ret <8 x double> %mad
 }
 
 define <16 x double> @test_mad_v16f64(<16 x double> %x, <16 x double> %y, <16 x double> %z) {
 ; CHECK-LABEL: define <16 x double> @test_mad_v16f64
 ; CHECK-SAME: (<16 x double> [[X:%.*]], <16 x double> [[Y:%.*]], <16 x double> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <16 x double> @_Z3madDv16_dS_S_(<16 x double> [[X]], <16 x double> [[Y]], <16 x double> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <16 x double> @llvm.fmuladd.v16f64(<16 x double> [[X]], <16 x double> [[Y]], <16 x double> [[Z]])
 ; CHECK-NEXT:    ret <16 x double> [[MAD]]
 ;
   %mad = tail call <16 x double> @_Z3madDv16_dS_S_(<16 x double> %x, <16 x double> %y, <16 x double> %z)
   ret <16 x double> %mad
 }
 
 define half @test_mad_f16(half %x, half %y, half %z) {
 ; CHECK-LABEL: define half @test_mad_f16
 ; CHECK-SAME: (half [[X:%.*]], half [[Y:%.*]], half [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call half @_Z3madDhDhDh(half [[X]], half [[Y]], half [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call half @llvm.fmuladd.f16(half [[X]], half [[Y]], half [[Z]])
 ; CHECK-NEXT:    ret half [[MAD]]
 ;
   %mad = tail call half @_Z3madDhDhDh(half %x, half %y, half %z)
   ret half %mad
 }
 
 define <2 x half> @test_mad_v2f16(<2 x half> %x, <2 x half> %y, <2 x half> %z) {
 ; CHECK-LABEL: define <2 x half> @test_mad_v2f16
 ; CHECK-SAME: (<2 x half> [[X:%.*]], <2 x half> [[Y:%.*]], <2 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <2 x half> @_Z3madDv2_DhS_S_(<2 x half> [[X]], <2 x half> [[Y]], <2 x half> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <2 x half> @llvm.fmuladd.v2f16(<2 x half> [[X]], <2 x half> [[Y]], <2 x half> [[Z]])
 ; CHECK-NEXT:    ret <2 x half> [[MAD]]
 ;
   %mad = tail call <2 x half> @_Z3madDv2_DhS_S_(<2 x half> %x, <2 x half> %y, <2 x half> %z)
   ret <2 x half> %mad
 }
 
 define <3 x half> @test_mad_v3f16(<3 x half> %x, <3 x half> %y, <3 x half> %z) {
 ; CHECK-LABEL: define <3 x half> @test_mad_v3f16
 ; CHECK-SAME: (<3 x half> [[X:%.*]], <3 x half> [[Y:%.*]], <3 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <3 x half> @_Z3madDv3_DhS_S_(<3 x half> [[X]], <3 x half> [[Y]], <3 x half> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <3 x half> @llvm.fmuladd.v3f16(<3 x half> [[X]], <3 x half> [[Y]], <3 x half> [[Z]])
 ; CHECK-NEXT:    ret <3 x half> [[MAD]]
 ;
   %mad = tail call <3 x half> @_Z3madDv3_DhS_S_(<3 x half> %x, <3 x half> %y, <3 x half> %z)
   ret <3 x half> %mad
 }
 
 define <4 x half> @test_mad_v4f16(<4 x half> %x, <4 x half> %y, <4 x half> %z) {
 ; CHECK-LABEL: define <4 x half> @test_mad_v4f16
 ; CHECK-SAME: (<4 x half> [[X:%.*]], <4 x half> [[Y:%.*]], <4 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <4 x half> @_Z3madDv4_DhS_S_(<4 x half> [[X]], <4 x half> [[Y]], <4 x half> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <4 x half> @llvm.fmuladd.v4f16(<4 x half> [[X]], <4 x half> [[Y]], <4 x half> [[Z]])
 ; CHECK-NEXT:    ret <4 x half> [[MAD]]
 ;
   %mad = tail call <4 x half> @_Z3madDv4_DhS_S_(<4 x half> %x, <4 x half> %y, <4 x half> %z)
   ret <4 x half> %mad
 }
 
 define <8 x half> @test_mad_v8f16(<8 x half> %x, <8 x half> %y, <8 x half> %z) {
 ; CHECK-LABEL: define <8 x half> @test_mad_v8f16
 ; CHECK-SAME: (<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]], <8 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <8 x half> @_Z3madDv8_DhS_S_(<8 x half> [[X]], <8 x half> [[Y]], <8 x half> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <8 x half> @llvm.fmuladd.v8f16(<8 x half> [[X]], <8 x half> [[Y]], <8 x half> [[Z]])
 ; CHECK-NEXT:    ret <8 x half> [[MAD]]
 ;
   %mad = tail call <8 x half> @_Z3madDv8_DhS_S_(<8 x half> %x, <8 x half> %y, <8 x half> %z)
   ret <8 x half> %mad
 }
 
 define <16 x half> @test_mad_v16f16(<16 x half> %x, <16 x half> %y, <16 x half> %z) {
 ; CHECK-LABEL: define <16 x half> @test_mad_v16f16
 ; CHECK-SAME: (<16 x half> [[X:%.*]], <16 x half> [[Y:%.*]], <16 x half> [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call <16 x half> @_Z3madDv16_DhS_S_(<16 x half> [[X]], <16 x half> [[Y]], <16 x half> [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call <16 x half> @llvm.fmuladd.v16f16(<16 x half> [[X]], <16 x half> [[Y]], <16 x half> [[Z]])
 ; CHECK-NEXT:    ret <16 x half> [[MAD]]
 ;
   %mad = tail call <16 x half> @_Z3madDv16_DhS_S_(<16 x half> %x, <16 x half> %y, <16 x half> %z)
   ret <16 x half> %mad
 }
 
 define float @test_mad_f32_fast(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_mad_f32_fast
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @_Z3madfff(float [[X]], float [[Y]], float [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @llvm.fmuladd.f32(float [[X]], float [[Y]], float [[Z]])
 ; CHECK-NEXT:    ret float [[MAD]]
 ;
   %mad = tail call fast float @_Z3madfff(float %x, float %y, float %z)
   ret float %mad
 }
 
 define float @test_mad_f32_noinline(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_mad_f32_noinline
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @_Z3madfff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @_Z3madfff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR3:[0-9]+]]
 ; CHECK-NEXT:    ret float [[MAD]]
 ;
   %mad = tail call fast float @_Z3madfff(float %x, float %y, float %z) #1
   ret float %mad
 }
 
 define float @test_mad_f32_fast_minsize(float %x, float %y, float %z) #0 {
 ; CHECK-LABEL: define float @test_mad_f32_fast_minsize
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @_Z3madfff(float [[X]], float [[Y]], float [[Z]])
+; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @llvm.fmuladd.f32(float [[X]], float [[Y]], float [[Z]])
 ; CHECK-NEXT:    ret float [[MAD]]
 ;
   %mad = tail call fast float @_Z3madfff(float %x, float %y, float %z)
   ret float %mad
 }
 
 define float @test_mad_f32_fast_strictfp(float %x, float %y, float %z) #2 {
 ; CHECK-LABEL: define float @test_mad_f32_fast_strictfp
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) #[[ATTR1:[0-9]+]] {
 ; CHECK-NEXT:    [[MAD:%.*]] = tail call nnan nsz float @_Z3madfff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR1]]
 ; CHECK-NEXT:    ret float [[MAD]]
 ;
   %mad = tail call nsz nnan float @_Z3madfff(float %x, float %y, float %z) #2
   ret float %mad
 }
 
 define float @test_mad_f32_fast_nobuiltin(float %x, float %y, float %z) {
 ; CHECK-LABEL: define float @test_mad_f32_fast_nobuiltin
 ; CHECK-SAME: (float [[X:%.*]], float [[Y:%.*]], float [[Z:%.*]]) {
-; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @_Z3madfff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT:    [[MAD:%.*]] = tail call fast float @_Z3madfff(float [[X]], float [[Y]], float [[Z]]) #[[ATTR4:[0-9]+]]
 ; CHECK-NEXT:    ret float [[MAD]]
 ;
   %mad = tail call fast float @_Z3madfff(float %x, float %y, float %z) #3
   ret float %mad
 }
 
 attributes #0 = { minsize }
 attributes #1 = { noinline }
 attributes #2 = { strictfp }
 attributes #3 = { nobuiltin }

llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll

 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z5rootnfi(float %tmp, i32 -2)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_0x
-; GCN: %call = tail call fast float @_Z3fmafff(float 0.000000e+00, float %tmp, float %y)
+; GCN: store float %y
 define amdgpu_kernel void @test_fma_0x(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float 0.000000e+00, float %tmp, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z3fmafff(float, float, float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_x0
-; GCN: %call = tail call fast float @_Z3fmafff(float %tmp, float 0.000000e+00, float %y)
+; GCN: store float %y,
 define amdgpu_kernel void @test_fma_x0(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float %tmp, float 0.000000e+00, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_mad_0x
-; GCN: %call = tail call fast float @_Z3madfff(float 0.000000e+00, float %tmp, float %y)
+; GCN: store float %y,
 define amdgpu_kernel void @test_mad_0x(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3madfff(float 0.000000e+00, float %tmp, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z3madfff(float, float, float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_mad_x0
-; GCN: %call = tail call fast float @_Z3madfff(float %tmp, float 0.000000e+00, float %y)
+; GCN: store float %y,
 define amdgpu_kernel void @test_mad_x0(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3madfff(float %tmp, float 0.000000e+00, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_x1y
-; GCN: %call = tail call fast float @_Z3fmafff(float %tmp, float 1.000000e+00, float %y)
+; GCN: %call = fadd fast float %tmp, %y
 define amdgpu_kernel void @test_fma_x1y(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float %tmp, float 1.000000e+00, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_1xy
-; GCN: %call = tail call fast float @_Z3fmafff(float 1.000000e+00, float %tmp, float %y)
+; GCN: %call = fadd fast float %tmp, %y
 define amdgpu_kernel void @test_fma_1xy(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float 1.000000e+00, float %tmp, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_xy0
-; GCN: %call = tail call fast float @_Z3fmafff(float %tmp, float %tmp1, float 0.000000e+00)
+; GCN: %call = fmul fast float %tmp1, %tmp
 define amdgpu_kernel void @test_fma_xy0(ptr addrspace(1) nocapture %a) {
 entry:
   %arrayidx = getelementptr inbounds float, ptr addrspace(1) %a, i64 1
   %tmp = load float, ptr addrspace(1) %arrayidx, align 4
   %tmp1 = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float %tmp, float %tmp1, float 0.000000e+00)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_exp
-; GCN-NATIVE: call fast float @_Z10native_expf(float %tmp)
+; GCN-NATIVE: call fast float @llvm.exp.f32(float %tmp)
 define amdgpu_kernel void @test_use_native_exp(ptr addrspace(1) nocapture %a) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3expf(float %tmp)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z3expf(float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_exp2
-; GCN-NATIVE: call fast float @_Z11native_exp2f(float %tmp)
+; GCN-NATIVE: call fast float @llvm.exp2.f32(float %tmp)
 define amdgpu_kernel void @test_use_native_exp2(ptr addrspace(1) nocapture %a) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z4exp2f(float %tmp)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z4exp2f(float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_exp10
 ; GCN-NATIVE: call fast float @_Z12native_exp10f(float %tmp)
 define amdgpu_kernel void @test_use_native_exp10(ptr addrspace(1) nocapture %a) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z5exp10f(float %tmp)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z5exp10f(float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_log
-; GCN-NATIVE: call fast float @_Z10native_logf(float %tmp)
+; GCN-NATIVE: call fast float @llvm.log.f32(float %tmp)
 define amdgpu_kernel void @test_use_native_log(ptr addrspace(1) nocapture %a) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3logf(float %tmp)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z3logf(float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_log2
-; GCN-NATIVE: call fast float @_Z11native_log2f(float %tmp)
+; GCN-NATIVE: call fast float @llvm.log2.f32(float %tmp)
 define amdgpu_kernel void @test_use_native_log2(ptr addrspace(1) nocapture %a) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z4log2f(float %tmp)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z4log2f(float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_log10
-; GCN-NATIVE: call fast float @_Z12native_log10f(float %tmp)
+; GCN-NATIVE: call fast float @llvm.log10.f32(float %tmp)
 define amdgpu_kernel void @test_use_native_log10(ptr addrspace(1) nocapture %a) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z5log10f(float %tmp)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }