[CodeGen] Make the MachineFunctionSplitter pass testable via MIR

[dhoekwater]

Summary

Because the MachineFunctionSplitter pass isn't initialized in
CodeGen.cpp, running LLC with --run-pass machine-function-splitter
doesn't work. Adding it to the initializeCodeGen makes the function
splitting directly testable with .mir tests.

[dhoekwater]

Remove an unnecessary line.

[dhoekwater]

Rebase onto main to hopefully make unrelated test failures go away

[snehasish]

Is there a specific reason to test MFS (on ARM) with MIR instead of .ll inputs? Only ~11% of the tests in test/CodeGen/AArch64 are in MIR, the rest are bitcode files. IMO bitcode is much easier to read, maintain and we can reuse most (all?) of the existing tests we have in machine-function-splitter.ll. So my preference would be to use bitcode unless there is a fundamental reason which blocks us from testing with bitcode.

[dhoekwater]

In D157063#4573702, @snehasish wrote:

Is there a specific reason to test MFS (on ARM) with MIR instead of .ll inputs?

In a different review, I was asked to make MIR tests so that they only targeted a single pass. That doesn't seem necessary here, so I'll use bitcode tests instead. Dropping this revision and updating its dependents.

[dhoekwater]

Try to replace with main to get this to work

[dhoekwater]

Try to replace with a different branch to get this to work

[dhoekwater]

Try to replace with yet another

llvm/lib/CodeGen/CodeGen.cpp

void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeMachineCFGPrinterPass(Registry);
   initializeMachineCSEPass(Registry);
   initializeMachineCombinerPass(Registry);
   initializeMachineCopyPropagationPass(Registry);
   initializeMachineCycleInfoPrinterPassPass(Registry);
   initializeMachineCycleInfoWrapperPassPass(Registry);
   initializeMachineDominatorTreePass(Registry);
   initializeMachineFunctionPrinterPassPass(Registry);
+  initializeMachineFunctionSplitterPass(Registry);
   initializeMachineLateInstrsCleanupPass(Registry);
   initializeMachineLICMPass(Registry);
   initializeMachineLoopInfoPass(Registry);
   initializeMachineModuleInfoWrapperPassPass(Registry);
   initializeMachineOptimizationRemarkEmitterPassPass(Registry);
   initializeMachineOutlinerPass(Registry);
   initializeMachinePipelinerPass(Registry);
   initializeMachineSanitizerBinaryMetadataPass(Registry);

llvm/test/CodeGen/AArch64/machine-function-splitter.mir

+# RUN: llc -mtriple=aarch64-none-linux-gnu --verify-machineinstrs -run-pass machine-function-splitter %s -o - | FileCheck %s
+
+--- |  
+  ; Function Attrs: nounwind
+  define void @split_basic(i1 zeroext %0) #0 !prof !14 !section_prefix !15 {
+    br i1 %0, label %2, label %4, !prof !16
+
+  2:                                                ; preds = %1
+    %3 = call i32 @bar()
+    br label %6
+
+  4:                                                ; preds = %1
+    %5 = call i32 @baz()
+    br label %6
+
+  6:                                                ; preds = %4, %2
+    %7 = tail call i32 @qux()
+    ret void
+  }
+  
+  declare i32 @bar()
+  
+  declare i32 @baz()
+  
+  declare i32 @bam()
+  
+  declare i32 @qux()
+  
+  attributes #0 = { nounwind }
+  
+  !llvm.module.flags = !{!0}
+  
+  !0 = !{i32 1, !"ProfileSummary", !1}
+  !1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
+  !2 = !{!"ProfileFormat", !"InstrProf"}
+  !3 = !{!"TotalCount", i64 10000}
+  !4 = !{!"MaxCount", i64 10}
+  !5 = !{!"MaxInternalCount", i64 1}
+  !6 = !{!"MaxFunctionCount", i64 1000}
+  !7 = !{!"NumCounts", i64 3}
+  !8 = !{!"NumFunctions", i64 5}
+  !9 = !{!"DetailedSummary", !10}
+  !10 = !{!11, !12, !13}
+  !11 = !{i32 10000, i64 100, i32 1}
+  !12 = !{i32 999900, i64 100, i32 1}
+  !13 = !{i32 999999, i64 1, i32 2}
+  !14 = !{!"function_entry_count", i64 9000}
+  !15 = !{!"function_section_prefix", !"hot"}
+  !16 = !{!"branch_weights", i32 7000, i32 0}
+
+...
+---
+name:            split_basic
+stack:
+  - { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
+      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+machineFunctionInfo:
+  hasRedZone:      false
+body:             |
+  ; CHECK-LABEL: name: split_basic
+  ; COM: Check that machine function splitting splits a cold block.
+  ; CHECK: bb.0 (%ir-block.1)
+  ; CHECK-NOT: bb.1 (%ir-block.2, bbsections Cold)
+  ; CHECK: bb.2 (%ir-block.4, bbsections Cold)
+
+  bb.0 (%ir-block.1):
+    successors: %bb.1(0x80000000), %bb.2(0x00000000)
+    liveins: $w0, $lr
+
+    early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
+    CBZW killed renamable $w0, %bb.2
+
+  bb.1 (%ir-block.2):
+    BL @bar, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $w0
+    early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
+    TCRETURNdi @qux, 0, csr_aarch64_aapcs, implicit $sp
+
+  bb.2 (%ir-block.4):
+    BL @baz, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $w0
+    early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
+    TCRETURNdi @qux, 0, csr_aarch64_aapcs, implicit $sp
+
+...