AMDGPU: Remove pointless libcall optimization of fma/mad

[arsenm]

Summary

After the library is linked and trivially inlined, the generic fma and
fmuladd intrinsics already handle these cases, and with precise flag
handling. This was requiring all fast math flags when we really just
need nsz for the fma(a, b, 0) case.

[arsenm]

Rebase

[arsenm]

ping

[arsenm]

6dbd458128dd24d35c0fe9121bde62f0c4da92f8

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

private:
 
   // pow/powr/pown
   bool fold_pow(FPMathOperator *FPOp, IRBuilder<> &B,
                 const FuncInfo &FInfo);
 
   // rootn
   bool fold_rootn(FPMathOperator *FPOp, IRBuilder<> &B, const FuncInfo &FInfo);
 
-  // fma/mad
-  bool fold_fma_mad(CallInst *CI, IRBuilder<> &B, const FuncInfo &FInfo);
-
   // -fuse-native for sincos
   bool sincosUseNative(CallInst *aCI, const FuncInfo &FInfo);
 
   // evaluate calls if calls' arguments are constants.
   bool evaluateScalarMathFunc(const FuncInfo &FInfo, double& Res0,
     double& Res1, Constant *copr0, Constant *copr1, Constant *copr2);
   bool evaluateCall(CallInst *aCI, const FuncInfo &FInfo);
 
case AMDGPULibFunc::EI_POWN:
       return fold_pow(FPOp, B, FInfo);
     case AMDGPULibFunc::EI_ROOTN:
       return fold_rootn(FPOp, B, FInfo);
     case AMDGPULibFunc::EI_SQRT:
       return fold_sqrt(FPOp, B, FInfo);
     case AMDGPULibFunc::EI_COS:
     case AMDGPULibFunc::EI_SIN:
       return fold_sincos(FPOp, B, FInfo, AA);
-    case AMDGPULibFunc::EI_FMA:
-    case AMDGPULibFunc::EI_MAD:
-    case AMDGPULibFunc::EI_NFMA:
-      // skip vector function
-      return (getVecSize(FInfo) != 1) ? false : fold_fma_mad(CI, B, FInfo);
     default:
       break;
     }
   } else {
     // Specialized optimizations for each function call
     switch (FInfo.getId()) {
     case AMDGPULibFunc::EI_READ_PIPE_2:
     case AMDGPULibFunc::EI_READ_PIPE_4:
if (FunctionCallee FPExpr =
       Value *nval = CreateCallEx(B,FPExpr, opr0, "__rootn2rsqrt");
       replaceCall(nval);
       return true;
     }
   }
   return false;
 }
 
-bool AMDGPULibCalls::fold_fma_mad(CallInst *CI, IRBuilder<> &B,
-                                  const FuncInfo &FInfo) {
-  Value *opr0 = CI->getArgOperand(0);
-  Value *opr1 = CI->getArgOperand(1);
-  Value *opr2 = CI->getArgOperand(2);
-
-  ConstantFP *CF0 = dyn_cast<ConstantFP>(opr0);
-  ConstantFP *CF1 = dyn_cast<ConstantFP>(opr1);
-  if ((CF0 && CF0->isZero()) || (CF1 && CF1->isZero())) {
-    // fma/mad(a, b, c) = c if a=0 || b=0
-    LLVM_DEBUG(errs() << "AMDIC: " << *CI << " ---> " << *opr2 << "\n");
-    replaceCall(opr2);
-    return true;
-  }
-  if (CF0 && CF0->isExactlyValue(1.0f)) {
-    // fma/mad(a, b, c) = b+c if a=1
-    LLVM_DEBUG(errs() << "AMDIC: " << *CI << " ---> " << *opr1 << " + " << *opr2
-                      << "\n");
-    Value *nval = B.CreateFAdd(opr1, opr2, "fmaadd");
-    replaceCall(nval);
-    return true;
-  }
-  if (CF1 && CF1->isExactlyValue(1.0f)) {
-    // fma/mad(a, b, c) = a+c if b=1
-    LLVM_DEBUG(errs() << "AMDIC: " << *CI << " ---> " << *opr0 << " + " << *opr2
-                      << "\n");
-    Value *nval = B.CreateFAdd(opr0, opr2, "fmaadd");
-    replaceCall(nval);
-    return true;
-  }
-  if (ConstantFP *CF = dyn_cast<ConstantFP>(opr2)) {
-    if (CF->isZero()) {
-      // fma/mad(a, b, c) = a*b if c=0
-      LLVM_DEBUG(errs() << "AMDIC: " << *CI << " ---> " << *opr0 << " * "
-                        << *opr1 << "\n");
-      Value *nval = B.CreateFMul(opr0, opr1, "fmamul");
-      replaceCall(nval);
-      return true;
-    }
-  }
-
-  return false;
-}
-
 // Get a scalar native builtin single argument FP function
 FunctionCallee AMDGPULibCalls::getNativeFunction(Module *M,
                                                  const FuncInfo &FInfo) {
   if (getArgType(FInfo) == AMDGPULibFunc::F64 || !HasNative(FInfo.getId()))
     return nullptr;
   FuncInfo nf = FInfo;
   nf.setPrefix(AMDGPULibFunc::NATIVE);
   return getFunction(M, nf);

llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll

 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z5rootnfi(float %tmp, i32 -2)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_0x
-; GCN: store float %y, ptr addrspace(1) %a
+; GCN: %call = tail call fast float @_Z3fmafff(float 0.000000e+00, float %tmp, float %y)
 define amdgpu_kernel void @test_fma_0x(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float 0.000000e+00, float %tmp, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z3fmafff(float, float, float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_x0
-; GCN: store float %y, ptr addrspace(1) %a
+; GCN: %call = tail call fast float @_Z3fmafff(float %tmp, float 0.000000e+00, float %y)
 define amdgpu_kernel void @test_fma_x0(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float %tmp, float 0.000000e+00, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_mad_0x
-; GCN: store float %y, ptr addrspace(1) %a
+; GCN: %call = tail call fast float @_Z3madfff(float 0.000000e+00, float %tmp, float %y)
 define amdgpu_kernel void @test_mad_0x(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3madfff(float 0.000000e+00, float %tmp, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 declare float @_Z3madfff(float, float, float)
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_mad_x0
-; GCN: store float %y, ptr addrspace(1) %a
+; GCN: %call = tail call fast float @_Z3madfff(float %tmp, float 0.000000e+00, float %y)
 define amdgpu_kernel void @test_mad_x0(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3madfff(float %tmp, float 0.000000e+00, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_x1y
-; GCN: %fmaadd = fadd fast float %tmp, %y
+; GCN: %call = tail call fast float @_Z3fmafff(float %tmp, float 1.000000e+00, float %y)
 define amdgpu_kernel void @test_fma_x1y(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float %tmp, float 1.000000e+00, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_1xy
-; GCN: %fmaadd = fadd fast float %tmp, %y
+; GCN: %call = tail call fast float @_Z3fmafff(float 1.000000e+00, float %tmp, float %y)
 define amdgpu_kernel void @test_fma_1xy(ptr addrspace(1) nocapture %a, float %y) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float 1.000000e+00, float %tmp, float %y)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_fma_xy0
-; GCN: %fmamul = fmul fast float %tmp1, %tmp
+; GCN: %call = tail call fast float @_Z3fmafff(float %tmp, float %tmp1, float 0.000000e+00)
 define amdgpu_kernel void @test_fma_xy0(ptr addrspace(1) nocapture %a) {
 entry:
   %arrayidx = getelementptr inbounds float, ptr addrspace(1) %a, i64 1
   %tmp = load float, ptr addrspace(1) %arrayidx, align 4
   %tmp1 = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z3fmafff(float %tmp, float %tmp1, float 0.000000e+00)
   store float %call, ptr addrspace(1) %a, align 4
   ret void