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vpykhtin (Valery Pykhtin)
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User Since
Jan 28 2016, 8:30 AM (335 w, 23 h)

Recent Activity

Thu, Jun 23

vpykhtin added inline comments to D128252: [AMDGPU] VGPR to SGPR copies lowering.
Thu, Jun 23, 5:29 AM · Restricted Project, Restricted Project

May 5 2022

vpykhtin accepted D124182: [AMDGPU] Combine DPP mov even if old reg def is in different BB.

Yep, in SSA use of A means it dominates B so it seems correct to expect only narrowing of the exec mask. Let's try and see what happens.

May 5 2022, 3:25 AM · Restricted Project, Restricted Project

Feb 23 2022

vpykhtin added inline comments to D119475: [AMDGPU] Add scheduler pass to rematerialize trivial defs.
Feb 23 2022, 4:51 AM · Restricted Project, Restricted Project
vpykhtin committed rG152325d2f3b6: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, (authored by vpykhtin).
[ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix,
Feb 23 2022, 2:40 AM
vpykhtin closed D120207: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, add –allow-unused-prefixes..
Feb 23 2022, 2:40 AM · Restricted Project

Feb 21 2022

vpykhtin updated the diff for D120207: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, add –allow-unused-prefixes..

Fixed, updated description of the patch.

Feb 21 2022, 11:41 PM · Restricted Project
vpykhtin reopened D120207: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, add –allow-unused-prefixes..

Sorry for breaking the test, it turned out it has differences between two runs in what functions are left after the inliner, for example: barney exists on the first path but don’t exist on the second path. This cannot be handled with a single CHECK prefix.

Feb 21 2022, 11:38 PM · Restricted Project
vpykhtin committed rG52577cd26f26: [ArgPromotion] Regenerate test checks for crash.ll - removed ALL_NEWPM prefix. (authored by vpykhtin).
[ArgPromotion] Regenerate test checks for crash.ll - removed ALL_NEWPM prefix.
Feb 21 2022, 8:22 AM
vpykhtin closed D120207: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, add –allow-unused-prefixes..
Feb 21 2022, 8:22 AM · Restricted Project
vpykhtin updated the diff for D120207: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, add –allow-unused-prefixes..

replaced ARGPROMOTION prefix with CHECK, renamed %tmp IR values to %temp to avoid update warnings like "WARNING: Change IR value name 'tmp1' or use --prefix-filecheck-ir-name to prevent possible conflict with scripted FileCheck name"

Feb 21 2022, 8:10 AM · Restricted Project

Feb 20 2022

vpykhtin added a reviewer for D120207: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, add –allow-unused-prefixes.: nikic.
Feb 20 2022, 10:39 PM · Restricted Project
vpykhtin added a comment to D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.

From a cursory look at the implementation, does this handle unwinding properly?

store i32 0, ptr %arg
call void @may_unwind() readnone
store i32 1, ptr %arg

I believe promotion is not possible in this case, because there's no good way to provide the new value on the unwind path to the caller.

Feb 20 2022, 10:31 PM · Restricted Project
vpykhtin requested review of D120207: [ArgPromotion] Regenerate test checks for crash.ll – restored ALL_OLDPM prefix, add –allow-unused-prefixes..
Feb 20 2022, 4:31 AM · Restricted Project
vpykhtin committed rG29d2ae59e45f: [ArgPromotion] Regenerate test checks for dead-gep-no-promotion.ll (authored by vpykhtin).
[ArgPromotion] Regenerate test checks for dead-gep-no-promotion.ll
Feb 20 2022, 3:56 AM
vpykhtin added inline comments to D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.
Feb 20 2022, 3:11 AM · Restricted Project
vpykhtin committed rGa2ce8df49b01: [ArgPromotion] auto-update test checks. (authored by vpykhtin).
[ArgPromotion] auto-update test checks.
Feb 20 2022, 2:19 AM

Feb 18 2022

vpykhtin added inline comments to D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.
Feb 18 2022, 11:25 AM · Restricted Project

Feb 17 2022

vpykhtin updated the diff for D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.

@arsenm I've added inoutargs2.ll test which is modified rewrite_out_arguments.ll. Original checks are saved with REF prefix, differences marked with "; ***" prefix, please take a look. Most of the differences are related to bitcasts which my patch doesn't support yet, I'm not sure if it should be included in this commit

Feb 17 2022, 5:35 AM · Restricted Project
vpykhtin accepted D119886: [AMDGPU] Promote recursive loads from kernel argument to constant.

LGTM.

Feb 17 2022, 12:24 AM · Restricted Project, Restricted Project

Feb 16 2022

vpykhtin added a comment to D119127: Preserve inbounds information of GEP during Argument Promotion Pass across callee and its callers..

Using IsArgGepInBound map just to hold a boolean seems expensive to me, can you just add a field to OriginalLoads value?

Feb 16 2022, 11:21 PM · Restricted Project
vpykhtin added inline comments to D119886: [AMDGPU] Promote recursive loads from kernel argument to constant.
Feb 16 2022, 7:24 AM · Restricted Project, Restricted Project

Feb 14 2022

vpykhtin updated the diff for D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.

Updated opaque-ptr.ll test to use ALL prefix to simplify checks

Feb 14 2022, 9:39 AM · Restricted Project
vpykhtin updated the diff for D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.

@nikic please take a look now, I've addressed the issue with opaque pointers.

Feb 14 2022, 5:38 AM · Restricted Project

Feb 10 2022

vpykhtin accepted D119502: [AMDGPU] Merge AMDGPULDSUtils into AMDGPUMemoryUtils.

LGTM.

Feb 10 2022, 9:33 PM · Restricted Project
vpykhtin added inline comments to D119480: [AMDGPU] Improve clobbering checks in the kernel argument promotion.
Feb 10 2022, 2:35 PM · Restricted Project
vpykhtin accepted D119480: [AMDGPU] Improve clobbering checks in the kernel argument promotion.

LGTM.

Feb 10 2022, 2:32 PM · Restricted Project
vpykhtin added inline comments to D119480: [AMDGPU] Improve clobbering checks in the kernel argument promotion.
Feb 10 2022, 2:10 PM · Restricted Project

Feb 7 2022

vpykhtin added a comment to D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.

Can you check if the testcases in llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll are redundant and/or covered by the ones you add here?

@arsenm I looked into the test and its not directly suitable for this pass as behaives differently, however the cases can be used for testing.

Feb 7 2022, 6:29 AM · Restricted Project
vpykhtin updated the diff for D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.

Some of the per review issues addressed.

Feb 7 2022, 6:05 AM · Restricted Project

Feb 4 2022

vpykhtin requested review of D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support.
Feb 4 2022, 9:34 AM · Restricted Project

Feb 1 2022

vpykhtin accepted D118661: [AMDGPU] Check atomics aliasing in the clobbering annotation.

LGTM

Feb 1 2022, 12:17 PM · Restricted Project
vpykhtin accepted D118419: [AMDGPU] Allow scalar loads after barrier.

LGTM.

Feb 1 2022, 11:27 AM · Restricted Project
vpykhtin added a comment to D118419: [AMDGPU] Allow scalar loads after barrier.

Looks almost good

Feb 1 2022, 6:45 AM · Restricted Project

Jan 26 2022

vpykhtin added a comment to D117562: [AMDGPU] Sink immediate VGPR defs if high RP.

In D117562#3272690, @vangthao wrote:
Right, by the time we hit pre-ra scheduler, occupany may already be decreased by MachineLICM and since the scheduler does not currently have any way to decrease register pressure of live-throughs, it would not have any ability to increase occupancy if it was decreased by MachineLICM hoisting from loops. Enforcing an occupancy target for RA will help in this case. Another issue is I believe the scheduler will allow for more VGPR usage as long as it does not decrease occupancy. This may hide some achievable occupancy if we do not handle this before scheduler or make scheduler aware that it can increase occupancy by sinking. I am not sure if disabling MachineLICM altogether in high RP situations would be the best solution here.

Jan 26 2022, 9:06 AM · Restricted Project
vpykhtin added a comment to D117562: [AMDGPU] Sink immediate VGPR defs if high RP.

Yes it is hard, but what alternative do we have? I think having the compiler make a decision about what occupancy it is trying to achieve, is better than not making any decision at all. And the scheduler already makes that decision, it is just not enforced.

Jan 26 2022, 4:33 AM · Restricted Project
vpykhtin added a comment to D117562: [AMDGPU] Sink immediate VGPR defs if high RP.
Jan 26 2022, 3:51 AM · Restricted Project

Jan 25 2022

vpykhtin added a comment to D117562: [AMDGPU] Sink immediate VGPR defs if high RP.

more comments to follow

Jan 25 2022, 4:50 AM · Restricted Project

Feb 26 2021

vpykhtin accepted D97506: [AMDGPU] Avoid second rescheduling for some regions.

Following the discussion at https://reviews.llvm.org/D97342.

Feb 26 2021, 12:08 PM · Restricted Project
vpykhtin accepted D97342: [AMDGPU] Skip unclusterd rescheduling w/o ld/st.

LGTM

Feb 26 2021, 12:06 PM · Restricted Project
vpykhtin added a comment to D97506: [AMDGPU] Avoid second rescheduling for some regions.

Looks good either but as with previous patch I think setting HasClusteredNodes to true to avoid discovering it's value is a bit misleading.

Feb 26 2021, 6:31 AM · Restricted Project
vpykhtin added a comment to D97342: [AMDGPU] Skip unclusterd rescheduling w/o ld/st.

Looks good, but should we use just a single dedicated pass over SUs to check if there're clustered ops after first scheduling to make the logic slightly easier?

Feb 26 2021, 5:09 AM · Restricted Project

Oct 23 2020

vpykhtin committed rG00255f419298: [AMDGPU] Fix access beyond the end of the basic block in… (authored by vpykhtin).
[AMDGPU] Fix access beyond the end of the basic block in…
Oct 23 2020, 9:20 AM
vpykhtin closed D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..
Oct 23 2020, 9:19 AM · Restricted Project

Oct 22 2020

vpykhtin added inline comments to D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..
Oct 22 2020, 9:55 AM · Restricted Project
vpykhtin added a comment to D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..

Jay, Matt do you have objections with this patch?

Oct 22 2020, 9:25 AM · Restricted Project

Oct 21 2020

vpykhtin updated the diff for D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..

Fixed formatting issue

Oct 21 2020, 1:41 AM · Restricted Project

Oct 20 2020

vpykhtin updated the diff for D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..

Fixed formattind and lint issues.

Oct 20 2020, 10:30 AM · Restricted Project

Oct 19 2020

vpykhtin updated the diff for D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..

Added test, more review issues fixed.

Oct 19 2020, 9:33 AM · Restricted Project

Oct 16 2020

vpykhtin added a comment to D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..

Actually do we have a test with a call in between def and use?

Probably not, how a call looks like at this stage?

It should be s_setpc_b64 at this point and it is a terminator and branch. Although I am not sure it can be detected as an EXEC change.

Oct 16 2020, 1:25 AM · Restricted Project

Oct 14 2020

vpykhtin added a comment to D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..

Actually do we have a test with a call in between def and use?

Oct 14 2020, 10:21 PM · Restricted Project
vpykhtin added inline comments to D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..
Oct 14 2020, 9:32 AM · Restricted Project
vpykhtin updated the diff for D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..

Per review fixes.

Oct 14 2020, 9:30 AM · Restricted Project
vpykhtin requested review of D89386: [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse..
Oct 14 2020, 5:00 AM · Restricted Project

Oct 11 2020

vpykhtin added a comment to D64393: [AMDGPU] Fix DPP combiner check for exec modification.

I've found the case when execMayBeModifiedBeforeAnyUse randomly leads to a coredump, which is hard to debug. Most likely it's because an instruction beyond the end of a basic block is accessed. This means that the first loop calculates some instructions twice and I was wrong assuming use_nodbg_instructions doesn't repeat them. In fact there is no code in MachineRegisterInfo::verifyUseList that ensures that uses belonging to one instruction should be sequent in the use list nor the traces of such ordering can be found in MachineRegisterInfo::addRegOperandToUseList. I'm going to fix this code.

Oct 11 2020, 6:16 PM · Restricted Project

Sep 24 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

If that piece of code turns out to be mandatory, we'll find out soon enough and we would get a test case :).

Sep 24 2020, 7:38 AM · Restricted Project
vpykhtin committed rGd9beff04a308: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining (authored by vpykhtin).
[RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining
Sep 24 2020, 7:36 AM
vpykhtin closed D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.
Sep 24 2020, 7:35 AM · Restricted Project

Sep 23 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

Sorry, I had to explain the context around the modified code.

Sep 23 2020, 4:52 AM · Restricted Project

Sep 22 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

HI Quentin,

Sep 22 2020, 4:26 AM · Restricted Project

Sep 7 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

ping

Sep 7 2020, 7:09 PM · Restricted Project

Aug 31 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

Honestly, I have no idea one way or another. I'm leaning toward @arsenm's theory that the implicit def may be needed in case the full register is never fully covered.
But I would need to dig deeper into this.

Aug 31 2020, 4:09 AM · Restricted Project
vpykhtin updated the diff for D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

Rebased, updated per review comments.

Aug 31 2020, 3:48 AM · Restricted Project
vpykhtin updated the summary of D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.
Aug 31 2020, 3:20 AM · Restricted Project

Aug 20 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

Can you remove the commit message from the previous commit from this message? I found it confusing to read it here

Aug 20 2020, 3:11 AM · Restricted Project

Aug 18 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

ping

Aug 18 2020, 7:12 AM · Restricted Project

Jul 23 2020

vpykhtin accepted D84026: [AMDGPU][MC] Added support of SP3 syntax for MTBUF format modifier.

Ok, let's keep it simple, no much benefit with maps. LGTM.

Jul 23 2020, 10:35 PM · Restricted Project
vpykhtin added a comment to D84026: [AMDGPU][MC] Added support of SP3 syntax for MTBUF format modifier.

Overally looks good

Jul 23 2020, 2:52 AM · Restricted Project

Jul 15 2020

vpykhtin added a comment to D83825: AMDGPU: Rename add/sub with carry out instructions.

I have no objections but I'll ask Dmirty to check this from asm/dasm side.

Jul 15 2020, 8:04 AM · Restricted Project

Jul 14 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

It would help if 9d7bc0874cf20f44cd331c77f5a003b4c4b262bd had a test...

I'm somewhat suspicious, since I have seen cases where the implicit def is needed in cases where the full register is never fully covered. However, it's possible this is still a leftover from before DetectDeadLanes was added

Jul 14 2020, 10:28 PM · Restricted Project

Jul 10 2020

vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

ping

Jul 10 2020, 8:44 AM · Restricted Project

Jul 7 2020

vpykhtin accepted D82916: LIS: fix handleMove to properly extend main range.

Given than the condition here is rare, I'm ok with the patch, reworking undef handling in scheduler is a massive work.

Jul 7 2020, 9:36 AM · Restricted Project
vpykhtin added a comment to D82916: LIS: fix handleMove to properly extend main range.

I understood your patch. Generally I think patching LIS with cleared undef flags ins't right at first place because the semantic of register lifetime is ruined. After the first move there should be an undef flag set at the %1.sub2 = IMPLICIT_DEF instruction which would break lives of all subregs live at this point. Can we drop updating LIS during scheduling and recreate it from scratch? Or may be fully recreate only the intervals for the registers involved in moves when the undef flag is patched after scheduling?

Jul 7 2020, 9:15 AM · Restricted Project
vpykhtin added a comment to D82916: LIS: fix handleMove to properly extend main range.

Can you please add a LiveInterval dump (possibly truncated) for the test before and after each move to this review? It's a bit hard to follow what happens there.

Jul 7 2020, 5:07 AM · Restricted Project

Jul 3 2020

vpykhtin committed rGbb69ca822aae: [AMDGPU] Don't combine DPP if DPP register is used more than once per… (authored by vpykhtin).
[AMDGPU] Don't combine DPP if DPP register is used more than once per…
Jul 3 2020, 5:22 AM
vpykhtin closed D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.
Jul 3 2020, 5:21 AM · Restricted Project

Jul 2 2020

vpykhtin updated the diff for D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.

Update before commit: used isIdenticalTo, rebased.

Jul 2 2020, 4:47 AM · Restricted Project
vpykhtin added a comment to D82580: [RegisterCoalescer] Dumper for JoinVals.

Ping

Jul 2 2020, 4:15 AM · Restricted Project
vpykhtin added a comment to D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.

Ping

Jul 2 2020, 4:15 AM · Restricted Project

Jun 26 2020

vpykhtin added inline comments to D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.
Jun 26 2020, 3:45 AM · Restricted Project
vpykhtin updated the diff for D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.

Rebased, added check if use is Src0 or Src1

Jun 26 2020, 3:13 AM · Restricted Project
vpykhtin added inline comments to D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.
Jun 26 2020, 2:40 AM · Restricted Project
vpykhtin updated the diff for D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.

Indeed, thanks Jay, updated.

Jun 26 2020, 2:08 AM · Restricted Project
vpykhtin updated the summary of D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.
Jun 26 2020, 1:36 AM · Restricted Project

Jun 25 2020

vpykhtin updated the diff for D82580: [RegisterCoalescer] Dumper for JoinVals.

Rebased, per review issues fixed, moved VNInfo::print definition ot of class.

Jun 25 2020, 10:53 PM · Restricted Project
vpykhtin updated the summary of D82580: [RegisterCoalescer] Dumper for JoinVals.
Jun 25 2020, 10:53 PM · Restricted Project
vpykhtin added inline comments to D82580: [RegisterCoalescer] Dumper for JoinVals.
Jun 25 2020, 12:28 PM · Restricted Project
vpykhtin added inline comments to D82580: [RegisterCoalescer] Dumper for JoinVals.
Jun 25 2020, 11:54 AM · Restricted Project
vpykhtin added inline comments to D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.
Jun 25 2020, 10:46 AM · Restricted Project
vpykhtin updated the summary of D82580: [RegisterCoalescer] Dumper for JoinVals.
Jun 25 2020, 10:46 AM · Restricted Project
vpykhtin updated the summary of D82580: [RegisterCoalescer] Dumper for JoinVals.
Jun 25 2020, 10:46 AM · Restricted Project
vpykhtin created D82580: [RegisterCoalescer] Dumper for JoinVals.
Jun 25 2020, 10:46 AM · Restricted Project
vpykhtin added inline comments to D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.
Jun 25 2020, 10:13 AM · Restricted Project
vpykhtin abandoned D82451: [AMDGPU] Fix DPP Combiner:.

split to parts

Jun 25 2020, 8:00 AM · Restricted Project
vpykhtin created D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction.
Jun 25 2020, 8:00 AM · Restricted Project
vpykhtin added a comment to D82451: [AMDGPU] Fix DPP Combiner:.
  1. skip multiple per instruction DPP register usage.
  2. don't combine when DPP register is used as part of superreg/supersubreg.

I had to refactor the code to fix the first issue,

Would it make sense to split this patch into two or three? Refactoring, fix bug 1, fix bug 2?

Jun 25 2020, 4:42 AM · Restricted Project
vpykhtin updated the diff for D82451: [AMDGPU] Fix DPP Combiner:.

Rebased, per review issues fixed:

Jun 25 2020, 4:09 AM · Restricted Project

Jun 24 2020

vpykhtin added inline comments to D82451: [AMDGPU] Fix DPP Combiner:.
Jun 24 2020, 8:36 AM · Restricted Project
vpykhtin created D82451: [AMDGPU] Fix DPP Combiner:.
Jun 24 2020, 4:49 AM · Restricted Project

Jun 20 2020

vpykhtin created D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining.
Jun 20 2020, 7:23 AM · Restricted Project

Jun 9 2020

vpykhtin updated the diff for D81275: [AMDGPU] Move default initialization of M0 register after the instruction selection.

Updated patch. Everything is done except I decided to left readsM0 check for the no-ret atomics case.

Jun 9 2020, 7:39 AM · Restricted Project