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Differential D156383

[RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types
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Authored by nitinjohnraj on Jul 26 2023, 4:23 PM.

Details

Reviewers
craig.topper
arsenm
Commits
rGb8fef7a6d401: [RISCV][GlobalISel] Legalize constants, undefined values, extension…
Summary

Test legalization for (s7, s8, s16, s32, s48, s64, s96) for rv32, (s8, s15, s16, s32, s64, s72, s128, s192) for rv64.

Diff Detail

Unit TestsFailed

TimeTest
60,040 msx64 debian > MLIR.Examples/standalone::test.toy

Event Timeline

nitinjohnraj created this revision.Jul 26 2023, 4:23 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 26 2023, 4:23 PM
Herald added subscribers: jobnoorman, luke, VincentWu and 28 others. · View Herald Transcript
nitinjohnraj requested review of this revision.Jul 26 2023, 4:23 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 26 2023, 4:23 PM
Herald added subscribers: llvm-commits, wangpc, eopXD and 2 others. · View Herald Transcript
Harbormaster completed remote builds in B248399: Diff 544552.Jul 26 2023, 8:22 PM
nitinjohnraj added a parent revision: D156380: [RISCV][GlobalISel] Fix tests for addition, subtraction and logical instructions.Jul 27 2023, 12:06 PM
nitinjohnraj added a child revision: D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types.Jul 27 2023, 12:36 PM
tschuett added a subscriber: tschuett.Jul 27 2023, 12:41 PM
nitinjohnraj retitled this revision from [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions to [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types.Jul 27 2023, 2:15 PM
nitinjohnraj updated this revision to Diff 544937.Jul 27 2023, 2:43 PM

Added tests for odd sizes

nitinjohnraj edited the summary of this revision. (Show Details)Jul 27 2023, 2:46 PM
nitinjohnraj updated this revision to Diff 544959.Jul 27 2023, 3:31 PM

Added tests for s48 on rv32 and s72 on rv64

nitinjohnraj edited the summary of this revision. (Show Details)Jul 27 2023, 3:33 PM
Harbormaster completed remote builds in B248712: Diff 544959.Jul 27 2023, 5:16 PM
craig.topper added inline comments.Jul 31 2023, 1:28 PM
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
36

Can't we just handle 2 * XLen in the next if. We're not trying to support vectors so we don't need a vector exception

37

This comment is wrong. This isn't s128 if XLen is 32.

41

Why are we allowing 2 and 4 here?

47

128 here is also wrong

nitinjohnraj updated this revision to Diff 546143.Aug 1 2023, 10:53 AM

Addressed comments

nitinjohnraj updated this revision to Diff 546157.Aug 1 2023, 11:16 AM

Rebased

Harbormaster completed remote builds in B249560: Diff 546157.Aug 1 2023, 12:38 PM
craig.topper added inline comments.Aug 1 2023, 3:59 PM
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
38

Shouldn't that be DstSize > Xlen not DstSize >= 2 * XLen? Thought it won't make a difference since anything between XLen and XLen*2 isn't a power of 2 so the !isPowerOf2_32(DstSize) will reject it.

nitinjohnraj retitled this revision from [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types to [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions.Aug 3 2023, 10:40 AM
nitinjohnraj edited the summary of this revision. (Show Details)
nitinjohnraj updated this revision to Diff 546941.Aug 3 2023, 10:40 AM
nitinjohnraj marked 3 inline comments as done.
nitinjohnraj retitled this revision from [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions to [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types.
nitinjohnraj edited the summary of this revision. (Show Details)

Address comments

nitinjohnraj marked 2 inline comments as done.Aug 3 2023, 10:42 AM
nitinjohnraj added inline comments.
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
38

I think you're right.

craig.topper accepted this revision.Aug 3 2023, 10:44 AM

LGTM

This revision is now accepted and ready to land.Aug 3 2023, 10:44 AM
Harbormaster completed remote builds in B250126: Diff 546941.Aug 3 2023, 1:23 PM
This revision was landed with ongoing or failed builds.Aug 7 2023, 11:26 AM
Closed by commit rGb8fef7a6d401: [RISCV][GlobalISel] Legalize constants, undefined values, extension… (authored by nitinjohnraj). · Explain Why
This revision was automatically updated to reflect the committed changes.
nitinjohnraj added a commit: rGb8fef7a6d401: [RISCV][GlobalISel] Legalize constants, undefined values, extension….

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
GISel/
43 lines
test/
CodeGen/
RISCV/
GlobalISel/
legalizer/
rv32/
113 lines
113 lines
rv64/
127 lines
127 lines

Diff 544959

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Show All 23 LinesRISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
const LLT XLenLLT = LLT::scalar(XLen); const LLT XLenLLT = LLT::scalar(XLen);
using namespace TargetOpcode; using namespace TargetOpcode;
getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR}) getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR})
.legalFor({XLenLLT}) .legalFor({XLenLLT})
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
// Extensions
auto ExtLegalFunc = [=](const LegalityQuery &Query) {
unsigned DstSize = Query.Types[0].getSizeInBits();
if (DstSize == 2 * XLen && !Query.Types[0].isVector())
craig.topperUnsubmitted
Done
ReplyInline Actions

Can't we just handle 2 * XLen in the next if. We're not trying to support vectors so we don't need a vector exception

craig.topper: Can't we just handle 2 * XLen in the next if. We're not trying to support vectors so we don't…
return false; // Extending to a scalar s128 needs narrowing.
craig.topperUnsubmitted
Done
ReplyInline Actions

This comment is wrong. This isn't s128 if XLen is 32.

craig.topper: This comment is wrong. This isn't s128 if XLen is 32.
craig.topperUnsubmitted
Done
ReplyInline Actions

Shouldn't that be DstSize > Xlen not DstSize >= 2 * XLen? Thought it won't make a difference since anything between XLen and XLen*2 isn't a power of 2 so the !isPowerOf2_32(DstSize) will reject it.

craig.topper: Shouldn't that be `DstSize > Xlen` not `DstSize >= 2 * XLen`? Thought it won't make a…
nitinjohnrajAuthorUnsubmitted
Done
ReplyInline Actions

I think you're right.

nitinjohnraj: I think you're right.
// Make sure that we have something that will fit in a register, and
// make sure it's a power of 2.
if (DstSize < 1 || DstSize > 2 * XLen || !isPowerOf2_32(DstSize))
craig.topperUnsubmitted
Done
ReplyInline Actions

Why are we allowing 2 and 4 here?

craig.topper: Why are we allowing 2 and 4 here?
return false;
const LLT SrcTy = Query.Types[1];
// Make sure we fit in a register otherwise. Don't bother checking that
// the source type is below 128 bits. We shouldn't be allowing anything
craig.topperUnsubmitted
Done
ReplyInline Actions

128 here is also wrong

craig.topper: 128 here is also wrong
// through which is wider than the destination in the first place.
unsigned SrcSize = SrcTy.getSizeInBits();
if (SrcSize < 1 || !isPowerOf2_32(SrcSize))
return false;
return true;
};
getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
.legalIf(ExtLegalFunc)
.clampScalar(0, XLenLLT, XLenLLT);
// Merge/Unmerge
for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
getActionDefinitionsBuilder(Op)
.widenScalarToNextPow2(LitTyIdx, XLen)
.widenScalarToNextPow2(BigTyIdx, XLen)
.clampScalar(LitTyIdx, XLenLLT, XLenLLT)
.clampScalar(BigTyIdx, XLenLLT, XLenLLT);
}
getActionDefinitionsBuilder({G_CONSTANT, G_IMPLICIT_DEF})
.legalFor({XLenLLT})
.widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT);
getLegacyLegalizerInfo().computeTables(); getLegacyLegalizerInfo().computeTables();
} }

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-const.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
---
name: const_i7
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i7
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 15
; CHECK-NEXT: $x10 = COPY [[C]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s7) = G_CONSTANT i7 15
%1:_(s32) = G_ANYEXT %0(s7)
$x10 = COPY %1(s32)
PseudoRET implicit $x10
...
---
name: const_i8
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i8
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -127
; CHECK-NEXT: $x10 = COPY [[C]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s8) = G_CONSTANT i8 129
%1:_(s32) = G_ANYEXT %0(s8)
$x10 = COPY %1(s32)
PseudoRET implicit $x10
...
---
name: const_i16
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i16
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; CHECK-NEXT: $x10 = COPY [[C]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s16) = G_CONSTANT i16 -32769
%1:_(s32) = G_ANYEXT %0(s16)
$x10 = COPY %1(s32)
PseudoRET implicit $x10
...
---
name: const_i32
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i32
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483647
; CHECK-NEXT: $x10 = COPY [[C]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = G_CONSTANT i32 2147483649
$x10 = COPY %0(s32)
PseudoRET implicit $x10
...
---
name: const_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i48
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: $x10 = COPY [[C]](s32)
; CHECK-NEXT: $x11 = COPY [[C1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s48) = G_CONSTANT i48 2
%1:_(s64) = G_ANYEXT %0(s48)
%2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
$x10 = COPY %2(s32)
$x11 = COPY %3(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: const_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i64
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483647
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: $x10 = COPY [[C]](s32)
; CHECK-NEXT: $x11 = COPY [[C1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s64) = G_CONSTANT i64 2147483649
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)
$x10 = COPY %1(s32)
$x11 = COPY %2(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: const_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i96
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -121
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -51
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: $x10 = COPY [[C]](s32)
; CHECK-NEXT: $x11 = COPY [[C1]](s32)
; CHECK-NEXT: $x12 = COPY [[C2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s96) = G_CONSTANT i96 -214748364921
%1:_(s32), %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %0(s96)
$x10 = COPY %1(s32)
$x11 = COPY %2(s32)
$x12 = COPY %3(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-implicit-def.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
---
name: implicit_def_i7
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i7
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s7) = G_IMPLICIT_DEF
%1:_(s32) = G_ANYEXT %0(s7)
$x10 = COPY %1(s32)
PseudoRET implicit $x10
...
---
name: implicit_def_i8
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i8
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s8) = G_IMPLICIT_DEF
%1:_(s32) = G_ANYEXT %0(s8)
$x10 = COPY %1(s32)
PseudoRET implicit $x10
...
---
name: implicit_def_i16
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i16
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s16) = G_IMPLICIT_DEF
%1:_(s32) = G_ANYEXT %0(s16)
$x10 = COPY %1(s32)
PseudoRET implicit $x10
...
---
name: implicit_def_i32
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i32
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = G_IMPLICIT_DEF
$x10 = COPY %0(s32)
PseudoRET implicit $x10
...
---
name: implicit_def_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i48
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s32)
; CHECK-NEXT: $x11 = COPY [[DEF1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s48) = G_IMPLICIT_DEF
%1:_(s64) = G_ANYEXT %0(s48)
%2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
$x10 = COPY %2(s32)
$x11 = COPY %3(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: implicit_def_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i64
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s32)
; CHECK-NEXT: $x11 = COPY [[DEF1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s64) = G_IMPLICIT_DEF
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)
$x10 = COPY %1(s32)
$x11 = COPY %2(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: implicit_def_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i96
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s32)
; CHECK-NEXT: $x11 = COPY [[DEF1]](s32)
; CHECK-NEXT: $x12 = COPY [[DEF2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s96) = G_IMPLICIT_DEF
%1:_(s32), %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %0(s96)
$x10 = COPY %1(s32)
$x11 = COPY %2(s32)
$x12 = COPY %3(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-const.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
---
name: const_i8
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i8
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -127
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s8) = G_CONSTANT i8 129
%1:_(s64) = G_ANYEXT %0(s8)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: const_i15
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i15
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s15) = G_CONSTANT i15 15
%1:_(s64) = G_ANYEXT %0(s15)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: const_i16
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i16
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 767
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s16) = G_CONSTANT i16 -64769
%1:_(s64) = G_ANYEXT %0(s16)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: const_i32
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i32
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -64769
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = G_CONSTANT i32 -64769
%1:_(s64) = G_ANYEXT %0(s32)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: const_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i64
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2147483649
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = G_CONSTANT i64 2147483649
$x10 = COPY %0(s64)
PseudoRET implicit $x10
...
---
name: const_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i72
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -2147483649312
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: $x11 = COPY [[C1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s72) = G_CONSTANT i72 -2147483649312
%1:_(s128) = G_ANYEXT %0(s72)
%2:_(s64), %3:_(s64) = G_UNMERGE_VALUES %1(s128)
$x10 = COPY %2(s64)
$x11 = COPY %3(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: const_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i128
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 21474831289
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: $x11 = COPY [[C1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s128) = G_CONSTANT i128 21474831289
%1:_(s64), %2:_(s64) = G_UNMERGE_VALUES %0(s128)
$x10 = COPY %1(s64)
$x11 = COPY %2(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: const_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: const_i192
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -214772364921
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-NEXT: $x10 = COPY [[C]](s64)
; CHECK-NEXT: $x11 = COPY [[C1]](s64)
; CHECK-NEXT: $x12 = COPY [[C2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s192) = G_CONSTANT i192 -214772364921
%1:_(s64), %2:_(s64), %3:_(s64) = G_UNMERGE_VALUES %0(s192)
$x10 = COPY %1(s64)
$x11 = COPY %2(s64)
$x12 = COPY %3(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-implicit-def.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
---
name: implicit_def_i8
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i8
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s8) = G_IMPLICIT_DEF
%1:_(s64) = G_ANYEXT %0(s8)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: implicit_def_i15
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i15
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s15) = G_IMPLICIT_DEF
%1:_(s64) = G_ANYEXT %0(s15)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: implicit_def_i16
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i16
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s16) = G_IMPLICIT_DEF
%1:_(s64) = G_ANYEXT %0(s16)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: implicit_def_i32
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i32
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = G_IMPLICIT_DEF
%1:_(s64) = G_ANYEXT %0(s32)
$x10 = COPY %1(s64)
PseudoRET implicit $x10
...
---
name: implicit_def_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i64
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = G_IMPLICIT_DEF
$x10 = COPY %0(s64)
PseudoRET implicit $x10
...
---
name: implicit_def_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i72
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: $x11 = COPY [[DEF1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s72) = G_IMPLICIT_DEF
%1:_(s128) = G_ANYEXT %0(s72)
%2:_(s64), %3:_(s64) = G_UNMERGE_VALUES %1(s128)
$x10 = COPY %2(s64)
$x11 = COPY %3(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: implicit_def_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i128
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: $x11 = COPY [[DEF1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s128) = G_IMPLICIT_DEF
%1:_(s64), %2:_(s64) = G_UNMERGE_VALUES %0(s128)
$x10 = COPY %1(s64)
$x11 = COPY %2(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: implicit_def_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: implicit_def_i192
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
; CHECK-NEXT: $x11 = COPY [[DEF1]](s64)
; CHECK-NEXT: $x12 = COPY [[DEF2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s192) = G_IMPLICIT_DEF
%1:_(s64), %2:_(s64), %3:_(s64) = G_UNMERGE_VALUES %0(s192)
$x10 = COPY %1(s64)
$x11 = COPY %2(s64)
$x12 = COPY %3(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...