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Differential D156380

[RISCV][GlobalISel] Fix tests for addition, subtraction and logical instructions
ClosedPublic

Authored by nitinjohnraj on Jul 26 2023, 3:56 PM.

Details

Reviewers
craig.topper
arsenm
Commits
rG1b74459df8a6: [RISCV][GlobalISel] Fix tests for addition, subtraction and logical instructions
Summary

Fix a bug introduced in a previous commit.

Diff Detail

Revision Contents

PathSize
llvm/
test/
CodeGen/
RISCV/
GlobalISel/
legalizer/
rv32/
14 lines
14 lines
22 lines
14 lines
14 lines
rv64/
21 lines
21 lines
21 lines
21 lines
21 lines

Diff 547844

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: add_i8 name: add_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i8 ; CHECK-LABEL: name: add_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[ADD]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s32) ; CHECK-NEXT: $x10 = COPY [[ADD]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_ADD %3, %4 %4:_(s8) = G_ADD %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i16 name: add_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i16 ; CHECK-LABEL: name: add_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[ADD]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s32) ; CHECK-NEXT: $x10 = COPY [[ADD]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_ADD %3, %4 %4:_(s16) = G_ADD %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i32 name: add_i32
body: | body: |
Show All 14 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: and_i8 name: and_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i8 ; CHECK-LABEL: name: and_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[AND]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s32) ; CHECK-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_AND %3, %4 %4:_(s8) = G_AND %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i16 name: and_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i16 ; CHECK-LABEL: name: and_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[AND]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s32) ; CHECK-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_AND %3, %4 %4:_(s16) = G_AND %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i32 name: and_i32
body: | body: |
▲ Show 20 Lines • Show All 75 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: or_i8 name: or_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i8 ; CHECK-LABEL: name: or_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[OR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s32) ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_OR %3, %4 %4:_(s8) = G_OR %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i16 name: or_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i16 ; CHECK-LABEL: name: or_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[OR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s32) ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_OR %3, %4 %4:_(s16) = G_OR %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i32 name: or_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i32 ; CHECK-LABEL: name: or_i32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]] ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s32) ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s32) = G_OR %0, %1 %2:_(s32) = G_OR %0, %1
$x10 = COPY %2(s32) $x10 = COPY %2(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i64 name: or_i64
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i64 ; CHECK-LABEL: name: or_i64
; CHECK: %hi1:_(s32) = COPY $x10 ; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %lo1:_(s32) = COPY $x11 ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
; CHECK-NEXT: %hi2:_(s32) = COPY $x12 ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
; CHECK-NEXT: %lo2:_(s32) = COPY $x13 ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2
; CHECK-NEXT: $x10 = COPY [[OR]](s32) ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: $x11 = COPY [[OR1]](s32) ; CHECK-NEXT: $x11 = COPY [[OR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%hi1:_(s32) = COPY $x10 %hi1:_(s32) = COPY $x10
%lo1:_(s32) = COPY $x11 %lo1:_(s32) = COPY $x11
%hi2:_(s32) = COPY $x12 %hi2:_(s32) = COPY $x12
%lo2:_(s32) = COPY $x13 %lo2:_(s32) = COPY $x13
%x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32) %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
%x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32) %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
%y:_(s64) = G_OR %x1, %x2 %y:_(s64) = G_OR %x1, %x2
%hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64) %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
$x10 = COPY %hiy(s32) $x10 = COPY %hiy(s32)
$x11 = COPY %loy(s32) $x11 = COPY %loy(s32)
PseudoRET implicit $x10, implicit $x11 PseudoRET implicit $x10, implicit $x11
... ...
--- ---
name: and_i96 name: or_i96
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i96 ; CHECK-LABEL: name: or_i96
; CHECK: %hi1:_(s32) = COPY $x10 ; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11 ; CHECK-NEXT: %mid1:_(s32) = COPY $x11
; CHECK-NEXT: %lo1:_(s32) = COPY $x12 ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
; CHECK-NEXT: %hi2:_(s32) = COPY $x13 ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14 ; CHECK-NEXT: %mid2:_(s32) = COPY $x14
; CHECK-NEXT: %lo2:_(s32) = COPY $x15 ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %mid1, %mid2 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %mid1, %mid2
Show All 21 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: sub_i8 name: sub_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i8 ; CHECK-LABEL: name: sub_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[SUB]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s32) ; CHECK-NEXT: $x10 = COPY [[SUB]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_SUB %3, %4 %4:_(s8) = G_SUB %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i16 name: sub_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i16 ; CHECK-LABEL: name: sub_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[SUB]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s32) ; CHECK-NEXT: $x10 = COPY [[SUB]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_SUB %3, %4 %4:_(s16) = G_SUB %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i32 name: sub_i32
body: | body: |
Show All 14 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: xor_i8 name: xor_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i8 ; CHECK-LABEL: name: xor_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[XOR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s32) ; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_XOR %3, %4 %4:_(s8) = G_XOR %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i16 name: xor_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i16 ; CHECK-LABEL: name: xor_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[XOR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s32) ; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_XOR %3, %4 %4:_(s16) = G_XOR %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i32 name: xor_i32
body: | body: |
▲ Show 20 Lines • Show All 75 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: add_i8 name: add_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i8 ; CHECK-LABEL: name: add_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ADD]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_ADD %3, %4 %4:_(s8) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i16 name: add_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i16 ; CHECK-LABEL: name: add_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ADD]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_ADD %3, %4 %4:_(s16) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i32 name: add_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i32 ; CHECK-LABEL: name: add_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ADD]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_ADD %3, %4 %4:_(s32) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i64 name: add_i64
body: | body: |
Show All 14 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: and_i8 name: and_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i8 ; CHECK-LABEL: name: and_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[AND]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s64) ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_AND %3, %4 %4:_(s8) = G_AND %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i16 name: and_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i16 ; CHECK-LABEL: name: and_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[AND]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s64) ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_AND %3, %4 %4:_(s16) = G_AND %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i32 name: and_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i32 ; CHECK-LABEL: name: and_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[AND]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s64) ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_AND %3, %4 %4:_(s32) = G_AND %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i64 name: and_i64
body: | body: |
▲ Show 20 Lines • Show All 75 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: or_i8 name: or_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i8 ; CHECK-LABEL: name: or_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[OR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s64) ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_OR %3, %4 %4:_(s8) = G_OR %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i16 name: or_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i16 ; CHECK-LABEL: name: or_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[OR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s64) ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_OR %3, %4 %4:_(s16) = G_OR %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i32 name: or_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i32 ; CHECK-LABEL: name: or_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[OR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s64) ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_OR %3, %4 %4:_(s32) = G_OR %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i64 name: or_i64
body: | body: |
▲ Show 20 Lines • Show All 75 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: sub_i8 name: sub_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i8 ; CHECK-LABEL: name: sub_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[SUB]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_SUB %3, %4 %4:_(s8) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i16 name: sub_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i16 ; CHECK-LABEL: name: sub_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[SUB]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_SUB %3, %4 %4:_(s16) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i32 name: sub_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i32 ; CHECK-LABEL: name: sub_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[SUB]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_SUB %3, %4 %4:_(s32) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i64 name: sub_i64
body: | body: |
Show All 14 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: xor_i8 name: xor_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i8 ; CHECK-LABEL: name: xor_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[XOR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s64) ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_XOR %3, %4 %4:_(s8) = G_XOR %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i16 name: xor_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i16 ; CHECK-LABEL: name: xor_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[XOR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s64) ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_XOR %3, %4 %4:_(s16) = G_XOR %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i32 name: xor_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i32 ; CHECK-LABEL: name: xor_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[XOR]] ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s64) ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_XOR %3, %4 %4:_(s32) = G_XOR %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i64 name: xor_i64
body: | body: |
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