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Differential D154993

AtomicExpand: Fix expanding atomics into unconstrained FP in strictfp functions
ClosedPublic

Authored by arsenm on Jul 11 2023, 11:26 AM.

Details

Reviewers
kpn
foad
reames
efriedma
sepavloff
jyknight
Summary

Ideally the normal fadd/fmin/fmax this was creating would fail the verifier.
It's probably also necessary to force off FP exception handlers in the cmpxchg
loop but we don't have a generic way to do that now.

Note strictfp builder is broken in the minnum/maxnum case

Diff Detail

Event Timeline

arsenm created this revision.Jul 11 2023, 11:26 AM
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Herald added subscribers: StephenFan, kerbowa, hiraditya, jvesely. · View Herald Transcript
arsenm requested review of this revision.Jul 11 2023, 11:26 AM
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arsenm added a child revision: D154994: IRBuilder: Fix not handling strictfp minnum/maxnum.Jul 11 2023, 11:28 AM
kpn added a comment.Jul 11 2023, 11:35 AM

We're going to run into this in other cases as well.

Can these functions be called for instructions that are in blocks that are not currently in a function? I seem to remember we ran into that odd case sometime back.

I'll have to trust you on the AMDGPU and X86 instructions.

arsenm added a comment.Jul 11 2023, 11:37 AM
In D154993#4490616, @kpn wrote:

We're going to run into this in other cases as well.

Can these functions be called for instructions that are in blocks that are not currently in a function? I seem to remember we ran into that odd case sometime back.

No, this is for straightforward lowering. I was debating whether the IRBuilder constructor should take care of this for you

kpn accepted this revision.Jul 11 2023, 11:39 AM

OK, LGTM.

This revision is now accepted and ready to land.Jul 11 2023, 11:39 AM
jyknight added inline comments.Jul 11 2023, 12:54 PM
llvm/lib/CodeGen/AtomicExpandPass.cpp
1582

I'd reword: "If FP exceptions are observable".
And, FTR, GCC does already do this (and it's required by the spec). So we should actually fix that at some point. :)

arsenm mentioned this in rG3701ebe76b99: AtomicExpand: Fix expanding atomics into unconstrained FP in strictfp functions.Jul 11 2023, 3:58 PM
arsenm closed this revision.Jul 11 2023, 3:59 PM
arsenm marked an inline comment as done.

3701ebe76b998a55993f605c2fb323c25cc0086b

arsenm added inline comments.Jul 11 2023, 4:10 PM
llvm/lib/CodeGen/AtomicExpandPass.cpp
1582

Filed https://github.com/llvm/llvm-project/issues/63812

Harbormaster completed remote builds in B244550: Diff 539208.Jul 11 2023, 4:52 PM

Revision Contents

PathSize
llvm/
lib/
CodeGen/
5 lines
Transforms/
Utils/
3 lines
test/
Transforms/
AtomicExpand/
AMDGPU/
172 lines
147 lines
147 lines
147 lines

Diff 539208

llvm/lib/CodeGen/AtomicExpandPass.cpp

Show First 20 Lines • Show All 1,570 Lines • ▼ Show 20 Lines case TargetLoweringBase::AtomicExpansionKind::NotAtomic:
return lowerAtomicCmpXchgInst(CI); return lowerAtomicCmpXchgInst(CI);
} }
} }
// Note: This function is exposed externally by AtomicExpandUtils.h // Note: This function is exposed externally by AtomicExpandUtils.h
bool llvm::expandAtomicRMWToCmpXchg(AtomicRMWInst *AI, bool llvm::expandAtomicRMWToCmpXchg(AtomicRMWInst *AI,
CreateCmpXchgInstFun CreateCmpXchg) { CreateCmpXchgInstFun CreateCmpXchg) {
ReplacementIRBuilder Builder(AI, AI->getModule()->getDataLayout()); ReplacementIRBuilder Builder(AI, AI->getModule()->getDataLayout());
Builder.setIsFPConstrained(
AI->getFunction()->hasFnAttribute(Attribute::StrictFP));
// FIXME: If FP exceptions are enabled, we should force them off for the loop
jyknightUnsubmitted
Done
ReplyInline Actions

I'd reword: "If FP exceptions are observable".
And, FTR, GCC does already do this (and it's required by the spec). So we should actually fix that at some point. :)

jyknight: I'd reword: "If FP exceptions are observable". And, FTR, GCC does already do this (and it's…
arsenmAuthorUnsubmitted
Done
ReplyInline Actions

Filed https://github.com/llvm/llvm-project/issues/63812

arsenm: Filed https://github.com/llvm/llvm-project/issues/63812
// for the FP atomics.
Value *Loaded = AtomicExpand::insertRMWCmpXchgLoop( Value *Loaded = AtomicExpand::insertRMWCmpXchgLoop(
Builder, AI->getType(), AI->getPointerOperand(), AI->getAlign(), Builder, AI->getType(), AI->getPointerOperand(), AI->getAlign(),
AI->getOrdering(), AI->getSyncScopeID(), AI->getOrdering(), AI->getSyncScopeID(),
[&](IRBuilderBase &Builder, Value *Loaded) { [&](IRBuilderBase &Builder, Value *Loaded) {
return buildAtomicRMWValue(AI->getOperation(), Builder, Loaded, return buildAtomicRMWValue(AI->getOperation(), Builder, Loaded,
AI->getValOperand()); AI->getValOperand());
}, },
CreateCmpXchg); CreateCmpXchg);
▲ Show 20 Lines • Show All 383 Lines • Show Last 20 Lines

llvm/lib/Transforms/Utils/LowerAtomic.cpp

Show First 20 Lines • Show All 95 Lines • ▼ Show 20 LinesValue *llvm::buildAtomicRMWValue(AtomicRMWInst::BinOp Op,
} }
default: default:
llvm_unreachable("Unknown atomic op"); llvm_unreachable("Unknown atomic op");
} }
} }
bool llvm::lowerAtomicRMWInst(AtomicRMWInst *RMWI) { bool llvm::lowerAtomicRMWInst(AtomicRMWInst *RMWI) {
IRBuilder<> Builder(RMWI); IRBuilder<> Builder(RMWI);
Builder.setIsFPConstrained(
RMWI->getFunction()->hasFnAttribute(Attribute::StrictFP));
Value *Ptr = RMWI->getPointerOperand(); Value *Ptr = RMWI->getPointerOperand();
Value *Val = RMWI->getValOperand(); Value *Val = RMWI->getValOperand();
LoadInst *Orig = Builder.CreateLoad(Val->getType(), Ptr); LoadInst *Orig = Builder.CreateLoad(Val->getType(), Ptr);
Value *Res = buildAtomicRMWValue(RMWI->getOperation(), Builder, Orig, Val); Value *Res = buildAtomicRMWValue(RMWI->getOperation(), Builder, Orig, Val);
Builder.CreateStore(Res, Ptr); Builder.CreateStore(Res, Ptr);
RMWI->replaceAllUsesWith(Orig); RMWI->replaceAllUsesWith(Orig);
RMWI->eraseFromParent(); RMWI->eraseFromParent();
return true; return true;
} }

llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll

Show First 20 Lines • Show All 1,895 Lines • ▼ Show 20 Lines
; GFX11-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GFX11-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GFX11: atomicrmw.end: ; GFX11: atomicrmw.end:
; GFX11-NEXT: ret float [[TMP5]] ; GFX11-NEXT: ret float [[TMP5]]
; ;
%res = atomicrmw fadd ptr addrspace(1) %ptr, float %value syncscope("one-as") monotonic %res = atomicrmw fadd ptr addrspace(1) %ptr, float %value syncscope("one-as") monotonic
ret float %res ret float %res
} }
define void @test_atomicrmw_fadd_f32_global_no_use_unsafe_structfp(ptr addrspace(1) %ptr, float %value) #1 {
; CI-LABEL: @test_atomicrmw_fadd_f32_global_no_use_unsafe_structfp(
; CI-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4
; CI-NEXT: br label [[ATOMICRMW_START:%.*]]
; CI: atomicrmw.start:
; CI-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; CI-NEXT: [[NEW:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float [[LOADED]], float [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR6:[0-9]+]]
; CI-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
; CI-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
; CI-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP3]], i32 [[TMP2]] syncscope("wavefront") monotonic monotonic, align 4
; CI-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
; CI-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
; CI-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
; CI-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; CI: atomicrmw.end:
; CI-NEXT: ret void
;
; GFX9-LABEL: @test_atomicrmw_fadd_f32_global_no_use_unsafe_structfp(
; GFX9-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4
; GFX9-NEXT: br label [[ATOMICRMW_START:%.*]]
; GFX9: atomicrmw.start:
; GFX9-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GFX9-NEXT: [[NEW:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float [[LOADED]], float [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR6:[0-9]+]]
; GFX9-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
; GFX9-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
; GFX9-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP3]], i32 [[TMP2]] syncscope("wavefront") monotonic monotonic, align 4
; GFX9-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
; GFX9-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
; GFX9-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
; GFX9-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GFX9: atomicrmw.end:
; GFX9-NEXT: ret void
;
; GFX908-LABEL: @test_atomicrmw_fadd_f32_global_no_use_unsafe_structfp(
; GFX908-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[PTR:%.*]], float [[VALUE:%.*]] syncscope("wavefront") monotonic, align 4
; GFX908-NEXT: ret void
;
; GFX90A-LABEL: @test_atomicrmw_fadd_f32_global_no_use_unsafe_structfp(
; GFX90A-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[PTR:%.*]], float [[VALUE:%.*]] syncscope("wavefront") monotonic, align 4
; GFX90A-NEXT: ret void
;
; GFX940-LABEL: @test_atomicrmw_fadd_f32_global_no_use_unsafe_structfp(
; GFX940-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[PTR:%.*]], float [[VALUE:%.*]] syncscope("wavefront") monotonic, align 4
; GFX940-NEXT: ret void
;
; GFX11-LABEL: @test_atomicrmw_fadd_f32_global_no_use_unsafe_structfp(
; GFX11-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[PTR:%.*]], float [[VALUE:%.*]] syncscope("wavefront") monotonic, align 4
; GFX11-NEXT: ret void
;
%res = atomicrmw fadd ptr addrspace(1) %ptr, float %value syncscope("wavefront") monotonic
ret void
}
define double @test_atomicrmw_fadd_f64_global_unsafe_strictfp(ptr addrspace(1) %ptr, double %value) #1 {
; CI-LABEL: @test_atomicrmw_fadd_f64_global_unsafe_strictfp(
; CI-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; CI-NEXT: br label [[ATOMICRMW_START:%.*]]
; CI: atomicrmw.start:
; CI-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; CI-NEXT: [[NEW:%.*]] = call double @llvm.experimental.constrained.fadd.f64(double [[LOADED]], double [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR6]]
; CI-NEXT: [[TMP2:%.*]] = bitcast double [[NEW]] to i64
; CI-NEXT: [[TMP3:%.*]] = bitcast double [[LOADED]] to i64
; CI-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP3]], i64 [[TMP2]] syncscope("wavefront") monotonic monotonic, align 8
; CI-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP4]], 1
; CI-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP4]], 0
; CI-NEXT: [[TMP5]] = bitcast i64 [[NEWLOADED]] to double
; CI-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; CI: atomicrmw.end:
; CI-NEXT: ret double [[TMP5]]
;
; GFX9-LABEL: @test_atomicrmw_fadd_f64_global_unsafe_strictfp(
; GFX9-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GFX9-NEXT: br label [[ATOMICRMW_START:%.*]]
; GFX9: atomicrmw.start:
; GFX9-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GFX9-NEXT: [[NEW:%.*]] = call double @llvm.experimental.constrained.fadd.f64(double [[LOADED]], double [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR6]]
; GFX9-NEXT: [[TMP2:%.*]] = bitcast double [[NEW]] to i64
; GFX9-NEXT: [[TMP3:%.*]] = bitcast double [[LOADED]] to i64
; GFX9-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP3]], i64 [[TMP2]] syncscope("wavefront") monotonic monotonic, align 8
; GFX9-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP4]], 1
; GFX9-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP4]], 0
; GFX9-NEXT: [[TMP5]] = bitcast i64 [[NEWLOADED]] to double
; GFX9-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GFX9: atomicrmw.end:
; GFX9-NEXT: ret double [[TMP5]]
;
; GFX908-LABEL: @test_atomicrmw_fadd_f64_global_unsafe_strictfp(
; GFX908-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GFX908-NEXT: br label [[ATOMICRMW_START:%.*]]
; GFX908: atomicrmw.start:
; GFX908-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GFX908-NEXT: [[NEW:%.*]] = call double @llvm.experimental.constrained.fadd.f64(double [[LOADED]], double [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR6:[0-9]+]]
; GFX908-NEXT: [[TMP2:%.*]] = bitcast double [[NEW]] to i64
; GFX908-NEXT: [[TMP3:%.*]] = bitcast double [[LOADED]] to i64
; GFX908-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP3]], i64 [[TMP2]] syncscope("wavefront") monotonic monotonic, align 8
; GFX908-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP4]], 1
; GFX908-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP4]], 0
; GFX908-NEXT: [[TMP5]] = bitcast i64 [[NEWLOADED]] to double
; GFX908-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GFX908: atomicrmw.end:
; GFX908-NEXT: ret double [[TMP5]]
;
; GFX90A-LABEL: @test_atomicrmw_fadd_f64_global_unsafe_strictfp(
; GFX90A-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[PTR:%.*]], double [[VALUE:%.*]] syncscope("wavefront") monotonic, align 8
; GFX90A-NEXT: ret double [[RES]]
;
; GFX940-LABEL: @test_atomicrmw_fadd_f64_global_unsafe_strictfp(
; GFX940-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[PTR:%.*]], double [[VALUE:%.*]] syncscope("wavefront") monotonic, align 8
; GFX940-NEXT: ret double [[RES]]
;
; GFX11-LABEL: @test_atomicrmw_fadd_f64_global_unsafe_strictfp(
; GFX11-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GFX11-NEXT: br label [[ATOMICRMW_START:%.*]]
; GFX11: atomicrmw.start:
; GFX11-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GFX11-NEXT: [[NEW:%.*]] = call double @llvm.experimental.constrained.fadd.f64(double [[LOADED]], double [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR6:[0-9]+]]
; GFX11-NEXT: [[TMP2:%.*]] = bitcast double [[NEW]] to i64
; GFX11-NEXT: [[TMP3:%.*]] = bitcast double [[LOADED]] to i64
; GFX11-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP3]], i64 [[TMP2]] syncscope("wavefront") monotonic monotonic, align 8
; GFX11-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP4]], 1
; GFX11-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP4]], 0
; GFX11-NEXT: [[TMP5]] = bitcast i64 [[NEWLOADED]] to double
; GFX11-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GFX11: atomicrmw.end:
; GFX11-NEXT: ret double [[TMP5]]
;
%res = atomicrmw fadd ptr addrspace(1) %ptr, double %value syncscope("wavefront") monotonic
ret double %res
}
define float @test_atomicrmw_fadd_f32_local_strictfp(ptr addrspace(3) %ptr, float %value) #2 {
; CI-LABEL: @test_atomicrmw_fadd_f32_local_strictfp(
; CI-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(3) [[PTR:%.*]], align 4
; CI-NEXT: br label [[ATOMICRMW_START:%.*]]
; CI: atomicrmw.start:
; CI-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; CI-NEXT: [[NEW:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float [[LOADED]], float [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR6]]
; CI-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
; CI-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
; CI-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4
; CI-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
; CI-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
; CI-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
; CI-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; CI: atomicrmw.end:
; CI-NEXT: ret float [[TMP5]]
;
; GFX9-LABEL: @test_atomicrmw_fadd_f32_local_strictfp(
; GFX9-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(3) [[PTR:%.*]], float [[VALUE:%.*]] seq_cst, align 4
; GFX9-NEXT: ret float [[RES]]
;
; GFX908-LABEL: @test_atomicrmw_fadd_f32_local_strictfp(
; GFX908-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(3) [[PTR:%.*]], float [[VALUE:%.*]] seq_cst, align 4
; GFX908-NEXT: ret float [[RES]]
;
; GFX90A-LABEL: @test_atomicrmw_fadd_f32_local_strictfp(
; GFX90A-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(3) [[PTR:%.*]], float [[VALUE:%.*]] seq_cst, align 4
; GFX90A-NEXT: ret float [[RES]]
;
; GFX940-LABEL: @test_atomicrmw_fadd_f32_local_strictfp(
; GFX940-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(3) [[PTR:%.*]], float [[VALUE:%.*]] seq_cst, align 4
; GFX940-NEXT: ret float [[RES]]
;
; GFX11-LABEL: @test_atomicrmw_fadd_f32_local_strictfp(
; GFX11-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(3) [[PTR:%.*]], float [[VALUE:%.*]] seq_cst, align 4
; GFX11-NEXT: ret float [[RES]]
;
%res = atomicrmw fadd ptr addrspace(3) %ptr, float %value seq_cst
ret float %res
}
attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" "amdgpu-unsafe-fp-atomics"="true" } attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" "amdgpu-unsafe-fp-atomics"="true" }
attributes #1 = { strictfp "denormal-fp-math-f32"="preserve-sign,preserve-sign" "amdgpu-unsafe-fp-atomics"="true" }
attributes #2 = { strictfp}

llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmax.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -atomic-expand %s | FileCheck -check-prefix=GCN %s ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -atomic-expand %s | FileCheck -check-prefix=GCN %s
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -atomic-expand %s | FileCheck -check-prefix=GCN %s ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -atomic-expand %s | FileCheck -check-prefix=GCN %s
define float @test_atomicrmw_fmax_f32_flat(ptr %ptr, float %value) { define float @test_atomicrmw_fmax_f32_flat(ptr %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f32_flat( ; GCN-LABEL: @test_atomicrmw_fmax_f32_flat(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.maxnum.f32(float [[LOADED]], float [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.maxnum.f32(float [[LOADED]], float [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[TMP2]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
; GCN-NEXT: [[TMP5:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP5]], i32 [[TMP4]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP7]] ; GCN-NEXT: ret float [[TMP6]]
; ;
%res = atomicrmw fmax ptr %ptr, float %value seq_cst %res = atomicrmw fmax ptr %ptr, float %value seq_cst
ret float %res ret float %res
} }
define float @test_atomicrmw_fmax_f32_global(ptr addrspace(1) %ptr, float %value) { define float @test_atomicrmw_fmax_f32_global(ptr addrspace(1) %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f32_global( ; GCN-LABEL: @test_atomicrmw_fmax_f32_global(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.maxnum.f32(float [[LOADED]], float [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.maxnum.f32(float [[LOADED]], float [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[TMP2]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
; GCN-NEXT: [[TMP5:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP5]], i32 [[TMP4]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP7]] ; GCN-NEXT: ret float [[TMP6]]
; ;
%res = atomicrmw fmax ptr addrspace(1) %ptr, float %value seq_cst %res = atomicrmw fmax ptr addrspace(1) %ptr, float %value seq_cst
ret float %res ret float %res
} }
define float @test_atomicrmw_fmax_f32_local(ptr addrspace(3) %ptr, float %value) { define float @test_atomicrmw_fmax_f32_local(ptr addrspace(3) %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f32_local( ; GCN-LABEL: @test_atomicrmw_fmax_f32_local(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(3) [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(3) [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.maxnum.f32(float [[LOADED]], float [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.maxnum.f32(float [[LOADED]], float [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[TMP2]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
; GCN-NEXT: [[TMP5:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[TMP5]], i32 [[TMP4]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP7]] ; GCN-NEXT: ret float [[TMP6]]
; ;
%res = atomicrmw fmax ptr addrspace(3) %ptr, float %value seq_cst %res = atomicrmw fmax ptr addrspace(3) %ptr, float %value seq_cst
ret float %res ret float %res
} }
define half @test_atomicrmw_fmax_f16_flat(ptr %ptr, half %value) { define half @test_atomicrmw_fmax_f16_flat(ptr %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f16_flat( ; GCN-LABEL: @test_atomicrmw_fmax_f16_flat(
; GCN-NEXT: [[ALIGNEDADDR:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -4) ; GCN-NEXT: [[ALIGNEDADDR:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -4)
; GCN-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR]] to i64 ; GCN-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR]] to i64
; GCN-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3 ; GCN-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
; GCN-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3 ; GCN-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
; GCN-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32 ; GCN-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
; GCN-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]] ; GCN-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
; GCN-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1 ; GCN-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
; GCN-NEXT: [[TMP3:%.*]] = load i32, ptr [[ALIGNEDADDR]], align 4 ; GCN-NEXT: [[TMP3:%.*]] = load i32, ptr [[ALIGNEDADDR]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.maxnum.f16(half [[TMP4]], half [[VALUE:%.*]]) ; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.maxnum.f16(half [[TMP4]], half [[VALUE:%.*]])
; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16 ; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP8]] ; GCN-NEXT: ret half [[TMP8]]
; ;
%res = atomicrmw fmax ptr %ptr, half %value seq_cst %res = atomicrmw fmax ptr %ptr, half %value seq_cst
ret half %res ret half %res
} }
define half @test_atomicrmw_fmax_f16_global(ptr addrspace(1) %ptr, half %value) { define half @test_atomicrmw_fmax_f16_global(ptr addrspace(1) %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f16_global( ; GCN-LABEL: @test_atomicrmw_fmax_f16_global(
Show All 9 Lines
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.maxnum.f16(half [[TMP4]], half [[VALUE:%.*]]) ; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.maxnum.f16(half [[TMP4]], half [[VALUE:%.*]])
; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16 ; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP8]] ; GCN-NEXT: ret half [[TMP8]]
; ;
%res = atomicrmw fmax ptr addrspace(1) %ptr, half %value seq_cst %res = atomicrmw fmax ptr addrspace(1) %ptr, half %value seq_cst
ret half %res ret half %res
} }
define half @test_atomicrmw_fmax_f16_global_align4(ptr addrspace(1) %ptr, half %value) { define half @test_atomicrmw_fmax_f16_global_align4(ptr addrspace(1) %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f16_global_align4( ; GCN-LABEL: @test_atomicrmw_fmax_f16_global_align4(
Show All 35 Lines
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.maxnum.f16(half [[TMP4]], half [[VALUE:%.*]]) ; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.maxnum.f16(half [[TMP4]], half [[VALUE:%.*]])
; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16 ; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP8]] ; GCN-NEXT: ret half [[TMP8]]
; ;
%res = atomicrmw fmax ptr addrspace(3) %ptr, half %value seq_cst %res = atomicrmw fmax ptr addrspace(3) %ptr, half %value seq_cst
ret half %res ret half %res
} }
define double @test_atomicrmw_fmax_f64_flat(ptr %ptr, double %value) { define double @test_atomicrmw_fmax_f64_flat(ptr %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f64_flat( ; GCN-LABEL: @test_atomicrmw_fmax_f64_flat(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[TMP2]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP5:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP5]], i64 [[TMP4]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP7]] ; GCN-NEXT: ret double [[TMP6]]
; ;
%res = atomicrmw fmax ptr %ptr, double %value seq_cst %res = atomicrmw fmax ptr %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fmax_f64_global(ptr addrspace(1) %ptr, double %value) { define double @test_atomicrmw_fmax_f64_global(ptr addrspace(1) %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f64_global( ; GCN-LABEL: @test_atomicrmw_fmax_f64_global(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[TMP2]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP5:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP5]], i64 [[TMP4]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP7]] ; GCN-NEXT: ret double [[TMP6]]
; ;
%res = atomicrmw fmax ptr addrspace(1) %ptr, double %value seq_cst %res = atomicrmw fmax ptr addrspace(1) %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fmax_f64_local(ptr addrspace(3) %ptr, double %value) { define double @test_atomicrmw_fmax_f64_local(ptr addrspace(3) %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fmax_f64_local( ; GCN-LABEL: @test_atomicrmw_fmax_f64_local(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(3) [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(3) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[TMP2]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP5:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i64 [[TMP5]], i64 [[TMP4]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP7]] ; GCN-NEXT: ret double [[TMP6]]
; ;
%res = atomicrmw fmax ptr addrspace(3) %ptr, double %value seq_cst %res = atomicrmw fmax ptr addrspace(3) %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fmax_f64_global_strictfp(ptr addrspace(1) %ptr, double %value) strictfp {
; GCN-LABEL: @test_atomicrmw_fmax_f64_global_strictfp(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]]) #[[ATTR3:[0-9]+]]
; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP6]]
;
%res = atomicrmw fmax ptr addrspace(1) %ptr, double %value seq_cst
ret double %res
}

llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmin.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -atomic-expand %s | FileCheck -check-prefix=GCN %s ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -atomic-expand %s | FileCheck -check-prefix=GCN %s
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -atomic-expand %s | FileCheck -check-prefix=GCN %s ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -atomic-expand %s | FileCheck -check-prefix=GCN %s
define float @test_atomicrmw_fmin_f32_flat(ptr %ptr, float %value) { define float @test_atomicrmw_fmin_f32_flat(ptr %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f32_flat( ; GCN-LABEL: @test_atomicrmw_fmin_f32_flat(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.minnum.f32(float [[LOADED]], float [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.minnum.f32(float [[LOADED]], float [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[TMP2]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
; GCN-NEXT: [[TMP5:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP5]], i32 [[TMP4]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP7]] ; GCN-NEXT: ret float [[TMP6]]
; ;
%res = atomicrmw fmin ptr %ptr, float %value seq_cst %res = atomicrmw fmin ptr %ptr, float %value seq_cst
ret float %res ret float %res
} }
define float @test_atomicrmw_fmin_f32_global(ptr addrspace(1) %ptr, float %value) { define float @test_atomicrmw_fmin_f32_global(ptr addrspace(1) %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f32_global( ; GCN-LABEL: @test_atomicrmw_fmin_f32_global(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.minnum.f32(float [[LOADED]], float [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.minnum.f32(float [[LOADED]], float [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[TMP2]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
; GCN-NEXT: [[TMP5:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP5]], i32 [[TMP4]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP7]] ; GCN-NEXT: ret float [[TMP6]]
; ;
%res = atomicrmw fmin ptr addrspace(1) %ptr, float %value seq_cst %res = atomicrmw fmin ptr addrspace(1) %ptr, float %value seq_cst
ret float %res ret float %res
} }
define float @test_atomicrmw_fmin_f32_local(ptr addrspace(3) %ptr, float %value) { define float @test_atomicrmw_fmin_f32_local(ptr addrspace(3) %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f32_local( ; GCN-LABEL: @test_atomicrmw_fmin_f32_local(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(3) [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(3) [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.minnum.f32(float [[LOADED]], float [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call float @llvm.minnum.f32(float [[LOADED]], float [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[TMP2]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
; GCN-NEXT: [[TMP5:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[TMP5]], i32 [[TMP4]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP7]] ; GCN-NEXT: ret float [[TMP6]]
; ;
%res = atomicrmw fmin ptr addrspace(3) %ptr, float %value seq_cst %res = atomicrmw fmin ptr addrspace(3) %ptr, float %value seq_cst
ret float %res ret float %res
} }
define half @test_atomicrmw_fmin_f16_flat(ptr %ptr, half %value) { define half @test_atomicrmw_fmin_f16_flat(ptr %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f16_flat( ; GCN-LABEL: @test_atomicrmw_fmin_f16_flat(
; GCN-NEXT: [[ALIGNEDADDR:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -4) ; GCN-NEXT: [[ALIGNEDADDR:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -4)
; GCN-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR]] to i64 ; GCN-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR]] to i64
; GCN-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3 ; GCN-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
; GCN-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3 ; GCN-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
; GCN-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32 ; GCN-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
; GCN-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]] ; GCN-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
; GCN-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1 ; GCN-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
; GCN-NEXT: [[TMP3:%.*]] = load i32, ptr [[ALIGNEDADDR]], align 4 ; GCN-NEXT: [[TMP3:%.*]] = load i32, ptr [[ALIGNEDADDR]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.minnum.f16(half [[TMP4]], half [[VALUE:%.*]]) ; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.minnum.f16(half [[TMP4]], half [[VALUE:%.*]])
; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16 ; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP8]] ; GCN-NEXT: ret half [[TMP8]]
; ;
%res = atomicrmw fmin ptr %ptr, half %value seq_cst %res = atomicrmw fmin ptr %ptr, half %value seq_cst
ret half %res ret half %res
} }
define half @test_atomicrmw_fmin_f16_global(ptr addrspace(1) %ptr, half %value) { define half @test_atomicrmw_fmin_f16_global(ptr addrspace(1) %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f16_global( ; GCN-LABEL: @test_atomicrmw_fmin_f16_global(
Show All 9 Lines
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.minnum.f16(half [[TMP4]], half [[VALUE:%.*]]) ; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.minnum.f16(half [[TMP4]], half [[VALUE:%.*]])
; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16 ; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP8]] ; GCN-NEXT: ret half [[TMP8]]
; ;
%res = atomicrmw fmin ptr addrspace(1) %ptr, half %value seq_cst %res = atomicrmw fmin ptr addrspace(1) %ptr, half %value seq_cst
ret half %res ret half %res
} }
define half @test_atomicrmw_fmin_f16_global_align4(ptr addrspace(1) %ptr, half %value) { define half @test_atomicrmw_fmin_f16_global_align4(ptr addrspace(1) %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f16_global_align4( ; GCN-LABEL: @test_atomicrmw_fmin_f16_global_align4(
Show All 35 Lines
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.minnum.f16(half [[TMP4]], half [[VALUE:%.*]]) ; GCN-NEXT: [[TMP5:%.*]] = call half @llvm.minnum.f16(half [[TMP4]], half [[VALUE:%.*]])
; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16 ; GCN-NEXT: [[TMP6:%.*]] = bitcast half [[TMP5]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP6]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP8:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP8]] ; GCN-NEXT: ret half [[TMP8]]
; ;
%res = atomicrmw fmin ptr addrspace(3) %ptr, half %value seq_cst %res = atomicrmw fmin ptr addrspace(3) %ptr, half %value seq_cst
ret half %res ret half %res
} }
define double @test_atomicrmw_fmin_f64_flat(ptr %ptr, double %value) { define double @test_atomicrmw_fmin_f64_flat(ptr %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f64_flat( ; GCN-LABEL: @test_atomicrmw_fmin_f64_flat(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[TMP2]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP5:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP5]], i64 [[TMP4]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP7]] ; GCN-NEXT: ret double [[TMP6]]
; ;
%res = atomicrmw fmin ptr %ptr, double %value seq_cst %res = atomicrmw fmin ptr %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fmin_f64_global(ptr addrspace(1) %ptr, double %value) { define double @test_atomicrmw_fmin_f64_global(ptr addrspace(1) %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f64_global( ; GCN-LABEL: @test_atomicrmw_fmin_f64_global(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[TMP2]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP5:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP5]], i64 [[TMP4]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP7]] ; GCN-NEXT: ret double [[TMP6]]
; ;
%res = atomicrmw fmin ptr addrspace(1) %ptr, double %value seq_cst %res = atomicrmw fmin ptr addrspace(1) %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fmin_f64_local(ptr addrspace(3) %ptr, double %value) { define double @test_atomicrmw_fmin_f64_local(ptr addrspace(3) %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fmin_f64_local( ; GCN-LABEL: @test_atomicrmw_fmin_f64_local(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(3) [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(3) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]]) ; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]])
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[TMP2]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP5:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i64 [[TMP5]], i64 [[TMP4]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP7]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP7]] ; GCN-NEXT: ret double [[TMP6]]
; ;
%res = atomicrmw fmin ptr addrspace(3) %ptr, double %value seq_cst %res = atomicrmw fmin ptr addrspace(3) %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fmin_f64_global_strictfp(ptr addrspace(1) %ptr, double %value) strictfp {
; GCN-LABEL: @test_atomicrmw_fmin_f64_global_strictfp(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]])
; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP6]]
;
%res = atomicrmw fmin ptr addrspace(1) %ptr, double %value seq_cst
ret double %res
}

llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fsub.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -atomic-expand %s | FileCheck -check-prefix=GCN %s ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -atomic-expand %s | FileCheck -check-prefix=GCN %s
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -atomic-expand %s | FileCheck -check-prefix=GCN %s ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -atomic-expand %s | FileCheck -check-prefix=GCN %s
define float @test_atomicrmw_fsub_f32_flat(ptr %ptr, float %value) { define float @test_atomicrmw_fsub_f32_flat(ptr %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f32_flat( ; GCN-LABEL: @test_atomicrmw_fsub_f32_flat(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32 ; GCN-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP6]] ; GCN-NEXT: ret float [[TMP5]]
; ;
%res = atomicrmw fsub ptr %ptr, float %value seq_cst %res = atomicrmw fsub ptr %ptr, float %value seq_cst
ret float %res ret float %res
} }
define float @test_atomicrmw_fsub_f32_global(ptr addrspace(1) %ptr, float %value) { define float @test_atomicrmw_fsub_f32_global(ptr addrspace(1) %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f32_global( ; GCN-LABEL: @test_atomicrmw_fsub_f32_global(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32 ; GCN-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP6]] ; GCN-NEXT: ret float [[TMP5]]
; ;
%res = atomicrmw fsub ptr addrspace(1) %ptr, float %value seq_cst %res = atomicrmw fsub ptr addrspace(1) %ptr, float %value seq_cst
ret float %res ret float %res
} }
define float @test_atomicrmw_fsub_f32_local(ptr addrspace(3) %ptr, float %value) { define float @test_atomicrmw_fsub_f32_local(ptr addrspace(3) %ptr, float %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f32_local( ; GCN-LABEL: @test_atomicrmw_fsub_f32_local(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(3) [[PTR:%.*]], align 4 ; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(3) [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32 ; GCN-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
; GCN-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32 ; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
; GCN-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float ; GCN-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP6]] ; GCN-NEXT: ret float [[TMP5]]
; ;
%res = atomicrmw fsub ptr addrspace(3) %ptr, float %value seq_cst %res = atomicrmw fsub ptr addrspace(3) %ptr, float %value seq_cst
ret float %res ret float %res
} }
define half @test_atomicrmw_fsub_f16_flat(ptr %ptr, half %value) { define half @test_atomicrmw_fsub_f16_flat(ptr %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f16_flat( ; GCN-LABEL: @test_atomicrmw_fsub_f16_flat(
; GCN-NEXT: [[ALIGNEDADDR:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -4) ; GCN-NEXT: [[ALIGNEDADDR:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -4)
; GCN-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR]] to i64 ; GCN-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR]] to i64
; GCN-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3 ; GCN-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
; GCN-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3 ; GCN-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
; GCN-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32 ; GCN-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
; GCN-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]] ; GCN-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
; GCN-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1 ; GCN-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
; GCN-NEXT: [[TMP3:%.*]] = load i32, ptr [[ALIGNEDADDR]], align 4 ; GCN-NEXT: [[TMP3:%.*]] = load i32, ptr [[ALIGNEDADDR]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[NEW:%.*]] = fsub half [[TMP4]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub half [[TMP4]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP5:%.*]] = bitcast half [[NEW]] to i16 ; GCN-NEXT: [[TMP5:%.*]] = bitcast half [[NEW]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP5]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP5]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP6]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP7:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP7:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP7]] ; GCN-NEXT: ret half [[TMP7]]
; ;
%res = atomicrmw fsub ptr %ptr, half %value seq_cst %res = atomicrmw fsub ptr %ptr, half %value seq_cst
ret half %res ret half %res
} }
define half @test_atomicrmw_fsub_f16_global(ptr addrspace(1) %ptr, half %value) { define half @test_atomicrmw_fsub_f16_global(ptr addrspace(1) %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f16_global( ; GCN-LABEL: @test_atomicrmw_fsub_f16_global(
Show All 9 Lines
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[NEW:%.*]] = fsub half [[TMP4]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub half [[TMP4]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP5:%.*]] = bitcast half [[NEW]] to i16 ; GCN-NEXT: [[TMP5:%.*]] = bitcast half [[NEW]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP5]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP5]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP6]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP7:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP7:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP7]] ; GCN-NEXT: ret half [[TMP7]]
; ;
%res = atomicrmw fsub ptr addrspace(1) %ptr, half %value seq_cst %res = atomicrmw fsub ptr addrspace(1) %ptr, half %value seq_cst
ret half %res ret half %res
} }
define half @test_atomicrmw_fsub_f16_global_align4(ptr addrspace(1) %ptr, half %value) { define half @test_atomicrmw_fsub_f16_global_align4(ptr addrspace(1) %ptr, half %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f16_global_align4( ; GCN-LABEL: @test_atomicrmw_fsub_f16_global_align4(
Show All 35 Lines
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16 ; GCN-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half ; GCN-NEXT: [[TMP4:%.*]] = bitcast i16 [[EXTRACTED]] to half
; GCN-NEXT: [[NEW:%.*]] = fsub half [[TMP4]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub half [[TMP4]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP5:%.*]] = bitcast half [[NEW]] to i16 ; GCN-NEXT: [[TMP5:%.*]] = bitcast half [[NEW]] to i16
; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP5]] to i32 ; GCN-NEXT: [[EXTENDED:%.*]] = zext i16 [[TMP5]] to i32
; GCN-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED1:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]] ; GCN-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]] ; GCN-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED1]]
; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4 ; GCN-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1
; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP6]], 0 ; GCN-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP6]], 0
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]] ; GCN-NEXT: [[SHIFTED2:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
; GCN-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16 ; GCN-NEXT: [[EXTRACTED3:%.*]] = trunc i32 [[SHIFTED2]] to i16
; GCN-NEXT: [[TMP7:%.*]] = bitcast i16 [[EXTRACTED4]] to half ; GCN-NEXT: [[TMP7:%.*]] = bitcast i16 [[EXTRACTED3]] to half
; GCN-NEXT: ret half [[TMP7]] ; GCN-NEXT: ret half [[TMP7]]
; ;
%res = atomicrmw fsub ptr addrspace(3) %ptr, half %value seq_cst %res = atomicrmw fsub ptr addrspace(3) %ptr, half %value seq_cst
ret half %res ret half %res
} }
define double @test_atomicrmw_fsub_f64_flat(ptr %ptr, double %value) { define double @test_atomicrmw_fsub_f64_flat(ptr %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f64_flat( ; GCN-LABEL: @test_atomicrmw_fsub_f64_flat(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[NEW:%.*]] = fsub double [[LOADED]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub double [[LOADED]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[NEW]] to i64 ; GCN-NEXT: [[TMP2:%.*]] = bitcast double [[NEW]] to i64
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP3]], i64 [[TMP2]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP4]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP4]], 0
; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP5]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP6]] ; GCN-NEXT: ret double [[TMP5]]
; ;
%res = atomicrmw fsub ptr %ptr, double %value seq_cst %res = atomicrmw fsub ptr %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fsub_f64_global(ptr addrspace(1) %ptr, double %value) { define double @test_atomicrmw_fsub_f64_global(ptr addrspace(1) %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f64_global( ; GCN-LABEL: @test_atomicrmw_fsub_f64_global(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(1) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[NEW:%.*]] = fsub double [[LOADED]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub double [[LOADED]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[NEW]] to i64 ; GCN-NEXT: [[TMP2:%.*]] = bitcast double [[NEW]] to i64
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i64 [[TMP3]], i64 [[TMP2]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP4]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP4]], 0
; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP5]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP6]] ; GCN-NEXT: ret double [[TMP5]]
; ;
%res = atomicrmw fsub ptr addrspace(1) %ptr, double %value seq_cst %res = atomicrmw fsub ptr addrspace(1) %ptr, double %value seq_cst
ret double %res ret double %res
} }
define double @test_atomicrmw_fsub_f64_local(ptr addrspace(3) %ptr, double %value) { define double @test_atomicrmw_fsub_f64_local(ptr addrspace(3) %ptr, double %value) {
; GCN-LABEL: @test_atomicrmw_fsub_f64_local( ; GCN-LABEL: @test_atomicrmw_fsub_f64_local(
; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(3) [[PTR:%.*]], align 8 ; GCN-NEXT: [[TMP1:%.*]] = load double, ptr addrspace(3) [[PTR:%.*]], align 8
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]] ; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start: ; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ] ; GCN-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[NEW:%.*]] = fsub double [[LOADED]], [[VALUE:%.*]] ; GCN-NEXT: [[NEW:%.*]] = fsub double [[LOADED]], [[VALUE:%.*]]
; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[NEW]] to i64 ; GCN-NEXT: [[TMP2:%.*]] = bitcast double [[NEW]] to i64
; GCN-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64 ; GCN-NEXT: [[TMP3:%.*]] = bitcast double [[LOADED]] to i64
; GCN-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8 ; GCN-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i64 [[TMP3]], i64 [[TMP2]] seq_cst seq_cst, align 8
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1 ; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP4]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0 ; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP4]], 0
; GCN-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double ; GCN-NEXT: [[TMP5]] = bitcast i64 [[NEWLOADED]] to double
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]] ; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end: ; GCN: atomicrmw.end:
; GCN-NEXT: ret double [[TMP6]] ; GCN-NEXT: ret double [[TMP5]]
; ;
%res = atomicrmw fsub ptr addrspace(3) %ptr, double %value seq_cst %res = atomicrmw fsub ptr addrspace(3) %ptr, double %value seq_cst
ret double %res ret double %res
} }
define float @test_atomicrmw_fsub_f32_global_strictfp(ptr addrspace(1) %ptr, float %value) strictfp {
; GCN-LABEL: @test_atomicrmw_fsub_f32_global_strictfp(
; GCN-NEXT: [[TMP1:%.*]] = load float, ptr addrspace(1) [[PTR:%.*]], align 4
; GCN-NEXT: br label [[ATOMICRMW_START:%.*]]
; GCN: atomicrmw.start:
; GCN-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
; GCN-NEXT: [[NEW:%.*]] = call float @llvm.experimental.constrained.fsub.f32(float [[LOADED]], float [[VALUE:%.*]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR4:[0-9]+]]
; GCN-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
; GCN-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
; GCN-NEXT: [[TMP4:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4
; GCN-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
; GCN-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
; GCN-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
; GCN-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
; GCN: atomicrmw.end:
; GCN-NEXT: ret float [[TMP5]]
;
%res = atomicrmw fsub ptr addrspace(1) %ptr, float %value seq_cst
ret float %res
}