We already treat -1 passed to instruction intrinsics as vlmax, this
make vsetvli consistent.
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Paths
| Differential D152954
[RISCV] Treat __riscv_vsetvl_*(-1) as vlmax. ClosedPublic Authored by craig.topper on Jun 14 2023, 1:23 PM.
Details Summary We already treat -1 passed to instruction intrinsics as vlmax, this
Diff Detail
Event TimelineThis revision is now accepted and ready to land.Jun 14 2023, 11:23 PM This revision was landed with ongoing or failed builds.Jun 16 2023, 9:23 AM Closed by commit rG8a403166aa61: [RISCV] Treat __riscv_vsetvl_*(-1) as vlmax. (authored by craig.topper). · Explain Why This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 532197 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
|