[RISCV] Add __builtin_riscv_zip/unzip for Zbkb to match gcc.

[craig.topper]

Summary

We used zip_32/unzip_32, but gcc omitted the _32. Since we lack
an intrinsic header for Zk* it seemed like we should support the
same builtin names.

[asb]

I'm not super familiar with these builtins so this might be a silly question why are the new builtins added in this patch LiLi (long int) rather than ZiZi (int32_t) like the old _32 suffixed builtins?

[craig.topper]

In D152628#4416794, @asb wrote:

I'm not super familiar with these builtins so this might be a silly question why are the new builtins added in this patch LiLi (long int) rather than ZiZi (int32_t) like the old _32 suffixed builtins?

In my head I was thinking this would be the name we would use for xlen for i32/i64 too so I was matching clmul. But maybe that's not a good idea. I think we just need to figure out the header file definition for these intrinsics and get both compilers to agree on that.

clang/include/clang/Basic/BuiltinsRISCV.def

 // Zbkx
 TARGET_BUILTIN(__builtin_riscv_xperm4, "LiLiLi", "nc", "zbkx")
 TARGET_BUILTIN(__builtin_riscv_xperm8, "LiLiLi", "nc", "zbkx")
 
 // Zbkb extension
 TARGET_BUILTIN(__builtin_riscv_brev8, "LiLi", "nc", "zbkb")
 TARGET_BUILTIN(__builtin_riscv_zip_32, "ZiZi", "nc", "zbkb,32bit")
 TARGET_BUILTIN(__builtin_riscv_unzip_32, "ZiZi", "nc", "zbkb,32bit")
+TARGET_BUILTIN(__builtin_riscv_zip, "LiLi", "nc", "zbkb,32bit")
+TARGET_BUILTIN(__builtin_riscv_unzip, "LiLi", "nc", "zbkb,32bit")
 
 // Zknd extension
 TARGET_BUILTIN(__builtin_riscv_aes32dsi_32, "ZiZiZiIUi", "nc", "zknd,32bit")
 TARGET_BUILTIN(__builtin_riscv_aes32dsmi_32, "ZiZiZiIUi", "nc", "zknd,32bit")
 TARGET_BUILTIN(__builtin_riscv_aes64ds_64, "WiWiWi", "nc", "zknd,64bit")
 TARGET_BUILTIN(__builtin_riscv_aes64dsm_64, "WiWiWi", "nc", "zknd,64bit")
 TARGET_BUILTIN(__builtin_riscv_aes64im_64, "WiWi", "nc", "zknd,64bit")
 

clang/lib/CodeGen/CGBuiltin.cpp

 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
   case RISCV::BI__builtin_riscv_ctz_32:
   case RISCV::BI__builtin_riscv_ctz_64:
   case RISCV::BI__builtin_riscv_clmul:
   case RISCV::BI__builtin_riscv_clmulh:
   case RISCV::BI__builtin_riscv_clmulr:
   case RISCV::BI__builtin_riscv_xperm4:
   case RISCV::BI__builtin_riscv_xperm8:
   case RISCV::BI__builtin_riscv_brev8:
+  case RISCV::BI__builtin_riscv_zip:
+  case RISCV::BI__builtin_riscv_unzip:
   case RISCV::BI__builtin_riscv_zip_32:
   case RISCV::BI__builtin_riscv_unzip_32: {
     switch (BuiltinID) {
     default: llvm_unreachable("unexpected builtin ID");
     // Zbb
     case RISCV::BI__builtin_riscv_orc_b_32:
     case RISCV::BI__builtin_riscv_orc_b_64:
       ID = Intrinsic::riscv_orc_b;
case RISCV::BI__builtin_riscv_unzip_32: {
     case RISCV::BI__builtin_riscv_xperm4:
       ID = Intrinsic::riscv_xperm4;
       break;
 
     // Zbkb
     case RISCV::BI__builtin_riscv_brev8:
       ID = Intrinsic::riscv_brev8;
       break;
+    case RISCV::BI__builtin_riscv_zip:
     case RISCV::BI__builtin_riscv_zip_32:
       ID = Intrinsic::riscv_zip;
       break;
+    case RISCV::BI__builtin_riscv_unzip:
     case RISCV::BI__builtin_riscv_unzip_32:
       ID = Intrinsic::riscv_unzip;
       break;
     }
 
     IntrinsicTypes = {ResultType};
     break;
   }

clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbkb.c

 // RV32ZBKB-LABEL: @zip(
 // RV32ZBKB-NEXT:  entry:
 // RV32ZBKB-NEXT:    [[RS1_ADDR:%.*]] = alloca i32, align 4
 // RV32ZBKB-NEXT:    store i32 [[RS1:%.*]], ptr [[RS1_ADDR]], align 4
 // RV32ZBKB-NEXT:    [[TMP0:%.*]] = load i32, ptr [[RS1_ADDR]], align 4
 // RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.zip.i32(i32 [[TMP0]])
 // RV32ZBKB-NEXT:    ret i32 [[TMP1]]
 //
-int zip(int rs1)
+long zip(long rs1)
 {
-  return __builtin_riscv_zip_32(rs1);
+  return __builtin_riscv_zip(rs1);
 }
 
 // RV32ZBKB-LABEL: @unzip(
 // RV32ZBKB-NEXT:  entry:
 // RV32ZBKB-NEXT:    [[RS1_ADDR:%.*]] = alloca i32, align 4
 // RV32ZBKB-NEXT:    store i32 [[RS1:%.*]], ptr [[RS1_ADDR]], align 4
 // RV32ZBKB-NEXT:    [[TMP0:%.*]] = load i32, ptr [[RS1_ADDR]], align 4
 // RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.unzip.i32(i32 [[TMP0]])
 // RV32ZBKB-NEXT:    ret i32 [[TMP1]]
 //
-int unzip(int rs1)
+long unzip(long rs1)
+{
+  return __builtin_riscv_unzip(rs1);
+}
+
+// RV32ZBKB-LABEL: @zip_32(
+// RV32ZBKB-NEXT:  entry:
+// RV32ZBKB-NEXT:    [[RS1_ADDR:%.*]] = alloca i32, align 4
+// RV32ZBKB-NEXT:    store i32 [[RS1:%.*]], ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP0:%.*]] = load i32, ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.zip.i32(i32 [[TMP0]])
+// RV32ZBKB-NEXT:    ret i32 [[TMP1]]
+//
+int zip_32(int rs1)
+{
+  return __builtin_riscv_zip_32(rs1);
+}
+
+// RV32ZBKB-LABEL: @unzip_32(
+// RV32ZBKB-NEXT:  entry:
+// RV32ZBKB-NEXT:    [[RS1_ADDR:%.*]] = alloca i32, align 4
+// RV32ZBKB-NEXT:    store i32 [[RS1:%.*]], ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP0:%.*]] = load i32, ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.unzip.i32(i32 [[TMP0]])
+// RV32ZBKB-NEXT:    ret i32 [[TMP1]]
+//
+int unzip_32(int rs1)
 {
   return __builtin_riscv_unzip_32(rs1);
 }

clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c

 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -verify %s -o -
 
-int zip(int rs1)
+long zip(long rs1)
+{
+  return __builtin_riscv_zip(rs1); // expected-error {{builtin requires: 'RV32'}}
+}
+
+long unzip(long rs1)
+{
+  return __builtin_riscv_unzip(rs1); // expected-error {{builtin requires: 'RV32'}}
+}
+
+int zip_32(int rs1)
 {
   return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires: 'RV32'}}
 }
 
-int unzip(int rs1)
+int unzip_32(int rs1)
 {
   return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires: 'RV32'}}
 }