For simd vector selects, use cmeq + bsl for v2f32/v4f32/v2f64, so their cost are cheep.
Fix https://github.com/llvm/llvm-project/issues/63082
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
Comment Actions
Hello. 2 sounds like an OK cost to me, as a fallback when we are not sure where the condition comes from.
Can you add v8f16 and v4f16 types too, to keep them consistent?