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Differential D151307

[Clang][SVE2.1] Add svwhile (predicate-as-counter) builtins
ClosedPublic

Authored by CarolineConcatto on May 24 2023, 1:42 AM.

Details

Reviewers
sdesmalen
dtemirbulatov
kmclaughlin
Commits
rG4ed0dfe6adfe: [Clang][SVE2.1] Add svwhile (predicate-as-counter) builtins
Summary

As described in: https://github.com/ARM-software/acle/pull/257

Patch by : David Sherwood <david.sherwood@arm.com>

Diff Detail

Event Timeline

CarolineConcatto created this revision.May 24 2023, 1:42 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 24 2023, 1:42 AM
Herald added subscribers: kristof.beyls, tschuett. · View Herald Transcript
CarolineConcatto requested review of this revision.May 24 2023, 1:42 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 24 2023, 1:42 AM
Herald added a subscriber: cfe-commits. · View Herald Transcript
Harbormaster completed remote builds in B234122: Diff 525063.May 24 2023, 1:43 AM
CarolineConcatto added a parent revision: D151199: [Clang][SVE2.1] Add pfalse builtin.May 24 2023, 1:45 AM
CarolineConcatto added reviewers: sdesmalen, dtemirbulatov.
CarolineConcatto added a subscriber: david-arm.
CarolineConcatto added a child revision: D151433: [Clang][SVE2.1] Add builtins for Multi-vector load and store.May 25 2023, 6:19 AM
dtemirbulatov added inline comments.May 31 2023, 9:21 AM
clang/include/clang/Basic/arm_sve.td
1871

I could not find where ImmCheck2_4_Mul2 is defined?

CarolineConcatto added inline comments.Oct 16 2023, 8:00 AM
clang/include/clang/Basic/arm_sve.td
1871

Hi @dtemirbulatov ,

This check was created in this patch:
https://reviews.llvm.org/D150961, which is in the stack.

CarolineConcatto updated this revision to Diff 557747.Oct 18 2023, 2:03 AM

-Rebase

Harbormaster completed remote builds in B257847: Diff 557747.Oct 18 2023, 2:04 AM
kmclaughlin accepted this revision.Oct 18 2023, 6:04 AM
kmclaughlin added a subscriber: kmclaughlin.

LGTM

This revision is now accepted and ready to land.Oct 18 2023, 6:04 AM
This revision was landed with ongoing or failed builds.Oct 19 2023, 3:48 AM
Closed by commit rG4ed0dfe6adfe: [Clang][SVE2.1] Add svwhile (predicate-as-counter) builtins (authored by CarolineConcatto). · Explain Why
This revision was automatically updated to reflect the committed changes.
CarolineConcatto added a commit: rG4ed0dfe6adfe: [Clang][SVE2.1] Add svwhile (predicate-as-counter) builtins.

Revision Contents

PathSize
clang/
include/
clang/
Basic/
9 lines
test/
CodeGen/
aarch64-sve2p1-intrinsics/
992 lines
Sema/
aarch64-sve2p1-intrinsics/
68 lines

Diff 557772

clang/include/clang/Basic/arm_sve.td

Show First 20 Lines • Show All 1,862 Lines • ▼ Show 20 Lines
def SVFCLAMP : SInst<"svclamp[_{d}]", "dddd", "hfd", MergeNone, "aarch64_sve_fclamp", [], []>; def SVFCLAMP : SInst<"svclamp[_{d}]", "dddd", "hfd", MergeNone, "aarch64_sve_fclamp", [], []>;
def SVPTRUE_COUNT : SInst<"svptrue_{d}", "}v", "QcQsQiQl", MergeNone, "aarch64_sve_ptrue_{d}", [IsOverloadNone], []>; def SVPTRUE_COUNT : SInst<"svptrue_{d}", "}v", "QcQsQiQl", MergeNone, "aarch64_sve_ptrue_{d}", [IsOverloadNone], []>;
def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", [IsOverloadNone]>; def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", [IsOverloadNone]>;
def SVPEXT_SINGLE : SInst<"svpext_lane_{d}", "P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext", [], [ImmCheck<1, ImmCheck0_3>]>; def SVPEXT_SINGLE : SInst<"svpext_lane_{d}", "P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext", [], [ImmCheck<1, ImmCheck0_3>]>;
def SVPEXT_X2 : SInst<"svpext_lane_{d}_x2", "2.P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext_x2", [], [ImmCheck<1, ImmCheck0_1>]>; def SVPEXT_X2 : SInst<"svpext_lane_{d}_x2", "2.P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext_x2", [], [ImmCheck<1, ImmCheck0_1>]>;
def SVPSEL_COUNT_ALIAS_B : SInst<"svpsel_lane_c8", "}}Pm", "Pc", MergeNone, "", [], []>; def SVPSEL_COUNT_ALIAS_B : SInst<"svpsel_lane_c8", "}}Pm", "Pc", MergeNone, "", [], []>;
def SVPSEL_COUNT_ALIAS_H : SInst<"svpsel_lane_c16", "}}Pm", "Ps", MergeNone, "", [], []>; def SVPSEL_COUNT_ALIAS_H : SInst<"svpsel_lane_c16", "}}Pm", "Ps", MergeNone, "", [], []>;
dtemirbulatovUnsubmitted
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I could not find where ImmCheck2_4_Mul2 is defined?

dtemirbulatov: I could not find where ImmCheck2_4_Mul2 is defined?
CarolineConcattoAuthorUnsubmitted
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Hi @dtemirbulatov ,

This check was created in this patch:
https://reviews.llvm.org/D150961, which is in the stack.

CarolineConcatto: Hi @dtemirbulatov , This check was created in this patch: https://reviews.llvm.org/D150961…
def SVPSEL_COUNT_ALIAS_S : SInst<"svpsel_lane_c32", "}}Pm", "Pi", MergeNone, "", [], []>; def SVPSEL_COUNT_ALIAS_S : SInst<"svpsel_lane_c32", "}}Pm", "Pi", MergeNone, "", [], []>;
def SVPSEL_COUNT_ALIAS_D : SInst<"svpsel_lane_c64", "}}Pm", "Pl", MergeNone, "", [], []>; def SVPSEL_COUNT_ALIAS_D : SInst<"svpsel_lane_c64", "}}Pm", "Pl", MergeNone, "", [], []>;
def SVWHILEGE_COUNT : SInst<"svwhilege_{d}", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilege_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
def SVWHILEGT_COUNT : SInst<"svwhilegt_{d}", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilegt_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
def SVWHILELE_COUNT : SInst<"svwhilele_{d}", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilele_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
def SVWHILELT_COUNT : SInst<"svwhilelt_{d}", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilelt_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
def SVWHILELO_COUNT : SInst<"svwhilelo_{d}", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilelo_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
def SVWHILELS_COUNT : SInst<"svwhilels_{d}", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilels_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
def SVWHILEHI_COUNT : SInst<"svwhilehi_{d}", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilehi_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
def SVWHILEHS_COUNT : SInst<"svwhilehs_{d}", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilehs_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
} }
let TargetGuard = "sve2p1" in { let TargetGuard = "sve2p1" in {
def SVSCLAMP : SInst<"svclamp[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sclamp", [], []>; def SVSCLAMP : SInst<"svclamp[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sclamp", [], []>;
def SVUCLAMP : SInst<"svclamp[_{d}]", "dddd", "UcUsUiUl", MergeNone, "aarch64_sve_uclamp", [], []>; def SVUCLAMP : SInst<"svclamp[_{d}]", "dddd", "UcUsUiUl", MergeNone, "aarch64_sve_uclamp", [], []>;
def SVPSEL_B : SInst<"svpsel_lane_b8", "PPPm", "Pc", MergeNone, "", [], []>; def SVPSEL_B : SInst<"svpsel_lane_b8", "PPPm", "Pc", MergeNone, "", [], []>;
def SVPSEL_H : SInst<"svpsel_lane_b16", "PPPm", "Ps", MergeNone, "", [], []>; def SVPSEL_H : SInst<"svpsel_lane_b16", "PPPm", "Ps", MergeNone, "", [], []>;
def SVPSEL_S : SInst<"svpsel_lane_b32", "PPPm", "Pi", MergeNone, "", [], []>; def SVPSEL_S : SInst<"svpsel_lane_b32", "PPPm", "Pi", MergeNone, "", [], []>;
def SVPSEL_D : SInst<"svpsel_lane_b64", "PPPm", "Pl", MergeNone, "", [], []>; def SVPSEL_D : SInst<"svpsel_lane_b64", "PPPm", "Pl", MergeNone, "", [], []>;
def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, "aarch64_sve_cntp_{d}", [IsOverloadNone], [ImmCheck<1, ImmCheck2_4_Mul2>]>; def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, "aarch64_sve_cntp_{d}", [IsOverloadNone], [ImmCheck<1, ImmCheck2_4_Mul2>]>;
} }

clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c

  • This file was added.
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
// REQUIRES: aarch64-registered-target
#include <arm_sve.h>
// WHILEGE
// CHECK-LABEL: @test_svwhilege_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilege_c8_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c8_vl2(int64_t op1, int64_t op2)
{
return svwhilege_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilege_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilege_c8_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c8_vl4(int64_t op1, int64_t op2)
{
return svwhilege_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilege_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilege_c16_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c16_vl2(int64_t op1, int64_t op2)
{
return svwhilege_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilege_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilege_c16_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c16_vl4(int64_t op1, int64_t op2)
{
return svwhilege_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilege_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilege_c32_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c32_vl2(int64_t op1, int64_t op2)
{
return svwhilege_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilege_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilege_c32_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c32_vl4(int64_t op1, int64_t op2)
{
return svwhilege_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilege_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilege_c64_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c64_vl2(int64_t op1, int64_t op2)
{
return svwhilege_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilege_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilege_c64_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilege_c64_vl4(int64_t op1, int64_t op2)
{
return svwhilege_c64(op1, op2, 4);
}
// WHILEGT
// CHECK-LABEL: @test_svwhilegt_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilegt_c8_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c8_vl2(int64_t op1, int64_t op2)
{
return svwhilegt_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilegt_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilegt_c8_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c8_vl4(int64_t op1, int64_t op2)
{
return svwhilegt_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilegt_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilegt_c16_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c16_vl2(int64_t op1, int64_t op2)
{
return svwhilegt_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilegt_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilegt_c16_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c16_vl4(int64_t op1, int64_t op2)
{
return svwhilegt_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilegt_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilegt_c32_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c32_vl2(int64_t op1, int64_t op2)
{
return svwhilegt_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilegt_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilegt_c32_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c32_vl4(int64_t op1, int64_t op2)
{
return svwhilegt_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilegt_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilegt_c64_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c64_vl2(int64_t op1, int64_t op2)
{
return svwhilegt_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilegt_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilegt_c64_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilegt_c64_vl4(int64_t op1, int64_t op2)
{
return svwhilegt_c64(op1, op2, 4);
}
// WHILEHI
// CHECK-LABEL: @test_svwhilehi_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilehi_c8_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c8_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehi_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehi_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilehi_c8_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c8_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehi_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilehi_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehi_c16_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c16_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehi_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehi_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehi_c16_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c16_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehi_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilehi_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehi_c32_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c32_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehi_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehi_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehi_c32_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c32_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehi_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilehi_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehi_c64_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c64_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehi_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehi_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehi_c64_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehi_c64_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehi_c64(op1, op2, 4);
}
// WHILEHS
// CHECK-LABEL: @test_svwhilehs_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilehs_c8_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c8_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehs_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehs_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilehs_c8_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c8_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehs_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilehs_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehs_c16_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c16_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehs_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehs_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehs_c16_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c16_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehs_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilehs_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehs_c32_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c32_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehs_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehs_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehs_c32_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c32_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehs_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilehs_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehs_c64_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c64_vl2(uint64_t op1, uint64_t op2)
{
return svwhilehs_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilehs_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilehs_c64_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilehs_c64_vl4(uint64_t op1, uint64_t op2)
{
return svwhilehs_c64(op1, op2, 4);
}
// WHILELE
// CHECK-LABEL: @test_svwhilele_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilele_c8_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c8_vl2(int64_t op1, int64_t op2)
{
return svwhilele_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilele_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilele_c8_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c8_vl4(int64_t op1, int64_t op2)
{
return svwhilele_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilele_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilele_c16_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c16_vl2(int64_t op1, int64_t op2)
{
return svwhilele_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilele_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilele_c16_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c16_vl4(int64_t op1, int64_t op2)
{
return svwhilele_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilele_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilele_c32_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c32_vl2(int64_t op1, int64_t op2)
{
return svwhilele_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilele_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilele_c32_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c32_vl4(int64_t op1, int64_t op2)
{
return svwhilele_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilele_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilele_c64_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c64_vl2(int64_t op1, int64_t op2)
{
return svwhilele_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilele_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilele_c64_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilele_c64_vl4(int64_t op1, int64_t op2)
{
return svwhilele_c64(op1, op2, 4);
}
// WHILELO
// CHECK-LABEL: @test_svwhilelo_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilelo_c8_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c8_vl2(uint64_t op1, uint64_t op2)
{
return svwhilelo_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelo_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilelo_c8_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c8_vl4(uint64_t op1, uint64_t op2)
{
return svwhilelo_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilelo_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelo_c16_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c16_vl2(uint64_t op1, uint64_t op2)
{
return svwhilelo_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelo_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelo_c16_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c16_vl4(uint64_t op1, uint64_t op2)
{
return svwhilelo_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilelo_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelo_c32_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c32_vl2(uint64_t op1, uint64_t op2)
{
return svwhilelo_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelo_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelo_c32_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c32_vl4(uint64_t op1, uint64_t op2)
{
return svwhilelo_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilelo_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelo_c64_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c64_vl2(uint64_t op1, uint64_t op2)
{
return svwhilelo_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelo_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelo_c64_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelo_c64_vl4(uint64_t op1, uint64_t op2)
{
return svwhilelo_c64(op1, op2, 4);
}
// WHILELS
// CHECK-LABEL: @test_svwhilels_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilels_c8_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c8_vl2(uint64_t op1, uint64_t op2)
{
return svwhilels_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilels_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilels_c8_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c8_vl4(uint64_t op1, uint64_t op2)
{
return svwhilels_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilels_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilels_c16_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c16_vl2(uint64_t op1, uint64_t op2)
{
return svwhilels_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilels_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilels_c16_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c16_vl4(uint64_t op1, uint64_t op2)
{
return svwhilels_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilels_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilels_c32_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c32_vl2(uint64_t op1, uint64_t op2)
{
return svwhilels_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilels_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilels_c32_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c32_vl4(uint64_t op1, uint64_t op2)
{
return svwhilels_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilels_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilels_c64_vl2mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c64_vl2(uint64_t op1, uint64_t op2)
{
return svwhilels_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilels_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilels_c64_vl4mm(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilels_c64_vl4(uint64_t op1, uint64_t op2)
{
return svwhilels_c64(op1, op2, 4);
}
// WHILELT
// CHECK-LABEL: @test_svwhilelt_c8_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilelt_c8_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c8_vl2(int64_t op1, int64_t op2)
{
return svwhilelt_c8(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelt_c8_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z21test_svwhilelt_c8_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c8_vl4(int64_t op1, int64_t op2)
{
return svwhilelt_c8(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilelt_c16_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelt_c16_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c16_vl2(int64_t op1, int64_t op2)
{
return svwhilelt_c16(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelt_c16_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelt_c16_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c16_vl4(int64_t op1, int64_t op2)
{
return svwhilelt_c16(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilelt_c32_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelt_c32_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c32_vl2(int64_t op1, int64_t op2)
{
return svwhilelt_c32(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelt_c32_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelt_c32_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c32_vl4(int64_t op1, int64_t op2)
{
return svwhilelt_c32(op1, op2, 4);
}
// CHECK-LABEL: @test_svwhilelt_c64_vl2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelt_c64_vl2ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c64_vl2(int64_t op1, int64_t op2)
{
return svwhilelt_c64(op1, op2, 2);
}
// CHECK-LABEL: @test_svwhilelt_c64_vl4(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
// CPP-CHECK-LABEL: @_Z22test_svwhilelt_c64_vl4ll(
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
// CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP0]]
//
svcount_t test_svwhilelt_c64_vl4(int64_t op1, int64_t op2)
{
return svwhilelt_c64(op1, op2, 4);
}

clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp

Show All 21 Linesvoid test_svpext_lane_x2_imm_0_1(svcount_t c) {
svpext_lane_c64_x2(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}} svpext_lane_c64_x2(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
svpext_lane_c8_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}} svpext_lane_c8_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
svpext_lane_c16_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}} svpext_lane_c16_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
svpext_lane_c32_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}} svpext_lane_c32_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
svpext_lane_c64_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}} svpext_lane_c64_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
} }
svcount_t test_svwhile_pn(int64_t op1, int64_t op2) {
svwhilege_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilege_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilege_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilege_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilegt_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilegt_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilegt_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilegt_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehi_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehi_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehi_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehi_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehs_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehs_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehs_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilehs_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilele_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilele_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilele_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilele_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelo_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelo_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelo_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelo_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilels_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilels_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilels_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilels_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelt_c8(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelt_c16(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelt_c32(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilelt_c64(op1, op2, 6); // expected-error {{argument value 6 is outside the valid range [2, 4]}}
svwhilege_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilege_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilege_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilege_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilegt_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilegt_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilegt_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilegt_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehi_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehi_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehi_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehi_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehs_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehs_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehs_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilehs_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilele_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilele_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilele_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilele_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelo_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelo_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelo_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelo_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilels_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilels_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilels_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilels_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelt_c8(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelt_c16(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelt_c32(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
svwhilelt_c64(op1, op2, 3); // expected-error {{argument should be a multiple of 2}}
}
void test_cntp(svcount_t c) { void test_cntp(svcount_t c) {
svcntp_c8(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}} svcntp_c8(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}}
svcntp_c11(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}} svcntp_c11(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}}
svcntp_c32(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}} svcntp_c32(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}}
svcntp_c14(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}} svcntp_c14(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}}
svcntp_c8(c, 3); // expected-error {{argument should be a multiple of 2}} svcntp_c8(c, 3); // expected-error {{argument should be a multiple of 2}}
svcntp_c11(c, 3); // expected-error {{argument should be a multiple of 2}} svcntp_c11(c, 3); // expected-error {{argument should be a multiple of 2}}
svcntp_c32(c, 3); // expected-error {{argument should be a multiple of 2}} svcntp_c32(c, 3); // expected-error {{argument should be a multiple of 2}}
svcntp_c14(c, 3); // expected-error {{argument should be a multiple of 2}} svcntp_c14(c, 3); // expected-error {{argument should be a multiple of 2}}
} }