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Differential D146025

[RISCV][NFC] Add more tests for SLP vectorization (binops on load/store)
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Authored by benshi001 on Mar 14 2023, 2:29 AM.

Details

Reviewers
reames
craig.topper
fhahn
jrtc27
asb
luismarques
Commits
rG9855fe456877: [RISCV][NFC] Add more tests for SLP vectorization (binops on load/store)

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Event Timeline

benshi001 created this revision.Mar 14 2023, 2:29 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 14 2023, 2:29 AM
Herald added subscribers: jobnoorman, luke, vporpo and 27 others. · View Herald Transcript
benshi001 requested review of this revision.Mar 14 2023, 2:29 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 14 2023, 2:29 AM
Herald added subscribers: llvm-commits, • pcwang-thead, eopXD and 2 others. · View Herald Transcript
Harbormaster completed remote builds in B219293: Diff 504998.Mar 14 2023, 3:40 AM
reames added a comment.Mar 15 2023, 3:11 PM

It's not really clear to me what value the new tests are adding. At a minimum, this should probably be a different test file. The file you're modifying was intended to focus on the load/store vectorization - the add was only there to provide some use chain between the load and stores.

If you wanted to add some wider examples, that might be useful though.

reames requested changes to this revision.Mar 15 2023, 3:11 PM
This revision now requires changes to proceed.Mar 15 2023, 3:11 PM
reames retitled this revision from [RISCV][NFC] Add more tests for SLP vectorization to [RISCV][NFC] Add more tests for SLP vectorization (binops on load/store).Mar 15 2023, 3:12 PM
benshi001 updated this revision to Diff 505712.Mar 16 2023, 12:21 AM
benshi001 added a comment.Mar 16 2023, 12:23 AM
In D146025#4197783, @reames wrote:

It's not really clear to me what value the new tests are adding. At a minimum, this should probably be a different test file. The file you're modifying was intended to focus on the load/store vectorization - the add was only there to provide some use chain between the load and stores.

If you wanted to add some wider examples, that might be useful though.

I have created a new file for my tests. Thanks!

Harbormaster completed remote builds in B219797: Diff 505712.Mar 16 2023, 2:47 AM
benshi001 added a comment.Mar 21 2023, 7:27 PM

ping ...

reames accepted this revision.Mar 22 2023, 7:44 AM

LGTM

This revision is now accepted and ready to land.Mar 22 2023, 7:44 AM
Closed by commit rG9855fe456877: [RISCV][NFC] Add more tests for SLP vectorization (binops on load/store) (authored by benshi001). · Explain WhyMar 22 2023, 6:01 PM
This revision was automatically updated to reflect the committed changes.
benshi001 added a commit: rG9855fe456877: [RISCV][NFC] Add more tests for SLP vectorization (binops on load/store).

Revision Contents

PathSize
llvm/
test/
Transforms/
SLPVectorizer/
RISCV/
386 lines

Diff 507570

llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v \
; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 -S | FileCheck %s --check-prefixes=CHECK
; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v -S | FileCheck %s --check-prefixes=DEFAULT
define void @vec_add(ptr %dest, ptr %p) {
; CHECK-LABEL: @vec_add(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i16> [[TMP0]], <i16 1, i16 1>
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_add(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = add i16 [[E0]], 1
; DEFAULT-NEXT: [[A1:%.*]] = add i16 [[E1]], 1
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%a0 = add i16 %e0, 1
%a1 = add i16 %e1, 1
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
define void @vec_sub(ptr %dest, ptr %p) {
; CHECK-LABEL: @vec_sub(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i16> [[TMP0]], <i16 17, i16 17>
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_sub(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = sub i16 [[E0]], 17
; DEFAULT-NEXT: [[A1:%.*]] = sub i16 [[E1]], 17
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%a0 = sub i16 %e0, 17
%a1 = sub i16 %e1, 17
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
define void @vec_rsub(ptr %dest, ptr %p) {
; CHECK-LABEL: @vec_rsub(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i16> <i16 29, i16 29>, [[TMP0]]
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_rsub(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = sub i16 29, [[E0]]
; DEFAULT-NEXT: [[A1:%.*]] = sub i16 29, [[E1]]
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%a0 = sub i16 29, %e0
%a1 = sub i16 29, %e1
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
define void @vec_mul(ptr %dest, ptr %p) {
; CHECK-LABEL: @vec_mul(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i16> [[TMP0]], <i16 7, i16 7>
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_mul(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = mul i16 [[E0]], 7
; DEFAULT-NEXT: [[A1:%.*]] = mul i16 [[E1]], 7
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%a0 = mul i16 %e0, 7
%a1 = mul i16 %e1, 7
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
define void @vec_sdiv(ptr %dest, ptr %p) {
; CHECK-LABEL: @vec_sdiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = sdiv <2 x i16> [[TMP0]], <i16 7, i16 7>
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_sdiv(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = sdiv i16 [[E0]], 7
; DEFAULT-NEXT: [[A1:%.*]] = sdiv i16 [[E1]], 7
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%a0 = sdiv i16 %e0, 7
%a1 = sdiv i16 %e1, 7
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
define void @vec_and(ptr %dest, ptr %p, ptr %q) {
; CHECK-LABEL: @vec_and(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i16> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_and(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[F0:%.*]] = load i16, ptr [[Q:%.*]], align 4
; DEFAULT-NEXT: [[INQ:%.*]] = getelementptr inbounds i16, ptr [[Q]], i64 1
; DEFAULT-NEXT: [[F1:%.*]] = load i16, ptr [[INQ]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = and i16 [[E0]], [[F0]]
; DEFAULT-NEXT: [[A1:%.*]] = and i16 [[E1]], [[F1]]
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%f0 = load i16, ptr %q, align 4
%inq = getelementptr inbounds i16, ptr %q, i64 1
%f1 = load i16, ptr %inq, align 2
%a0 = and i16 %e0, %f0
%a1 = and i16 %e1, %f1
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
define void @vec_or(ptr %dest, ptr %p, ptr %q) {
; CHECK-LABEL: @vec_or(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i16> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_or(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[F0:%.*]] = load i16, ptr [[Q:%.*]], align 4
; DEFAULT-NEXT: [[INQ:%.*]] = getelementptr inbounds i16, ptr [[Q]], i64 1
; DEFAULT-NEXT: [[F1:%.*]] = load i16, ptr [[INQ]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = or i16 [[E0]], [[F0]]
; DEFAULT-NEXT: [[A1:%.*]] = or i16 [[E1]], [[F1]]
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%f0 = load i16, ptr %q, align 4
%inq = getelementptr inbounds i16, ptr %q, i64 1
%f1 = load i16, ptr %inq, align 2
%a0 = or i16 %e0, %f0
%a1 = or i16 %e1, %f1
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
define void @vec_sll(ptr %dest, ptr %p, ptr %q) {
; CHECK-LABEL: @vec_sll(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i16> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_sll(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[F0:%.*]] = load i16, ptr [[Q:%.*]], align 4
; DEFAULT-NEXT: [[INQ:%.*]] = getelementptr inbounds i16, ptr [[Q]], i64 1
; DEFAULT-NEXT: [[F1:%.*]] = load i16, ptr [[INQ]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = shl i16 [[E0]], [[F0]]
; DEFAULT-NEXT: [[A1:%.*]] = shl i16 [[E1]], [[F1]]
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%f0 = load i16, ptr %q, align 4
%inq = getelementptr inbounds i16, ptr %q, i64 1
%f1 = load i16, ptr %inq, align 2
%a0 = shl i16 %e0, %f0
%a1 = shl i16 %e1, %f1
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
declare i16 @llvm.smin.i16(i16, i16)
define void @vec_smin(ptr %dest, ptr %p, ptr %q) {
; CHECK-LABEL: @vec_smin(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.smin.v2i16(<2 x i16> [[TMP0]], <2 x i16> [[TMP1]])
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_smin(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[F0:%.*]] = load i16, ptr [[Q:%.*]], align 4
; DEFAULT-NEXT: [[INQ:%.*]] = getelementptr inbounds i16, ptr [[Q]], i64 1
; DEFAULT-NEXT: [[F1:%.*]] = load i16, ptr [[INQ]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = tail call i16 @llvm.smin.i16(i16 [[E0]], i16 [[F0]])
; DEFAULT-NEXT: [[A1:%.*]] = tail call i16 @llvm.smin.i16(i16 [[E1]], i16 [[F1]])
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%f0 = load i16, ptr %q, align 4
%inq = getelementptr inbounds i16, ptr %q, i64 1
%f1 = load i16, ptr %inq, align 2
%a0 = tail call i16 @llvm.smin.i16(i16 %e0, i16 %f0)
%a1 = tail call i16 @llvm.smin.i16(i16 %e1, i16 %f1)
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}
declare i16 @llvm.umax.i16(i16, i16)
define void @vec_umax(ptr %dest, ptr %p, ptr %q) {
; CHECK-LABEL: @vec_umax(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.umax.v2i16(<2 x i16> [[TMP0]], <2 x i16> [[TMP1]])
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
; DEFAULT-LABEL: @vec_umax(
; DEFAULT-NEXT: entry:
; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1
; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
; DEFAULT-NEXT: [[F0:%.*]] = load i16, ptr [[Q:%.*]], align 4
; DEFAULT-NEXT: [[INQ:%.*]] = getelementptr inbounds i16, ptr [[Q]], i64 1
; DEFAULT-NEXT: [[F1:%.*]] = load i16, ptr [[INQ]], align 2
; DEFAULT-NEXT: [[A0:%.*]] = tail call i16 @llvm.umax.i16(i16 [[E0]], i16 [[F0]])
; DEFAULT-NEXT: [[A1:%.*]] = tail call i16 @llvm.umax.i16(i16 [[E1]], i16 [[F1]])
; DEFAULT-NEXT: store i16 [[A0]], ptr [[DEST:%.*]], align 4
; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
; DEFAULT-NEXT: store i16 [[A1]], ptr [[INC2]], align 2
; DEFAULT-NEXT: ret void
;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
%e1 = load i16, ptr %inc, align 2
%f0 = load i16, ptr %q, align 4
%inq = getelementptr inbounds i16, ptr %q, i64 1
%f1 = load i16, ptr %inq, align 2
%a0 = tail call i16 @llvm.umax.i16(i16 %e0, i16 %f0)
%a1 = tail call i16 @llvm.umax.i16(i16 %e1, i16 %f1)
store i16 %a0, ptr %dest, align 4
%inc2 = getelementptr inbounds i16, ptr %dest, i64 1
store i16 %a1, ptr %inc2, align 2
ret void
}