[NFC][AArch64] Use optional returns in target parser instead of 'invalid' objects

[pratlucas]

Summary

This updates the parsing methods in AArch64's Target Parser to make use
of optional returns instead of "invalid" enum values, making the API's
behaviour clearer.

[tmatheson]

llvm/unittests/TargetParser/TargetParserTest.cpp

1471

I think we still need to test getDefaultExtensions, unless we're deleting it.

[pratlucas]

llvm/unittests/TargetParser/TargetParserTest.cpp

1471

D142540 deletes it in favor of using the information in CpuInfo and ArchInfo.

clang/lib/Basic/Targets/AArch64.cpp

 #include "clang/Basic/LangOptions.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "clang/Basic/TargetInfo.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/ARMTargetParserCommon.h"
+#include "llvm/TargetParser/AArch64TargetParser.h"
 #include <optional>
 
 using namespace clang;
 using namespace clang::targets;
 
 static constexpr Builtin::Info BuiltinInfo[] = {
 #define BUILTIN(ID, TYPE, ATTRS)                                               \
   {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
bool AArch64TargetInfo::validateBranchProtection(StringRef Spec, StringRef,
   else
     BPI.SignKey = LangOptions::SignReturnAddressKeyKind::BKey;
 
   BPI.BranchTargetEnforcement = PBP.BranchTargetEnforcement;
   return true;
 }
 
 bool AArch64TargetInfo::isValidCPUName(StringRef Name) const {
-  return Name == "generic" ||
-         llvm::AArch64::parseCpu(Name).Arch != llvm::AArch64::INVALID;
+  return Name == "generic" || llvm::AArch64::parseCpu(Name);
 }
 
 bool AArch64TargetInfo::setCPU(const std::string &Name) {
   return isValidCPUName(Name);
 }
 
 void AArch64TargetInfo::fillValidCPUList(
     SmallVectorImpl<StringRef> &Values) const {
return llvm::StringSwitch<bool>(Feature)
       .Default(false);
 }
 
 void AArch64TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
                                           StringRef Name, bool Enabled) const {
   Features[Name] = Enabled;
   // If the feature is an architecture feature (like v8.2a), add all previous
   // architecture versions and any dependant target features.
-  const llvm::AArch64::ArchInfo &ArchInfo =
+  const std::optional<llvm::AArch64::ArchInfo> ArchInfo =
       llvm::AArch64::ArchInfo::findBySubArch(Name);
 
-  if (ArchInfo == llvm::AArch64::INVALID)
+  if (!ArchInfo)
     return; // Not an architecure, nothing more to do.
 
   for (const auto *OtherArch : llvm::AArch64::ArchInfos)
-    if (ArchInfo.implies(*OtherArch))
+    if (ArchInfo->implies(*OtherArch))
       Features[OtherArch->getSubArch()] = Enabled;
 
   // Set any features implied by the architecture
   uint64_t Extensions =
-      llvm::AArch64::getDefaultExtensions("generic", ArchInfo);
+      llvm::AArch64::getDefaultExtensions("generic", *ArchInfo);
   std::vector<StringRef> CPUFeats;
   if (llvm::AArch64::getExtensionFeatures(Extensions, CPUFeats)) {
     for (auto F : CPUFeats) {
       assert(F[0] == '+' && "Expected + in target feature!");
       Features[F.drop_front(1)] = true;
     }
   }
 }
bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
   return true;
 }
 
 bool AArch64TargetInfo::initFeatureMap(
     llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
     const std::vector<std::string> &FeaturesVec) const {
   std::vector<std::string> UpdatedFeaturesVec;
   // Parse the CPU and add any implied features.
-  const llvm::AArch64::ArchInfo &Arch = llvm::AArch64::parseCpu(CPU).Arch;
-  if (Arch != llvm::AArch64::INVALID) {
-    uint64_t Exts = llvm::AArch64::getDefaultExtensions(CPU, Arch);
+  std::optional<llvm::AArch64::CpuInfo> CpuInfo = llvm::AArch64::parseCpu(CPU);
+  if (CpuInfo) {
+    uint64_t Exts = llvm::AArch64::getDefaultExtensions(CPU, CpuInfo->Arch);
     std::vector<StringRef> CPUFeats;
     llvm::AArch64::getExtensionFeatures(Exts, CPUFeats);
     for (auto F : CPUFeats) {
       assert((F[0] == '+' || F[0] == '-') && "Expected +/- in target feature!");
       UpdatedFeaturesVec.push_back(F.str());
     }
   }
 
for (auto &Feature : AttrFeatures) {
     }
 
     if (Feature.startswith("arch=")) {
       if (FoundArch)
         Ret.Duplicate = "arch=";
       FoundArch = true;
       std::pair<StringRef, StringRef> Split =
           Feature.split("=").second.trim().split("+");
-      const llvm::AArch64::ArchInfo &AI = llvm::AArch64::parseArch(Split.first);
+      const std::optional<llvm::AArch64::ArchInfo> AI =
+          llvm::AArch64::parseArch(Split.first);
 
       // Parse the architecture version, adding the required features to
       // Ret.Features.
-      if (AI == llvm::AArch64::INVALID)
+      if (!AI)
         continue;
-      Ret.Features.push_back(AI.ArchFeature.str());
+      Ret.Features.push_back(AI->ArchFeature.str());
       // Add any extra features, after the +
       SplitAndAddFeatures(Split.second, Ret.Features);
     } else if (Feature.startswith("cpu=")) {
       if (!Ret.CPU.empty())
         Ret.Duplicate = "cpu=";
       else {
         // Split the cpu string into "cpu=", "cortex-a710" and any remaining
         // "+feat" features.

clang/lib/Driver/ToolChains/Arch/AArch64.cpp

static bool DecodeAArch64Features(const Driver &D, StringRef text,
   return true;
 }
 
 // Check if the CPU name and feature modifiers in -mcpu are legal. If yes,
 // decode CPU and feature.
 static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,
                               std::vector<StringRef> &Features) {
   std::pair<StringRef, StringRef> Split = Mcpu.split("+");
+  CPU = Split.first;
   const llvm::AArch64::ArchInfo *ArchInfo = &llvm::AArch64::ARMV8A;
-  CPU = llvm::AArch64::resolveCPUAlias(Split.first);
 
   if (CPU == "native")
     CPU = llvm::sys::getHostCPUName();
 
   if (CPU == "generic") {
     Features.push_back("+neon");
   } else {
-    ArchInfo = &llvm::AArch64::parseCpu(CPU).Arch;
-    if (*ArchInfo == llvm::AArch64::INVALID)
+    const std::optional<llvm::AArch64::CpuInfo> CpuInfo =
+        llvm::AArch64::parseCpu(CPU);
+    if (!CpuInfo)
       return false;
+    ArchInfo = &CpuInfo->Arch;
+
     Features.push_back(ArchInfo->ArchFeature);
 
     uint64_t Extension = llvm::AArch64::getDefaultExtensions(CPU, *ArchInfo);
     if (!llvm::AArch64::getExtensionFeatures(Extension, Features))
       return false;
   }
 
   if (Split.second.size() &&
       !DecodeAArch64Features(D, Split.second, Features, *ArchInfo))
     return false;
 
   return true;
 }
 
 static bool
 getAArch64ArchFeaturesFromMarch(const Driver &D, StringRef March,
                                 const ArgList &Args,
                                 std::vector<StringRef> &Features) {
   std::string MarchLowerCase = March.lower();
   std::pair<StringRef, StringRef> Split = StringRef(MarchLowerCase).split("+");
 
-  const llvm::AArch64::ArchInfo *ArchInfo =
-      &llvm::AArch64::parseArch(Split.first);
+  std::optional <llvm::AArch64::ArchInfo> ArchInfo =
+      llvm::AArch64::parseArch(Split.first);
   if (Split.first == "native")
-    ArchInfo = &llvm::AArch64::getArchForCpu(llvm::sys::getHostCPUName().str());
-  if (*ArchInfo == llvm::AArch64::INVALID)
+    ArchInfo = llvm::AArch64::getArchForCpu(llvm::sys::getHostCPUName().str());
+  if (!ArchInfo)
     return false;
   Features.push_back(ArchInfo->ArchFeature);
 
   // Enable SVE2 by default on Armv9-A.
   // It can still be disabled if +nosve2 is present.
   // We must do this early so that DecodeAArch64Features has the correct state
   if ((*ArchInfo == llvm::AArch64::ARMV9A ||
        *ArchInfo == llvm::AArch64::ARMV9_1A ||

llvm/include/llvm/TargetParser/AArch64TargetParser.h

enum CPUFeatures {
   FEAT_SME2,
   FEAT_MAX
 };
 
 // Arch extension modifiers for CPUs. These are labelled with their Arm ARM
 // feature name (though the canonical reference for those is AArch64.td)
 // clang-format off
 enum ArchExtKind : uint64_t {
-  AEK_INVALID =     0,
   AEK_NONE =        1,
   AEK_CRC =         1 << 1,  // FEAT_CRC32
   AEK_CRYPTO =      1 << 2,
   AEK_FP =          1 << 3,  // FEAT_FP
   AEK_SIMD =        1 << 4,  // FEAT_AdvSIMD
   AEK_FP16 =        1 << 5,  // FEAT_FP16
   AEK_PROFILE =     1 << 6,  // FEAT_SPE
   AEK_RAS =         1 << 7,  // FEAT_RAS, FEAT_RASv1p1
inline constexpr ExtensionInfo Extensions[] = {
     {"sve2-sm4", AArch64::AEK_SVE2SM4, "+sve2-sm4", "-sve2-sm4", FEAT_SVE_SM4, "+sve2,+sve,+sve2-sm4,+fullfp16,+fp-armv8,+neon", 420},
     {"sve2", AArch64::AEK_SVE2, "+sve2", "-sve2", FEAT_SVE2, "+sve2,+sve,+fullfp16,+fp-armv8,+neon", 370},
     {"sve2p1", AArch64::AEK_SVE2p1, "+sve2p1", "-sve2p1", FEAT_MAX, "", 0},
     {"the", AArch64::AEK_THE, "+the", "-the", FEAT_MAX, "", 0},
     {"tme", AArch64::AEK_TME, "+tme", "-tme", FEAT_MAX, "", 0},
     {"wfxt", AArch64::AEK_NONE, {}, {}, FEAT_WFXT, "+wfxt", 550},
     // Special cases
     {"none", AArch64::AEK_NONE, {}, {}, FEAT_MAX, "", ExtensionInfo::MaxFMVPriority},
-    {"invalid", AArch64::AEK_INVALID, {}, {}, FEAT_MAX, "", 0},
 };
 // clang-format on
 
 enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' };
 
 // Information about a specific architecture, e.g. V8.1-A
 struct ArchInfo {
   VersionTuple Version;  // Architecture version, major + minor.
struct ArchInfo {
 
   // Defines the following partial order, indicating when an architecture is
   // a superset of another:
   //
   //     v9.4a > v9.3a > v9.3a > v9.3a > v9a;
   //       v       v       v       v       v
   //     v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
   //
-  // v8r and INVALID have no relation to anything. This is used to
-  // determine which features to enable for a given architecture. See
+  // v8r has no relation to anything. This is used to determine which
+  // features to enable for a given architecture. See
   // AArch64TargetInfo::setFeatureEnabled.
   bool implies(const ArchInfo &Other) const {
     if (this->Profile != Other.Profile)
-      return false; // ARMV8R and INVALID
+      return false; // ARMV8R
     if (this->Version.getMajor() == Other.Version.getMajor()) {
       return this->Version > Other.Version;
     }
     if (this->Version.getMajor() == 9 && Other.Version.getMajor() == 8) {
       return this->Version.getMinor().value() + 5 >=
              Other.Version.getMinor().value();
     }
     return false;
   }
 
   // Return ArchFeature without the leading "+".
   StringRef getSubArch() const { return ArchFeature.substr(1); }
 
   // Search for ArchInfo by SubArch name
-  static const ArchInfo &findBySubArch(StringRef SubArch);
+  static std::optional<ArchInfo> findBySubArch(StringRef SubArch);
 };
 
 // clang-format off
-inline constexpr ArchInfo INVALID   = { VersionTuple{0, 0}, AProfile, "invalid", "+", (AArch64::AEK_NONE)};
 inline constexpr ArchInfo ARMV8A    = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (AArch64::AEK_FP | AArch64::AEK_SIMD), };
 inline constexpr ArchInfo ARMV8_1A  = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | AArch64::AEK_CRC | AArch64::AEK_LSE | AArch64::AEK_RDM)};
 inline constexpr ArchInfo ARMV8_2A  = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | AArch64::AEK_RAS)};
 inline constexpr ArchInfo ARMV8_3A  = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts | AArch64::AEK_RCPC)};
 inline constexpr ArchInfo ARMV8_4A  = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts | AArch64::AEK_DOTPROD)};
 inline constexpr ArchInfo ARMV8_5A  = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)};
 inline constexpr ArchInfo ARMV8_6A  = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)};
 inline constexpr ArchInfo ARMV8_7A  = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)};
 inline constexpr ArchInfo ARMV8_8A  = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)};
 inline constexpr ArchInfo ARMV8_9A  = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)};
 inline constexpr ArchInfo ARMV9A    = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts | AArch64::AEK_FP16 | AArch64::AEK_SVE | AArch64::AEK_SVE2)};
 inline constexpr ArchInfo ARMV9_1A  = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)};
 inline constexpr ArchInfo ARMV9_2A  = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)};
 inline constexpr ArchInfo ARMV9_3A  = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)};
 inline constexpr ArchInfo ARMV9_4A  = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)};
 // For v8-R, we do not enable crypto and align with GCC that enables a more minimal set of optional architecture extensions.
 inline constexpr ArchInfo ARMV8R    = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", ((ARMV8_5A.DefaultExts ^ AArch64::AEK_LSE) | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SB), };
 // clang-format on
 
 // The set of all architectures
-static constexpr std::array<const ArchInfo *, 17> ArchInfos = {
-    &INVALID,  &ARMV8A,   &ARMV8_1A, &ARMV8_2A, &ARMV8_3A, &ARMV8_4A,
-    &ARMV8_5A, &ARMV8_6A, &ARMV8_7A, &ARMV8_8A, &ARMV8_9A, &ARMV9A,
-    &ARMV9_1A, &ARMV9_2A, &ARMV9_3A, &ARMV9_4A, &ARMV8R,
+static constexpr std::array<const ArchInfo *, 16> ArchInfos = {
+    &ARMV8A,   &ARMV8_1A, &ARMV8_2A, &ARMV8_3A, &ARMV8_4A, &ARMV8_5A,
+    &ARMV8_6A, &ARMV8_7A, &ARMV8_8A, &ARMV8_9A, &ARMV9A, &ARMV9_1A,
+    &ARMV9_2A, &ARMV9_3A, &ARMV9_4A, &ARMV8R,
 };
 
 // Details of a specific CPU.
 struct CpuInfo {
   StringRef Name; // Name, as written for -mcpu.
   const ArchInfo &Arch;
   uint64_t DefaultExtensions; // Default extensions for this CPU. These will be
                               // ORd with the architecture defaults.
inline constexpr CpuInfo CpuInfos[] = {
     {"ampere1", ARMV8_6A,
      (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_SHA3 |
       AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS |
       AArch64::AEK_RAND)},
     {"ampere1a", ARMV8_6A,
      (AArch64::AEK_FP16 | AArch64::AEK_RAND | AArch64::AEK_SM4 |
       AArch64::AEK_SHA3 | AArch64::AEK_SHA2 | AArch64::AEK_AES |
       AArch64::AEK_MTE | AArch64::AEK_SB | AArch64::AEK_SSBS)},
-    // Invalid CPU
-    {"invalid", INVALID, (AArch64::AEK_INVALID)},
 };
 
 // An alias for a CPU.
 struct CpuAlias {
   StringRef Alias;
   StringRef Name;
 };
 
 inline constexpr CpuAlias CpuAliases[] = {{"grace", "neoverse-v2"}};
 
 bool getExtensionFeatures(uint64_t Extensions,
                           std::vector<StringRef> &Features);
 
 StringRef getArchExtFeature(StringRef ArchExt);
 StringRef resolveCPUAlias(StringRef CPU);
 
 // Information by Name
 uint64_t getDefaultExtensions(StringRef CPU, const ArchInfo &AI);
 void getFeatureOption(StringRef Name, std::string &Feature);
-const ArchInfo &getArchForCpu(StringRef CPU);
+std::optional<ArchInfo> getArchForCpu(StringRef CPU);
 
 // Parser
-const ArchInfo &parseArch(StringRef Arch);
-ArchExtKind parseArchExt(StringRef ArchExt);
+std::optional<ArchInfo> parseArch(StringRef Arch);
+std::optional<ExtensionInfo> parseArchExtension(StringRef Extension);
 // Given the name of a CPU or alias, return the correponding CpuInfo.
-const CpuInfo &parseCpu(StringRef Name);
+std::optional<CpuInfo> parseCpu(StringRef Name);
 // Used by target parser tests
 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
 
 bool isX18ReservedByDefault(const Triple &TT);
 uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
 
 } // namespace AArch64
 } // namespace llvm
 
 #endif

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

 #include "llvm/Support/Casting.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/SMLoc.h"
 #include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/AArch64TargetParser.h"
 #include <cassert>
 #include <cctype>
 #include <cstdint>
 #include <cstdio>
 #include <optional>
 #include <string>
 #include <tuple>
 #include <utility>

 ///   ::= .arch token
 bool AArch64AsmParser::parseDirectiveArch(SMLoc L) {
   SMLoc ArchLoc = getLoc();
 
   StringRef Arch, ExtensionString;
   std::tie(Arch, ExtensionString) =
       getParser().parseStringToEndOfStatement().trim().split('+');
 
-  const AArch64::ArchInfo &ArchInfo = AArch64::parseArch(Arch);
-  if (ArchInfo == AArch64::INVALID)
+  std::optional<AArch64::ArchInfo> ArchInfo = AArch64::parseArch(Arch);
+  if (!ArchInfo)
     return Error(ArchLoc, "unknown arch name");
 
   if (parseToken(AsmToken::EndOfStatement))
     return true;
 
   // Get the architecture and extension features.
   std::vector<StringRef> AArch64Features;
-  AArch64Features.push_back(ArchInfo.ArchFeature);
+  AArch64Features.push_back(ArchInfo->ArchFeature);
   AArch64::getExtensionFeatures(
-      AArch64::getDefaultExtensions("generic", ArchInfo), AArch64Features);
+      AArch64::getDefaultExtensions("generic", *ArchInfo), AArch64Features);
 
   MCSubtargetInfo &STI = copySTI();
   std::vector<std::string> ArchFeatures(AArch64Features.begin(), AArch64Features.end());
   STI.setDefaultFeatures("generic", /*TuneCPU*/ "generic",
                          join(ArchFeatures.begin(), ArchFeatures.end(), ","));
 
   SmallVector<StringRef, 4> RequestedExtensions;
   if (!ExtensionString.empty())
     ExtensionString.split(RequestedExtensions, '+');
 
-  ExpandCryptoAEK(ArchInfo, RequestedExtensions);
+  ExpandCryptoAEK(*ArchInfo, RequestedExtensions);
 
   FeatureBitset Features = STI.getFeatureBits();
   for (auto Name : RequestedExtensions) {
     bool EnableFeature = true;
 
     if (Name.startswith_insensitive("no")) {
       EnableFeature = false;
       Name = Name.substr(2);
bool AArch64AsmParser::parseDirectiveCPU(SMLoc L) {
 
   if (parseToken(AsmToken::EndOfStatement))
     return true;
 
   SmallVector<StringRef, 4> RequestedExtensions;
   if (!ExtensionString.empty())
     ExtensionString.split(RequestedExtensions, '+');
 
-  // FIXME This is using tablegen data, but should be moved to ARMTargetParser
-  // once that is tablegen'ed
-  if (!getSTI().isCPUStringValid(CPU)) {
+  const std::optional<llvm::AArch64::ArchInfo> CpuArch = llvm::AArch64::getArchForCpu(CPU);
+  if (!CpuArch) {
     Error(CurLoc, "unknown CPU name");
     return false;
   }
+  ExpandCryptoAEK(*CpuArch, RequestedExtensions);
 
   MCSubtargetInfo &STI = copySTI();
   STI.setDefaultFeatures(CPU, /*TuneCPU*/ CPU, "");
   CurLoc = incrementLoc(CurLoc, CPU.size());
 
-  ExpandCryptoAEK(llvm::AArch64::getArchForCpu(CPU), RequestedExtensions);
-
   for (auto Name : RequestedExtensions) {
     // Advance source location past '+'.
     CurLoc = incrementLoc(CurLoc, 1);
 
     bool EnableFeature = true;
 
     if (Name.startswith_insensitive("no")) {
       EnableFeature = false;

llvm/lib/TargetParser/AArch64TargetParser.cpp

 }
 
 uint64_t AArch64::getDefaultExtensions(StringRef CPU,
                                        const AArch64::ArchInfo &AI) {
   if (CPU == "generic")
     return AI.DefaultExts;
 
   // Note: this now takes cpu aliases into account
-  const CpuInfo &Cpu = parseCpu(CPU);
-  return Cpu.Arch.DefaultExts | Cpu.DefaultExtensions;
+  std::optional<CpuInfo> Cpu = parseCpu(CPU);
+  if (!Cpu)
+    return AI.DefaultExts;
+
+  return Cpu->Arch.DefaultExts | Cpu->DefaultExtensions;
 }
 
 void AArch64::getFeatureOption(StringRef Name, std::string &Feature) {
   for (const auto &E : llvm::AArch64::Extensions) {
     if (Name == E.Name) {
       Feature = E.Feature;
       return;
     }
   }
   Feature = Name.str();
 }
 
-const AArch64::ArchInfo &AArch64::getArchForCpu(StringRef CPU) {
+std::optional<AArch64::ArchInfo> AArch64::getArchForCpu(StringRef CPU) {
   if (CPU == "generic")
     return ARMV8A;
 
   // Note: this now takes cpu aliases into account
-  const CpuInfo &Cpu = parseCpu(CPU);
-  return Cpu.Arch;
+  std::optional<CpuInfo> Cpu = parseCpu(CPU);
+  if (!Cpu)
+    return {};
+  return Cpu->Arch;
 }
 
-const AArch64::ArchInfo &AArch64::ArchInfo::findBySubArch(StringRef SubArch) {
+std::optional<AArch64::ArchInfo> AArch64::ArchInfo::findBySubArch(StringRef SubArch) {
   for (const auto *A : AArch64::ArchInfos)
     if (A->getSubArch() == SubArch)
       return *A;
-  return AArch64::INVALID;
+  return {};
 }
 
 uint64_t AArch64::getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs) {
   uint64_t FeaturesMask = 0;
   for (const StringRef &FeatureStr : FeatureStrs) {
     for (const auto &E : llvm::AArch64::Extensions)
       if (FeatureStr == E.Name) {
         FeaturesMask |= (1ULL << E.CPUFeature);
         break;
       }
   }
   return FeaturesMask;
 }
 
 bool AArch64::getExtensionFeatures(uint64_t InputExts,
                                    std::vector<StringRef> &Features) {
-  if (InputExts == AArch64::AEK_INVALID)
-    return false;
-
   for (const auto &E : Extensions)
     /* INVALID and NONE have no feature name. */
     if ((InputExts & E.ID) && !E.Feature.empty())
       Features.push_back(E.Feature);
 
   return true;
 }
 
StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
   for (const auto &AE : Extensions)
     if (!AE.Feature.empty() && ArchExt == AE.Name)
       return AE.Feature;
   return StringRef();
 }
 
 void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
   for (const auto &C : CpuInfos)
-    if (C.Arch != INVALID)
       Values.push_back(C.Name);
 
   for (const auto &Alias : CpuAliases)
     Values.push_back(Alias.Alias);
 }
 
 bool AArch64::isX18ReservedByDefault(const Triple &TT) {
   return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
          TT.isOSWindows();
 }
 
 // Allows partial match, ex. "v8a" matches "armv8a".
-const AArch64::ArchInfo &AArch64::parseArch(StringRef Arch) {
+std::optional<AArch64::ArchInfo> AArch64::parseArch(StringRef Arch) {
   Arch = llvm::ARM::getCanonicalArchName(Arch);
   if (checkArchVersion(Arch) < 8)
-    return AArch64::INVALID;
+    return {};
 
   StringRef Syn = llvm::ARM::getArchSynonym(Arch);
   for (const auto *A : ArchInfos) {
     if (A->Name.endswith(Syn))
       return *A;
   }
-  return AArch64::INVALID;
+  return {};
 }
 
-AArch64::ArchExtKind AArch64::parseArchExt(StringRef ArchExt) {
+std::optional<AArch64::ExtensionInfo> AArch64::parseArchExtension(StringRef ArchExt) {
   for (const auto &A : Extensions) {
     if (ArchExt == A.Name)
-      return static_cast<ArchExtKind>(A.ID);
+      return A;
   }
-  return AArch64::AEK_INVALID;
+  return {};
 }
 
-const AArch64::CpuInfo &AArch64::parseCpu(StringRef Name) {
+std::optional<AArch64::CpuInfo> AArch64::parseCpu(StringRef Name) {
   // Resolve aliases first.
   Name = resolveCPUAlias(Name);
 
   // Then find the CPU name.
   for (const auto &C : CpuInfos)
     if (Name == C.Name)
       return C;
 
-  // "generic" returns invalid.
-  assert(Name != "invalid" && "Unexpected recursion.");
-  return parseCpu("invalid");
+  return {};
 }

llvm/unittests/TargetParser/TargetParserTest.cpp

 #include "llvm/Support/ARMBuildAttributes.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
 #include "llvm/TargetParser/ARMTargetParserCommon.h"
 #include "llvm/TargetParser/Triple.h"
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
+#include <optional>
 #include <string>
 
 using namespace llvm;
 
 namespace {
 const char *ARMArch[] = {
     "armv4",        "armv4t",      "armv5",          "armv5t",      "armv5e",
     "armv5te",      "armv5tej",    "armv6",          "armv6j",      "armv6k",

 }
 
 class AArch64CPUTestFixture
     : public ::testing::TestWithParam<ARMCPUTestParams> {};
 
 TEST_P(AArch64CPUTestFixture, testAArch64CPU) {
   ARMCPUTestParams params = GetParam();
 
-  const AArch64::ArchInfo &AI = AArch64::parseCpu(params.CPUName).Arch;
-  EXPECT_EQ(params.ExpectedArch, AI.Name);
+  const std::optional<AArch64::CpuInfo> Cpu = AArch64::parseCpu(params.CPUName);
+  EXPECT_TRUE(Cpu);
+  EXPECT_EQ(params.ExpectedArch, Cpu->Arch.Name);
 
   uint64_t default_extensions =
-      AArch64::getDefaultExtensions(params.CPUName, AI);
+      AArch64::getDefaultExtensions(params.CPUName, Cpu->Arch);
   EXPECT_PRED_FORMAT2(
       AssertSameExtensionFlags<ARM::ISAKind::AARCH64>(params.CPUName),
       params.ExpectedFlags, default_extensions);
 }
 
 INSTANTIATE_TEST_SUITE_P(
     AArch64CPUTests, AArch64CPUTestFixture,
     ::testing::Values(
-        ARMCPUTestParams("invalid", "invalid", "invalid", AArch64::AEK_NONE,
-                         ""),
-        ARMCPUTestParams("generic", "invalid", "none", AArch64::AEK_NONE, ""),
-
         ARMCPUTestParams("cortex-a34", "armv8-a", "crypto-neon-fp-armv8",
                          AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
                              AArch64::AEK_FP | AArch64::AEK_SIMD,
                          "8-A"),
         ARMCPUTestParams("cortex-a35", "armv8-a", "crypto-neon-fp-armv8",
                          AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
                              AArch64::AEK_FP | AArch64::AEK_SIMD,
                          "8-A"),

 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector<StringRef, NumAArch64CPUArchs> List;
   AArch64::fillValidCPUArchList(List);
 
   // No list exists for these in this test suite, so ensure all are
   // valid, and match the expected 'magic' count.
   EXPECT_EQ(List.size(), NumAArch64CPUArchs);
   for(StringRef CPU : List) {
-    EXPECT_NE(AArch64::parseCpu(CPU).Arch, AArch64::INVALID);
+    EXPECT_TRUE(AArch64::parseCpu(CPU));
   }
 }
 
 bool testAArch64Arch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
                      unsigned ArchAttr) {
-  const AArch64::ArchInfo &AI = AArch64::parseArch(Arch);
-  return AI != AArch64::INVALID;
+  const std::optional<AArch64::ArchInfo> AI = AArch64::parseArch(Arch);
+  return AI.has_value();
 }
 
 TEST(TargetParserTest, testAArch64Arch) {
   EXPECT_TRUE(testAArch64Arch("armv8-a", "cortex-a53", "v8a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv8.1-a", "generic", "v8.1a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv8.2-a", "generic", "v8.2a",
TEST(TargetParserTest, testAArch64Arch) {
   EXPECT_TRUE(testAArch64Arch("armv9.2-a", "generic", "v9.2a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv9.3-a", "generic", "v9.3a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv9.4-a", "generic", "v9.4a",
                               ARMBuildAttrs::CPUArch::v8_A));
 }
 
-bool testAArch64Extension(StringRef CPUName, const AArch64::ArchInfo &AI,
-                          StringRef ArchExt) {
-  return AArch64::getDefaultExtensions(CPUName, AI) &
-         AArch64::parseArchExt(ArchExt);
+bool testAArch64Extension(StringRef CPUName, StringRef ArchExt) {
+  std::optional<AArch64::ExtensionInfo> Extension =
+      AArch64::parseArchExtension(ArchExt);
+  if (!Extension)
+    return false;
+  std::optional<AArch64::CpuInfo> CpuInfo = AArch64::parseCpu(CPUName);
+  return (CpuInfo->Arch.DefaultExts | CpuInfo->DefaultExtensions) & Extension->ID;
+}
+
+bool testAArch64Extension(const AArch64::ArchInfo &AI, StringRef ArchExt) {
+  std::optional<AArch64::ExtensionInfo> Extension =
+      AArch64::parseArchExtension(ArchExt);
+  if (!Extension)
+    return false;
+  return AI.DefaultExts & Extension->ID;
 }
 
 TEST(TargetParserTest, testAArch64Extension) {
-  EXPECT_FALSE(testAArch64Extension("cortex-a34", AArch64::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a35", AArch64::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a53", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a55", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a55", AArch64::INVALID, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a55", AArch64::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a55", AArch64::INVALID, "dotprod"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a57", AArch64::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a72", AArch64::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a73", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a75", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a75", AArch64::INVALID, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a75", AArch64::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a75", AArch64::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("cyclone", AArch64::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("exynos-m3", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "rdm"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "rdm"));
-  EXPECT_TRUE(testAArch64Extension("falkor", AArch64::INVALID, "rdm"));
-  EXPECT_FALSE(testAArch64Extension("kryo", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "crc"));
-  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "rdm"));
-  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "rcpc"));
-  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "profile"));
-  EXPECT_FALSE(testAArch64Extension("saphira", AArch64::INVALID, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("thunderx2t99", AArch64::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("thunderx", AArch64::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("thunderxt81", AArch64::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("thunderxt83", AArch64::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("thunderxt88", AArch64::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "crypto"));
-  EXPECT_FALSE(testAArch64Extension("tsv110", AArch64::INVALID, "sha3"));
-  EXPECT_FALSE(testAArch64Extension("tsv110", AArch64::INVALID, "sm4"));
-  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "profile"));
-  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("a64fx", AArch64::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("a64fx", AArch64::INVALID, "sve"));
-  EXPECT_FALSE(testAArch64Extension("a64fx", AArch64::INVALID, "sve2"));
-  EXPECT_TRUE(testAArch64Extension("carmel", AArch64::INVALID, "crypto"));
-  EXPECT_TRUE(testAArch64Extension("carmel", AArch64::INVALID, "fp16"));
-
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8A, "ras"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_1A, "ras"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_2A, "profile"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_2A, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_2A, "fp16fml"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_3A, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_3A, "fp16fml"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_4A, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_4A, "fp16fml"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a34", "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a35", "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a53", "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a55", "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a55", "fp16"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a55", "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a55", "dotprod"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a57", "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a72", "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a73", "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a75", "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a75", "fp16"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a75", "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a75", "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", "fp16"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", "lse"));
+  EXPECT_FALSE(testAArch64Extension("cyclone", "ras"));
+  EXPECT_FALSE(testAArch64Extension("exynos-m3", "ras"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", "fp16"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", "lse"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", "ras"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", "rdm"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", "fp16"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", "lse"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", "ras"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", "rdm"));
+  EXPECT_TRUE(testAArch64Extension("falkor", "rdm"));
+  EXPECT_FALSE(testAArch64Extension("kryo", "ras"));
+  EXPECT_TRUE(testAArch64Extension("saphira", "crc"));
+  EXPECT_TRUE(testAArch64Extension("saphira", "lse"));
+  EXPECT_TRUE(testAArch64Extension("saphira", "rdm"));
+  EXPECT_TRUE(testAArch64Extension("saphira", "ras"));
+  EXPECT_TRUE(testAArch64Extension("saphira", "rcpc"));
+  EXPECT_TRUE(testAArch64Extension("saphira", "profile"));
+  EXPECT_FALSE(testAArch64Extension("saphira", "fp16"));
+  EXPECT_FALSE(testAArch64Extension("thunderx2t99", "ras"));
+  EXPECT_FALSE(testAArch64Extension("thunderx", "lse"));
+  EXPECT_FALSE(testAArch64Extension("thunderxt81", "lse"));
+  EXPECT_FALSE(testAArch64Extension("thunderxt83", "lse"));
+  EXPECT_FALSE(testAArch64Extension("thunderxt88", "lse"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", "crypto"));
+  EXPECT_FALSE(testAArch64Extension("tsv110", "sha3"));
+  EXPECT_FALSE(testAArch64Extension("tsv110", "sm4"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", "ras"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", "profile"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", "fp16"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("a64fx", "fp16"));
+  EXPECT_TRUE(testAArch64Extension("a64fx", "sve"));
+  EXPECT_FALSE(testAArch64Extension("a64fx", "sve2"));
+  EXPECT_TRUE(testAArch64Extension("carmel", "crypto"));
+  EXPECT_TRUE(testAArch64Extension("carmel", "fp16"));
+
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8A, "ras"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_1A, "ras"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_2A, "profile"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_2A, "fp16"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_2A, "fp16fml"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_3A, "fp16"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_3A, "fp16fml"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_4A, "fp16"));
+  EXPECT_FALSE(testAArch64Extension(AArch64::ARMV8_4A, "fp16fml"));
 }
 
 TEST(TargetParserTest, AArch64ExtensionFeatures) {
   std::vector<uint64_t> Extensions = {
       AArch64::AEK_CRC,     AArch64::AEK_LSE,       AArch64::AEK_RDM,
       AArch64::AEK_CRYPTO,  AArch64::AEK_SM4,       AArch64::AEK_SHA3,
       AArch64::AEK_SHA2,    AArch64::AEK_AES,       AArch64::AEK_DOTPROD,
       AArch64::AEK_FP,      AArch64::AEK_SIMD,      AArch64::AEK_FP16,
TEST(TargetParserTest, AArch64ExtensionFeatures) {
   };
 
   std::vector<StringRef> Features;
 
   uint64_t ExtVal = 0;
   for (auto Ext : Extensions)
     ExtVal |= Ext;
 
-  // INVALID and NONE have no feature names.
-  EXPECT_FALSE(AArch64::getExtensionFeatures(AArch64::AEK_INVALID, Features));
-  EXPECT_TRUE(!Features.size());
+  // NONE has no feature names.
   // We return True here because NONE is a valid choice.
   EXPECT_TRUE(AArch64::getExtensionFeatures(AArch64::AEK_NONE, Features));
   EXPECT_TRUE(!Features.size());
 
   AArch64::getExtensionFeatures(ExtVal, Features);
   EXPECT_EQ(Extensions.size(), Features.size());
 
   EXPECT_TRUE(llvm::is_contained(Features, "+crc"));
TEST(TargetParserTest, AArch64ExtensionFeatures) {
   // result. (note that AEK_NONE doesn't have a name so it won't be in the
   // result despite its bit being set)
   std::vector<StringRef> AllFeatures;
   EXPECT_TRUE(AArch64::getExtensionFeatures(-1, AllFeatures));
   EXPECT_THAT(Features, ::testing::ContainerEq(AllFeatures));
 }
 
 TEST(TargetParserTest, AArch64ArchFeatures) {
-  EXPECT_EQ(AArch64::INVALID.ArchFeature, "+");
   EXPECT_EQ(AArch64::ARMV8A.ArchFeature, "+v8a");
   EXPECT_EQ(AArch64::ARMV8_1A.ArchFeature, "+v8.1a");
   EXPECT_EQ(AArch64::ARMV8_2A.ArchFeature, "+v8.2a");
   EXPECT_EQ(AArch64::ARMV8_3A.ArchFeature, "+v8.3a");
   EXPECT_EQ(AArch64::ARMV8_4A.ArchFeature, "+v8.4a");
   EXPECT_EQ(AArch64::ARMV8_5A.ArchFeature, "+v8.5a");
   EXPECT_EQ(AArch64::ARMV8_6A.ArchFeature, "+v8.6a");
   EXPECT_EQ(AArch64::ARMV8_7A.ArchFeature, "+v8.7a");
   EXPECT_EQ(AArch64::ARMV8_8A.ArchFeature, "+v8.8a");
   EXPECT_EQ(AArch64::ARMV8_9A.ArchFeature, "+v8.9a");
   EXPECT_EQ(AArch64::ARMV9A.ArchFeature, "+v9a");
   EXPECT_EQ(AArch64::ARMV9_1A.ArchFeature, "+v9.1a");
   EXPECT_EQ(AArch64::ARMV9_2A.ArchFeature, "+v9.2a");
   EXPECT_EQ(AArch64::ARMV9_3A.ArchFeature, "+v9.3a");
   EXPECT_EQ(AArch64::ARMV9_4A.ArchFeature, "+v9.4a");
   EXPECT_EQ(AArch64::ARMV8R.ArchFeature, "+v8r");
 }
 
 TEST(TargetParserTest, AArch64ArchPartialOrder) {
-  EXPECT_FALSE(AArch64::INVALID.implies(AArch64::INVALID));
-
   for (const auto *A : AArch64::ArchInfos) {
     EXPECT_EQ(*A, *A);
-    // Comparison with invalid is always false
-    EXPECT_FALSE(A->implies(AArch64::INVALID));
-    EXPECT_FALSE(AArch64::INVALID.implies(*A));
 
     // v8r has no relation to other valid architectures
     if (*A != AArch64::ARMV8R) {
       EXPECT_FALSE(A->implies(AArch64::ARMV8R));
       EXPECT_FALSE(AArch64::ARMV8R.implies(*A));
     }
   }