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AMDGPU: Check if operand RC contains register used when printing
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Authored by Petar.Avramovic on Dec 8 2022, 9:41 AM.

Details

Summary

Disassembler can successfully decode sgpr register when only vgpr
registers are valid for the operand (e.g. VReg_* and VISrc_* operands).
In InstPrinter, detect when operand register class does not contain
register that is being printed. Does not result in an error.
Intended use is for disassembler tests.

Diff Detail

Event Timeline

Petar.Avramovic created this revision.Dec 8 2022, 9:41 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 8 2022, 9:41 AM
Petar.Avramovic requested review of this revision.Dec 8 2022, 9:41 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 8 2022, 9:41 AM
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
678

I don't know what is going on here but if we check for other classes there is a lot of errors. Related to registers with special name not being member of register class, common error is that M0 is not in SReg_32.

dp added a comment.Dec 9 2022, 5:30 AM

Overall looks good.

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
678

The reason for these failures is that we have two kinds of registers - preudo and real. The latter are necessary to reflect the fact that some registers have different encodings on different GPUs. So you have to use mc2PseudoReg.

But this correction is insufficient. We also have some registers which are used in MC only. They are defined as 32-bit registers in td, but MC can use them where wider operands are expected.

So your code may be corrected as follows:

const MCRegisterClass *RC = &MRI.getRegClass(Desc.OpInfo[OpNo].RegClass);
auto Reg = mc2PseudoReg(Op.getReg());
if (!RC->contains(Reg) && !isInlineValue(Reg)) {
    StringRef RCName(MRI.getRegClassName(RC));
    O << "/*Invalid register, operand has \'" << RCName
      << "\' register class*/";
  }
}
Petar.Avramovic retitled this revision from AMDGPU: Check if operand with vgpr RC contains reg when printing to AMDGPU: Check if operand RC contains register used when printing.
Petar.Avramovic edited the summary of this revision. (Show Details)
dp accepted this revision.Dec 9 2022, 7:35 AM

LGTM with a nit.

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
1129 ↗(On Diff #481645)

Should be tagged LLVM_READNONE.

This revision is now accepted and ready to land.Dec 9 2022, 7:35 AM

Thanks for the review.

This revision was landed with ongoing or failed builds.Dec 9 2022, 8:58 AM
This revision was automatically updated to reflect the committed changes.