Details
Details
- Reviewers
Joe_Nash piotr rampitec arsenm - Group Reviewers
Restricted Project - Commits
- rG3822a01e0be2: [AMDGPU] Add GFX11 ds_bvh_stack_rtn_b32 instruction
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
Comment Actions
The comments say "tablegen doesn't support matching instructions with multiple outputs". Is that not true? (I'm not the original author of this patch.)
Comment Actions
I missed the second return value somehow
llvm/lib/Target/AMDGPU/DSInstructions.td | ||
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289 | Does this really have side effects? |
llvm/lib/Target/AMDGPU/DSInstructions.td | ||
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289 | It reads and writes LDS in a complicated way. Previously we've used hasSideEffects=1 to model complicated GDS access, e.g. on the DS_ADD/SUB_GS_REG_RTN instructions. Is there a better way? Should we be using MMOs with addrspace 2/3 but no pointer info instead? If so I'd prefer to do that as a follow up. |
llvm/lib/Target/AMDGPU/DSInstructions.td | ||
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289 | Yes, MMOs would be better |