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[SVE] Extend getMemVTFromNode to cover the sret variants of sve.ld2/3/4.
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Authored by paulwalker-arm on Aug 22 2022, 9:34 AM.

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Summary

This enables the use of reg+imm addressing modes to match the
non-sret variants of these intrinsics.

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Event Timeline

paulwalker-arm created this revision.Aug 22 2022, 9:34 AM
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paulwalker-arm requested review of this revision.Aug 22 2022, 9:34 AM
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Matt added a subscriber: Matt.Aug 22 2022, 2:11 PM

BTW I pushed this patch to main:
https://reviews.llvm.org/D133023

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
5431

I believe you can remove this test, no?
It should fall into the default switch statement.

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
5431

The opcode infers things like the number and type of operands and so this test ensures it's safe to do cast<ConstantSDNode>(Root->getOperand(1))->getZExtValue().

sdesmalen accepted this revision.Nov 2 2022, 6:28 AM

This looks sensible to me.

This revision is now accepted and ready to land.Nov 2 2022, 6:28 AM