[LLDB][RISCV] Fix risc-v target build

[Emmmer]

Summary

Fixed an inconsistency between D130985 and D130342

This should be a follow-up of D130985

[thakis]

(please submit simple build fixes first and have them reviewed post commit, so that the bots don't stay red for long.)

[Emmmer]

Sorry, I didn't get "have them reviewed post commit", I'm new to llvm so can you give me some instruction on how to do it? Thank you.

[thakis]

Just commit the change, and if there are comments on the commit later, address then in a follow-up.

[thakis]

(see also https://llvm.org/docs/CodeReview.html#must-code-be-reviewed-prior-to-being-committed)

[DavidSpickett]

(please submit simple build fixes first and have them reviewed post commit, so that the bots don't stay red for long.)

And in this case the way I'd review it is to check it all out and build it so it amounts to the same thing (and saves me firing up a Windows machine).

LGTM regardless.

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp

54

On the assumption that riscv6 linux doesn't have a 32 bit compatibility mode, this is fine.

(that's what this is trying to detect, for example running arm32 on arm64).

[thakis]

Can this land, please? The windows build has been broken for close to 7 hours now.

[Emmmer]

In D131667#3715935, @thakis wrote:

Can this land, please? The windows build has been broken for close to 7 hours now.

After hours of trying to set up a working windows dev machine, I failed to reproduce the build failure you provided here (http://45.33.8.238/win/64255/step_4.txt). I am using a Windows 10 21H2 19044.1889 with VS 2022 and MSVC 143.

I guess it is the mocked dwarf PC register number that was converted to signed int32 and then implicitly converted to unsigned int32 where msvc reject this kind of conversion. You may need to check manually if this was the fix you want ( sorry for that :( ). If so, we land it immediately.

[thakis]

That bot uses clang-cl as compiler.

I can't easily check it either at the moment. It's easiest to land this and see if it helps.

Changing enum to enum : unsigned might (or might not) help as well.

[Emmmer]

In D131667#3715975, @thakis wrote:

That bot uses clang-cl as compiler.

I can't easily check it either at the moment. It's easiest to land this and see if it helps.

Changing enum to enum : unsigned might (or might not) help as well.

We take a lot risk to land it without test. What if it does not help? Adding more commits until it is fixed?

[thakis]

It's _already broken_. There's zero risk to make it worse. (Assuming you checked it still builds on Linux.)

Yes, if it doesn't help you'd land another fix attempt.

(This is what the "if it takes a while" was for, though.)

[Emmmer]

okay, let's try

[thakis]

This helped, thanks.

[labath]

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp

54

(even if it does, I don't think we have to support that mode right away)

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp

 //===-- NativeRegisterContextLinux_riscv64.cpp ----------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #if defined(__riscv) && __riscv_xlen == 64
 
 #include "NativeRegisterContextLinux_riscv64.h"
 
+#include "lldb/Host/HostInfo.h"
 #include "lldb/Utility/DataBufferHeap.h"
 #include "lldb/Utility/Log.h"
 #include "lldb/Utility/RegisterValue.h"
 #include "lldb/Utility/Status.h"
 
 #include "Plugins/Process/Linux/NativeProcessLinux.h"
 #include "Plugins/Process/Linux/Procfs.h"
 #include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h"
case llvm::Triple::riscv64: {
     return std::make_unique<NativeRegisterContextLinux_riscv64>(
         target_arch, native_thread, std::move(register_info_up));
   }
   default:
     llvm_unreachable("have no register context for architecture");
   }
 }
 
+llvm::Expected<ArchSpec>
+NativeRegisterContextLinux::DetermineArchitecture(lldb::tid_t tid) {
+  return HostInfo::GetArchitecture();
+}
+
 NativeRegisterContextLinux_riscv64::NativeRegisterContextLinux_riscv64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
     std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info_up)
     : NativeRegisterContextRegisterInfo(native_thread,
                                         register_info_up.release()),
       NativeRegisterContextLinux(native_thread) {
   ::memset(&m_fpr, 0, sizeof(m_fpr));
   ::memset(&m_gpr, 0, sizeof(m_gpr));

lldb/source/Utility/RISCV_DWARF_Registers.h

enum {
   dwarf_last_csr = 8191,
 
   // register name alias
   dwarf_gpr_ra = dwarf_gpr_x1,
   dwarf_gpr_sp = dwarf_gpr_x2,
   dwarf_gpr_fp = dwarf_gpr_x8,
 
   // mock pc regnum
-  dwarf_gpr_pc = UINT32_MAX,
+  dwarf_gpr_pc = 11451,
 };
 
 } // namespace riscv_dwarf
 
 #endif // LLDB_SOURCE_UTILITY_RISCV_DWARF_REGISTERS_H