[RISCV] Rename PROC_ALIAS to TUNE_ALIAS to reflect it's usage. NFC

[craig.topper]

Summary

This is not used as general CPU alias. Only to support -mtune. Name it as such.

[kito-cheng]

LGTM

llvm/include/llvm/Support/RISCVTargetParser.def

-#ifndef PROC_ALIAS
-#define PROC_ALIAS(NAME, RV32, RV64)
+#ifndef TUNE_ALIAS
+#define TUNE_ALIAS(NAME, RV32, RV64)
 #endif
 
-PROC_ALIAS("generic", "generic-rv32", "generic-rv64")
-PROC_ALIAS("rocket", "rocket-rv32", "rocket-rv64")
-PROC_ALIAS("sifive-7-series", "sifive-7-rv32", "sifive-7-rv64")
+TUNE_ALIAS("generic", "generic-rv32", "generic-rv64")
+TUNE_ALIAS("rocket", "rocket-rv32", "rocket-rv64")
+TUNE_ALIAS("sifive-7-series", "sifive-7-rv32", "sifive-7-rv64")
 
-#undef PROC_ALIAS
+#undef TUNE_ALIAS
 
 #ifndef PROC
 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)
 #endif
 
 PROC(INVALID, {"invalid"}, FK_INVALID, {""})
 PROC(GENERIC_RV32, {"generic-rv32"}, FK_NONE, {""})
 PROC(GENERIC_RV64, {"generic-rv64"}, FK_64BIT, {""})

llvm/lib/Support/TargetParser.cpp

CPUKind parseCPUKind(StringRef CPU) {
   return llvm::StringSwitch<CPUKind>(CPU)
 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
 #include "llvm/Support/RISCVTargetParser.def"
       .Default(CK_INVALID);
 }
 
 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) {
   return llvm::StringSwitch<StringRef>(TuneCPU)
-#define PROC_ALIAS(NAME, RV32, RV64) .Case(NAME, IsRV64 ? StringRef(RV64) : StringRef(RV32))
+#define TUNE_ALIAS(NAME, RV32, RV64) .Case(NAME, IsRV64 ? StringRef(RV64) : StringRef(RV32))
 #include "llvm/Support/RISCVTargetParser.def"
       .Default(TuneCPU);
 }
 
 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) {
   TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64);
 
   return llvm::StringSwitch<CPUKind>(TuneCPU)
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
   }
 }
 
 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
   for (const auto &C : RISCVCPUInfo) {
     if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit())
       Values.emplace_back(C.Name);
   }
-#define PROC_ALIAS(NAME, RV32, RV64) Values.emplace_back(StringRef(NAME));
+#define TUNE_ALIAS(NAME, RV32, RV64) Values.emplace_back(StringRef(NAME));
 #include "llvm/Support/RISCVTargetParser.def"
 }
 
 // Get all features except standard extension feature
 bool getCPUFeaturesExceptStdExt(CPUKind Kind,
                                 std::vector<StringRef> &Features) {
   unsigned CPUFeatures = RISCVCPUInfo[static_cast<unsigned>(Kind)].Features;