[CodeGen][inlineasm] assume the flag output of inline asm is boolean value

[ychen]

Summary

GCC inline asm document says that
"... the general rule is that the output variable must be a scalar
integer, and the value is boolean."

Commit e5c37958f901cc9bec50624dbee85d40143e4bca lowers flag output of
inline asm on X86 with setcc, hence it is guaranteed that the flag
is of boolean value. Clang does not support ARM inline asm flag output
yet so nothing need to be worried about ARM.

See "Flag Output" section at
https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#OutputOperands

Fixes https://github.com/llvm/llvm-project/issues/56568

[nikic]

Hm, might it be better to teach LLVM about this (in some ConstantRange/KnownBits logic)? This doesn't really seem like something the frontend should know about and encode, as that means each frontend has to add this annotation by itself.

[ychen]

In D129954#3658139, @nikic wrote:

Hm, might it be better to teach LLVM about this (in some ConstantRange/KnownBits logic)? This doesn't really seem like something the frontend should know about and encode, as that means each frontend has to add this annotation by itself.

Agreed that teaching LLVM about his saves other frontends from doing the same thing. The information is inline asm semantic defined by GCC extension though, I think putting it in the frontend is a valid choice and makes the implementation easy.

I looked into where to put this in LLVM. It seems nontrivial: existing ConstantRanges are computed from binary-op/comparsion etc. Inferring range from an inline asm call is something passes (LazyValueInfo) need to learn, with some kinds of def-use chain walking. That said, I'm definitely new to ConstantRange analysis, it may well be that this is not that hard to implement. Could you please give some guidance?

[nikic]

LGTM. After some further consideration, implementing this properly in LLVM would probably take more effort than is worthwhile (especially as this is target-specific functionality, so we'd actually have to expose TTI queries for this, etc.)

clang/lib/CodeGen/CGStmt.cpp

2734

The canonical form of this is < 2 rather than <= 1.

clang/test/CodeGen/inline-asm-x86-flag-output.c

378

You might want to check that we're doing the right thing if there are multiple output constraints (via extractvalue).

[ychen]

• use < 2
• check multiple flag outputs

[ychen]

• update test

[ychen]

In D129954#3686780, @nikic wrote:

LGTM. After some further consideration, implementing this properly in LLVM would probably take more effort than is worthwhile (especially as this is target-specific functionality, so we'd actually have to expose TTI queries for this, etc.)

Agreed. Thanks for the review.

clang/test/CodeGen/inline-asm-x86-flag-output.c

378

That's a good idea. Done.

[nickdesaulniers]

Thanks for the patch!

clang/lib/CodeGen/CGStmt.cpp

void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
   std::vector<LValue> ResultRegDests;
   std::vector<QualType> ResultRegQualTys;
   std::vector<llvm::Type *> ResultRegTypes;
   std::vector<llvm::Type *> ResultTruncRegTypes;
   std::vector<llvm::Type *> ArgTypes;
   std::vector<llvm::Type *> ArgElemTypes;
   std::vector<llvm::Value*> Args;
   llvm::BitVector ResultTypeRequiresCast;
+  llvm::BitVector ResultRegIsFlagReg;
 
   // Keep track of inout constraints.
   std::string InOutConstraints;
   std::vector<llvm::Value*> InOutArgs;
   std::vector<llvm::Type*> InOutArgTypes;
   std::vector<llvm::Type*> InOutArgElemTypes;
 
   // Keep track of out constraints for tied input operand.
for (unsigned i = 0, e = S.getNumOutputs(); i != e; i++) {
     const bool IsScalarOrAggregate = hasScalarEvaluationKind(QTy) ||
                                      hasAggregateEvaluationKind(QTy);
     if (!Info.allowsMemory() && IsScalarOrAggregate) {
 
       Constraints += "=" + OutputConstraint;
       ResultRegQualTys.push_back(QTy);
       ResultRegDests.push_back(Dest);
 
+      bool IsFlagReg = llvm::StringRef(OutputConstraint).startswith("{@cc");
+      ResultRegIsFlagReg.push_back(IsFlagReg);
+
       llvm::Type *Ty = ConvertTypeForMem(QTy);
       const bool RequiresCast = Info.allowsRegister() &&
           (getTargetHooks().isScalarizableAsmOperand(*this, Ty) ||
            Ty->isAggregateType());
 
       ResultTruncRegTypes.push_back(Ty);
       ResultTypeRequiresCast.push_back(RequiresCast);
 
void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
   }
 
   assert(RegResults.size() == ResultRegTypes.size());
   assert(RegResults.size() == ResultTruncRegTypes.size());
   assert(RegResults.size() == ResultRegDests.size());
   // ResultRegDests can be also populated by addReturnRegisterOutputs() above,
   // in which case its size may grow.
   assert(ResultTypeRequiresCast.size() <= ResultRegDests.size());
+  assert(ResultRegIsFlagReg.size() <= ResultRegDests.size());
   for (unsigned i = 0, e = RegResults.size(); i != e; ++i) {
     llvm::Value *Tmp = RegResults[i];
     llvm::Type *TruncTy = ResultTruncRegTypes[i];
 
+    if ((i < ResultRegIsFlagReg.size()) && ResultRegIsFlagReg[i]) {
+      // Target must guarantee the Value `Tmp` here is lowered to a boolean
+      // value.
+      llvm::Constant *Two = llvm::ConstantInt::get(Tmp->getType(), 2);
+      llvm::Value *IsBooleanValue =
+          Builder.CreateCmp(llvm::CmpInst::ICMP_ULT, Tmp, Two);
+      llvm::Function *FnAssume = CGM.getIntrinsic(llvm::Intrinsic::assume);
+      Builder.CreateCall(FnAssume, IsBooleanValue);
+    }
+
     // If the result type of the LLVM IR asm doesn't match the result type of
     // the expression, do the conversion.
     if (ResultRegTypes[i] != ResultTruncRegTypes[i]) {
 
       // Truncate the integer result to the right size, note that TruncTy can be
       // a pointer.
       if (TruncTy->isFloatingPointTy())
         Tmp = Builder.CreateFPTrunc(Tmp, TruncTy);

clang/test/CodeGen/inline-asm-x86-flag-output.c

_Bool check_no_clobber_conflicts(void) {
   //CHECK:  = tail call i8 asm "", "={@cce},~{cx},~{dirflag},~{fpsr},~{flags}"()
   _Bool b;
   asm(""
       : "=@cce"(b)
       :
       : "cx");
   return b;
 }
+
+int test_assume_boolean_flag(long nr, volatile long *addr) {
+  //CHECK-LABEL: @test_assume_boolean_flag
+  //CHECK: %0 = tail call { i32, i32 } asm "cmp $2,$1", "={@cca},={@ccae},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %addr, i64 %nr)
+  //CHECK: [[RES1:%.*]] = extractvalue { i32, i32 } %0, 0
+  //CHECK: [[RES2:%.*]] = extractvalue { i32, i32 } %0, 1
+  //CHECK: %1 = icmp ult i32 [[RES1]], 2
+  //CHECK: tail call void @llvm.assume(i1 %1)
+  //CHECK: %2 = icmp ult i32 [[RES2]], 2
+  //CHECK: tail call void @llvm.assume(i1 %2)
+  int x,y;
+  asm("cmp %2,%1"
+      : "=@cca"(x), "=@ccae"(y), "=m"(*(volatile long *)(addr))
+      : "r"(nr)
+      : "cc");
+  if (x)
+    return 0;
+  return 1;
+}