[PowerPC][LLD] Change PPC64R2SaveStub to only use non-PC-relative code

[stefanp]

Summary

Currently the PPC64R2SaveStub thunk will produce Power 10 code by default.
This produced an issue when linking older code that made use of the st_other=1
bit but was never meant to be linked or run on Power 10.

This patch makes it so that only the R_PPC64_REL24_NOTOC relocation can produce
Power 10 code.

[MaskRay]

LG.

[PowerPC][LLD] Change the behavior of the PPC64R2SaveStub thunk.

"Change the behavior" isn't descriptive. Just use a brief sentence to describe what has changed, e.g. "Change PPC64R2SaveStub to only use non-PC-relative code"

lld/test/ELF/ppc64-toc-call-to-pcrel-long-jump.s

16

Remove --mcpu=pwr10 since llvm-objdump now defaults to --mcpu=future for ppc64.

[stefanp]

Rebased the patch to top of trunk.
Fixed up test case to remove the mcpu=pwr10.

[MaskRay]

When lld added the R2 Save Stub to that code at link time previous code that was runable on Power 8 now included Power 10 code.

This sentence in the summary seems unclear. The previous sentence has explained that the code caused some issue.
Consider removing it or clarifying it.

[stefanp]

In D129580#3648836, @MaskRay wrote:

When lld added the R2 Save Stub to that code at link time previous code that was runable on Power 8 now included Power 10 code.

This sentence in the summary seems unclear. The previous sentence has explained that the code caused some issue.
Consider removing it or clarifying it.

I've removed the unclear sentence.

Thank you for the very quick review!

[stefanp]

Rebased patch to top of main.

lld/ELF/Thunks.cpp

 void PPC64R2SaveStub::writeTo(uint8_t *buf) {
   const int64_t offset = computeOffset();
   write32(buf + 0, 0xf8410018); // std  r2,24(r1)
   // The branch offset needs to fit in 26 bits.
   if (getMayUseShortThunk()) {
     write32(buf + 4, 0x48000000 | (offset & 0x03fffffc)); // b    <offset>
   } else if (isInt<34>(offset)) {
     int nextInstOffset;
-    if (!config->power10Stubs) {
-      uint64_t tocOffset = destination.getVA() - getPPC64TocBase();
-      if (tocOffset >> 16 > 0) {
-        const uint64_t addi = ADDI_R12_TO_R12_NO_DISP | (tocOffset & 0xffff);
-        const uint64_t addis = ADDIS_R12_TO_R2_NO_DISP | ((tocOffset >> 16) & 0xffff);
-        write32(buf + 4, addis); // addis r12, r2 , top of offset
-        write32(buf + 8, addi);  // addi  r12, r12, bottom of offset
-        nextInstOffset = 12;
-      } else {
-        const uint64_t addi = ADDI_R12_TO_R2_NO_DISP | (tocOffset & 0xffff);
-        write32(buf + 4, addi); // addi r12, r2, offset
-        nextInstOffset = 8;
-      }
-    } else {
-      const uint64_t paddi = PADDI_R12_NO_DISP |
-                             (((offset >> 16) & 0x3ffff) << 32) |
-                             (offset & 0xffff);
-      writePrefixedInstruction(buf + 4, paddi); // paddi r12, 0, func@pcrel, 1
-      nextInstOffset = 12;
-    }
+      const uint64_t addis =
+          ADDIS_R12_TO_R2_NO_DISP | ((tocOffset >> 16) & 0xffff);
     write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12
     write32(buf + nextInstOffset + 4, BCTR);  // bctr
   } else {
     in.ppc64LongBranchTarget->addEntry(&destination, addend);
     const int64_t offsetFromTOC =
         in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
         getPPC64TocBase();
     writePPC64LoadAndBranch(buf + 4, offsetFromTOC);

lld/test/ELF/ppc64-toc-call-to-pcrel-long-jump.s

 # REQUIRES: ppc
 # RUN: split-file %s %t
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le %t/asm -o %t.o
 # RUN: ld.lld -T %t/lts %t.o -o %t_le
 # RUN: llvm-objdump --no-show-raw-insn -d %t_le | FileCheck %s
 # RUN: llvm-readelf -s %t_le | FileCheck %s --check-prefix=SYM
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64 %t/asm -o %t.o
 # RUN: ld.lld -T %t/lts %t.o -o %t_be
 # RUN: llvm-objdump --no-show-raw-insn -d %t_be | FileCheck %s
 # RUN: llvm-readelf -s %t_be | FileCheck %s --check-prefix=SYM
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le %t/asm -o %t.o
 # RUN: ld.lld -T %t/lts %t.o -o %t_le --no-power10-stubs
-# RUN: llvm-objdump --no-show-raw-insn -d %t_le | FileCheck %s --check-prefix=NoP10
+# RUN: llvm-objdump --no-show-raw-insn -d %t_le | FileCheck %s
 # RUN: llvm-readelf -s %t_le | FileCheck %s --check-prefix=SYM
 
 # SYM:      Symbol table '.symtab' contains 9 entries:
 # SYM:      1: 0000000010010000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   1 callee
 # SYM-NEXT: 2: 0000000010020008     0 NOTYPE  LOCAL  DEFAULT                  2 caller_close
 # SYM-NEXT: 3: 0000000020020008     0 NOTYPE  LOCAL  DEFAULT [<other: 0x60>]   3 caller
 # SYM-NEXT: 4: 0000000520020008     0 NOTYPE  LOCAL  DEFAULT                  4 caller_far
 # SYM-NEXT: 5: 0000000520028040     0 NOTYPE  LOCAL  HIDDEN                   6 .TOC.
.Lfunc_lep1:
   blr
 
 # CHECK-LABEL: <caller>:
 # CHECK:         bl 0x20020020
 # CHECK-NEXT:    ld 2, 24(1)
 # CHECK-NEXT:    blr
 # CHECK-LABEL: <__toc_save_callee>:
 # CHECK:         std 2, 24(1)
-# CHECK-NEXT:    paddi 12, 0, -268501028, 1
+# CHECK-NEXT:    addis 12, 2, -4098
+# CHECK-NEXT:    addi 12, 12, 32704
 # CHECK-NEXT:    mtctr 12
 # CHECK-NEXT:    bctr
 
-# NoP10-LABEL: <caller>:
-# NoP10:         bl 0x20020020
-# NoP10-NEXT:    ld 2, 24(1)
-# NoP10-NEXT:    blr
-# NoP10-LABEL: <__toc_save_callee>:
-# NoP10-NEXT:         std 2, 24(1)
-# NoP10-NEXT:    addis 12, 2, -4098
-# NoP10-NEXT:    addi 12, 12, 32704
-# NoP10-NEXT:    mtctr 12
-# NoP10-NEXT:    bctr
 .section .text_caller, "ax", %progbits
 .Lfunc_toc2:
   .quad .TOC.-.Lfunc_gep2
 caller:
 .Lfunc_gep2:
   ld 2, .Lfunc_toc2-.Lfunc_gep2(12)
   add 2, 2, 12
 .Lfunc_lep2: