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[X86][Disassembler] Fix displacement operand size for symbolizer
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Authored by maksfb on May 31 2022, 3:17 PM.

Details

Summary

On 64-bit X86, 0x66 operand-size override prefix will change the size of
the instruction operand, e.g. from 32 bits to 16 bits, but it will not
modify the size of the displacement operand used for memory addressing,
which will always be 32 bits.

Diff Detail

Event Timeline

maksfb created this revision.May 31 2022, 3:17 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 31 2022, 3:17 PM
maksfb requested review of this revision.May 31 2022, 3:17 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 31 2022, 3:17 PM
maksfb added a comment.Jun 7 2022, 3:16 PM

Friendly ping.

rafauler accepted this revision.Jun 7 2022, 4:40 PM

LGTM

This revision is now accepted and ready to land.Jun 7 2022, 4:40 PM
skan added inline comments.Jun 8 2022, 3:33 AM
llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
505

Mov this statement to the scope of else if (insn->mode == MODE_64BIT) {?

llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
149

Could we use another register such as rbx as base register in this test? rip always use 32-bit displacement.

maksfb updated this revision to Diff 435748.Jun 9 2022, 5:49 PM

Address comments.

maksfb marked 2 inline comments as done.Jun 9 2022, 5:50 PM
maksfb updated this revision to Diff 435750.Jun 9 2022, 6:01 PM

Adjust the operand value in the test case. The value should not be rip-adjusted.

skan accepted this revision.Jun 12 2022, 8:53 PM

LGTM

This revision was landed with ongoing or failed builds.Jun 13 2022, 12:15 AM
This revision was automatically updated to reflect the committed changes.