[WebAssembly] Update supported features in the generic CPU configuration

[sunfish]

Summary

Accompanying https://reviews.llvm.org/D125728, this updates LLVM Codegen's "generic" CPU to enable the same new features.

[asb]

Thanks, I think CodeGen/WebAssembly/target-features.ll could be updated to add a -mcpu=generic test?

[sunfish]

Update tests to use -mcpu=mvp to avoid breaking their target features when -mcpu=generic changes. And update target-features.ll to for the new -mcpu=generic features.

[asb]

LGTM, but it would be good to get an approval from someone else too.

llvm/test/CodeGen/WebAssembly/target-features.ll

57–58

This comment is now out of date.

[sbc100]

On the emscripten side we still need to come up with a framework that will disable these new defaults when users select older browser support. I'm not sure if we want to push back on landing this until such as frameworks is in place, or just go ahead and land this and deal with the change when it rolls in. @tlively @dschuff @kripken ?

[kripken]

llvm/lib/Target/WebAssembly/WebAssembly.td

99

It might be worth explaining what "latest stable" means here: how were the features here chosen, how often this is updated, etc.

Maybe we could have a page in the tool-conventions repo with a doc for all that? Ideally the plan there would cover all major wasm toolchains. Then we could all link to there. I think that would really help users in our ecosystem understand how this stuff works.

[sunfish]

• Add a comment about what "generic" means.

llvm/lib/Target/WebAssembly/WebAssembly.td

99

I've now updated this to say:

This includes features that achieved phase 4 of the standards process, and
that are supported in enough tools and engines that they're expected to work
for most users in most settings.

That is somewhat vague, but I believe represents our actual intent here. I'll post to https://github.com/WebAssembly/tool-conventions/issues/158 about this for broader discussion.

[kripken]

llvm/lib/Target/WebAssembly/WebAssembly.td

99

Sounds good, thanks.

[sunfish]

• Remove bulk-memory and nontrapping-fptoint.

[thakis]

This might have broken check-lld: http://45.33.8.238/linux/89856/step_11.txt

Please take a look and revert for now if it takes a while to fix.

[sunfish]

In D125729#3883414, @thakis wrote:

This might have broken check-lld: http://45.33.8.238/linux/89856/step_11.txt

Please take a look and revert for now if it takes a while to fix.

I'm looking into it now.

[sunfish]

In D125729#3883417, @sunfish wrote:

In D125729#3883414, @thakis wrote:

This might have broken check-lld: http://45.33.8.238/linux/89856/step_11.txt

Please take a look and revert for now if it takes a while to fix.

I'm looking into it now.

I've now submitted b5d0bf9b9853688d34290fafdd31c95aca58f624 which fixes these failures.

[thakis]

Thanks!

Looks like it breaks check-llvm too: http://45.33.8.238/linux/89859/step_12.txt

[dyung]

In D125729#3883552, @thakis wrote:

Thanks!

Looks like it breaks check-llvm too: http://45.33.8.238/linux/89859/step_12.txt

Yes, we are seeing these 10 failures on our internal bot as well the public bot https://lab.llvm.org/buildbot/#/builders/109/builds/49346

[dyung]

I tried to fix the remaining tests by adding -mcpu=mvp, but at least 2 of the 10 tests (debug-info.ll and debug-info64.ll) still failed and it wasn't obvious how to fix them, so I ended up reverting your original change and the follow-up commit to get the bots back to green since these tests are failing on a lot of bots.

llvm/lib/Target/WebAssembly/WebAssembly.td

 
 //===----------------------------------------------------------------------===//
 // WebAssembly Processors supported.
 //===----------------------------------------------------------------------===//
 
 // Minimal Viable Product.
 def : ProcessorModel<"mvp", NoSchedModel, []>;
 
 // Generic processor: latest stable version.
-def : ProcessorModel<"generic", NoSchedModel, []>;
+//
+// This includes features that have achieved phase 4 of the standards process,
+// and that are expected to work for most users in the current time, with
+// consideration given to available support in relevant engines and tools, and
+// the importance of the features.
+def : ProcessorModel<"generic", NoSchedModel,
+                      [FeatureSignExt, FeatureMutableGlobals]>;
 
 // Latest and greatest experimental version of WebAssembly. Bugs included!
 def : ProcessorModel<"bleeding-edge", NoSchedModel,
                       [FeatureSIMD128, FeatureAtomics,
                        FeatureNontrappingFPToInt, FeatureSignExt,
                        FeatureMutableGlobals, FeatureBulkMemory,
                        FeatureTailCall]>;
 

llvm/test/CodeGen/WebAssembly/PR41149.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=wasm32-unknown-unknown | FileCheck %s
 
 ; Regression test for PR41149.
 
 define void @mod() {
 ; CHECK-LABEL: mod:
 ; CHECK:         .functype mod () -> ()
 ; CHECK-NEXT:    .local i32
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.load8_u 0
 ; CHECK-NEXT:    local.tee 0
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    i32.const 24
-; CHECK-NEXT:    i32.shl
-; CHECK-NEXT:    i32.const 31
+; CHECK-NEXT:    i32.extend8_s
+; CHECK-NEXT:    i32.const 7
 ; CHECK-NEXT:    i32.shr_s
 ; CHECK-NEXT:    local.tee 0
 ; CHECK-NEXT:    i32.xor
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.sub
 ; CHECK-NEXT:    i32.store8 0
 ; CHECK-NEXT:    # fallthrough-return
   %tmp = load <4 x i8>, <4 x i8>* undef
   %tmp2 = icmp slt <4 x i8> %tmp, zeroinitializer
   %tmp3 = sub <4 x i8> zeroinitializer, %tmp
   %tmp4 = select <4 x i1> %tmp2, <4 x i8> %tmp3, <4 x i8> %tmp
   store <4 x i8> %tmp4, <4 x i8>* undef
   ret void
 }

llvm/test/CodeGen/WebAssembly/bulk-memory.ll

-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
 
 ; Test that basic bulk memory codegen works correctly
 
 target triple = "wasm32-unknown-unknown"
 
 declare void @llvm.memcpy.p0i8.p0i8.i8(i8*, i8*, i8, i1)
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
 declare void @llvm.memcpy.p0i32.p0i32.i32(i32*, i32*, i32, i1)

llvm/test/CodeGen/WebAssembly/bulk-memory64.ll

-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
 
 ; Test that basic bulk memory codegen works correctly
 
 target triple = "wasm64-unknown-unknown"
 
 declare void @llvm.memcpy.p0i8.p0i8.i8(i8*, i8*, i8, i1)
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)
 declare void @llvm.memcpy.p0i32.p0i32.i64(i32*, i32*, i64, i1)

llvm/test/CodeGen/WebAssembly/byval.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -fast-isel | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -mcpu=mvp | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -mcpu=mvp -fast-isel | FileCheck %s
 
 target triple = "wasm32-unknown-unknown"
 
 %SmallStruct = type { i32 }
 %OddStruct = type { i32, i8, i32 }
 %AlignedStruct = type { double, double }
 %BigStruct = type { double, double, double, double, double, double, double, double, double, double, double, i8, i8, i8 }
 %EmptyStruct = type { }

llvm/test/CodeGen/WebAssembly/conv-trap.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-nontrapping-fptoint | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-nontrapping-fptoint | FileCheck %s
 
 ; Test that basic conversion operations assemble as expected using
 ; the trapping opcodes and explicit code to suppress the trapping.
 
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: i32_trunc_s_f32:
 ; CHECK-NEXT: .functype i32_trunc_s_f32 (f32) -> (i32){{$}}

llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -fast-isel -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -disable-wasm-fallthrough-return-opt -wasm-keep-registers -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -wasm-keep-registers -fast-isel -verify-machineinstrs | FileCheck %s
 
 ; Test that FastISel does not generate instructions with NoReg
 
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: i32.const $push0=, 0
 define hidden i32 @a() #0 {
 entry:

llvm/test/CodeGen/WebAssembly/global.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-atomics | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-atomics | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+atomics | FileCheck %s
 
 ; Test that globals assemble as expected.
 
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-NOT: llvm.used
 ; CHECK-NOT: llvm.metadata
 @llvm.used = appending global [1 x i32*] [i32* @g], section "llvm.metadata"

llvm/test/CodeGen/WebAssembly/legalize.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test various types and operators that need to be legalized.
 
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: shl_i3:
 ; CHECK: i32.const   $push0=, 7{{$}}
 ; CHECK: i32.and     $push1=, $1, $pop0{{$}}

llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -tail-dup-placement=0 | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -tail-dup-placement=0 | FileCheck %s
 
 ; Test memcpy, memmove, and memset intrinsics.
 
 target triple = "wasm32-unknown-unknown"
 
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1)

llvm/test/CodeGen/WebAssembly/memory64-feature.ll

-; RUN: llc < %s | FileCheck %s
+; RUN: llc -mcpu=mvp < %s | FileCheck %s
 
 ; Test that wasm64 is properly emitted into the target features section
 
 target triple = "wasm64-unknown-unknown"
 
 define void @foo() {
   ret void
 }
 
 ; CHECK-LABEL: .custom_section.target_features
 ; CHECK-NEXT: .int8 1
 ; CHECK-NEXT: .int8 43
 ; CHECK-NEXT: .int8 8
 ; CHECK-NEXT: .ascii "memory64"

llvm/test/CodeGen/WebAssembly/multivalue.ll

-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+multivalue,+tail-call | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+reference-types,+multivalue,+tail-call | FileCheck --check-prefix REF %s
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+multivalue,+tail-call | FileCheck %s --check-prefix REGS
-; RUN: llc < %s --filetype=obj -mattr=+multivalue,+tail-call | obj2yaml | FileCheck %s --check-prefix OBJ
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mcpu=mvp -mattr=+multivalue,+tail-call | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mcpu=mvp -mattr=+reference-types,+multivalue,+tail-call | FileCheck --check-prefix REF %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+multivalue,+tail-call | FileCheck %s --check-prefix REGS
+; RUN: llc < %s --filetype=obj -mcpu=mvp -mattr=+multivalue,+tail-call | obj2yaml | FileCheck %s --check-prefix OBJ
 
 ; Test that the multivalue calls, returns, function types, and block
 ; types work as expected.
 
 target triple = "wasm32-unknown-unknown"
 
 %pair = type { i32, i64 }
 %rpair = type { i64, i32 }

llvm/test/CodeGen/WebAssembly/mutable-globals.ll

-; RUN: llc < %s -mattr=+mutable-globals | FileCheck %s
+; RUN: llc < %s -mcpu=mvp -mattr=+mutable-globals | FileCheck %s
 
 ; Test that mutable globals is properly emitted into the target features section
 
 target triple = "wasm32-unknown-unknown"
 
 define void @foo() {
   ret void
 }
 
 ; CHECK-LABEL: .custom_section.target_features
 ; CHECK-NEXT: .int8 1
 ; CHECK-NEXT: .int8 43
 ; CHECK-NEXT: .int8 15
 ; CHECK-NEXT: .ascii "mutable-globals"

llvm/test/CodeGen/WebAssembly/reference-types.ll

-; RUN: llc < %s -mattr=+reference-types | FileCheck %s
+; RUN: llc < %s -mcpu=mvp -mattr=+reference-types | FileCheck %s
 
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: reference-types
 define void @reference-types() {
   ret void
 }
 
 ; CHECK:      .int8 1
 ; CHECK-NEXT: .int8 43
 ; CHECK-NEXT: .int8 15
 ; CHECK-NEXT: .ascii "reference-types"

llvm/test/CodeGen/WebAssembly/signext-zeroext.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s -mcpu=mvp -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test zeroext and signext ABI keywords
 
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: z2s_func:
 ; CHECK-NEXT: .functype z2s_func (i32) -> (i32){{$}}
 ; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 24{{$}}

llvm/test/CodeGen/WebAssembly/simd-conversions.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mcpu=mvp -mattr=+simd128 | FileCheck %s
 
 ; Test that vector float-to-int and int-to-float instructions lower correctly
 
 target triple = "wasm32-unknown-unknown"
 
 define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
 ; CHECK-LABEL: convert_s_v4f32:
 ; CHECK:         .functype convert_s_v4f32 (v128) -> (v128)

llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll

-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mcpu=mvp -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test that vector sign extensions lower to shifts
 
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sext_v16i8:
 ; NO-SIMD128-NOT: i8x16

llvm/test/CodeGen/WebAssembly/tailcall.ll

-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+tail-call | FileCheck --check-prefixes=CHECK,SLOW %s
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -mattr=+tail-call | FileCheck --check-prefixes=CHECK,FAST %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+tail-call | FileCheck --check-prefixes=CHECK,SLOW %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -mcpu=mvp -mattr=+tail-call | FileCheck --check-prefixes=CHECK,FAST %s
 ; RUN: llc < %s --filetype=obj -mattr=+tail-call | obj2yaml | FileCheck --check-prefix=YAML %s
 
 ; Test that the tail calls lower correctly
 
 target triple = "wasm32-unknown-unknown"
 
 %fn = type <{i32 (%fn, i32, i32)*}>
 declare i1 @foo(i1)

llvm/test/CodeGen/WebAssembly/target-features-tls.ll

-; RUN: llc < %s -mattr=-bulk-memory,atomics | FileCheck %s --check-prefixes NO-BULK-MEM
-; RUN: llc < %s -mattr=+bulk-memory,atomics | FileCheck %s --check-prefixes BULK-MEM
+; RUN: llc < %s -mcpu=mvp -mattr=-bulk-memory,atomics | FileCheck %s --check-prefixes NO-BULK-MEM
+; RUN: llc < %s -mcpu=mvp -mattr=+bulk-memory,atomics | FileCheck %s --check-prefixes BULK-MEM
 
 ; Test that the target features section contains -atomics or +atomics
 ; for modules that have thread local storage in their source.
 
 target triple = "wasm32-unknown-unknown"
 
 @foo = internal thread_local global i32 0
 

llvm/test/CodeGen/WebAssembly/target-features.ll

 ; RUN: llc < %s | FileCheck %s --check-prefixes CHECK,ATTRS
-; RUN: llc < %s -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -mcpu=mvp -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -mcpu=bleeding-edge | FileCheck %s --check-prefixes CHECK,BLEEDING-EDGE
 
 ; Test that codegen emits target features from the command line or
 ; function attributes correctly and that features are enabled for the
 ; entire module if they are enabled for any function in the module.
 
 target triple = "wasm32-unknown-unknown"
 

 ; CHECK:       i32.atomic.rmw.cmpxchg
 ; ATTRS:       end_loop
 
 ; nontrapping fptoint
 ; CHECK:       i32.trunc_sat_f32_u
 ; ATTRS:       i32.store
 
 ; CHECK-LABEL: .custom_section.target_features,"",@
 
-; +atomics, +nontrapping-fptoint, +reference-types
-; ATTRS-NEXT: .int8 3
-; ATTRS-NEXT: .int8 43
-; ATTRS-NEXT: .int8 7
-; ATTRS-NEXT: .ascii "atomics"
-; ATTRS-NEXT: .int8 43
-; ATTRS-NEXT: .int8 19
-; ATTRS-NEXT: .ascii "nontrapping-fptoint"
-; ATTRS-NEXT: .int8 43
-; ATTRS-NEXT: .int8 15
-; ATTRS-NEXT: .ascii "reference-types"
+; +atomics, +reference-types, +mutable-globals
+; ATTRS-NEXT: .int8 5
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 7
+; ATTRS-NEXT: .ascii  "atomics"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 15
+; ATTRS-NEXT: .ascii  "mutable-globals"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 19
+; ATTRS-NEXT: .ascii  "nontrapping-fptoint"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 15
+; ATTRS-NEXT: .ascii  "reference-types"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 8
 
 ; +atomics, +nontrapping-fptoint, +reference-types, +simd128
 ; SIMD128-NEXT: .int8 4
 ; SIMD128-NEXT: .int8 43
 ; SIMD128-NEXT: .int8 7
 ; SIMD128-NEXT: .ascii "atomics"
 ; SIMD128-NEXT: .int8 43
 ; SIMD128-NEXT: .int8 19

 ; BLEEDING-EDGE-NEXT: .int8   8
 ; BLEEDING-EDGE-NEXT: .ascii  "sign-ext"
 ; BLEEDING-EDGE-NEXT: .int8   43
 ; BLEEDING-EDGE-NEXT: .int8   7
 ; BLEEDING-EDGE-NEXT: .ascii  "simd128"
 ; BLEEDING-EDGE-NEXT: .int8   43
 ; BLEEDING-EDGE-NEXT: .int8   9
 ; BLEEDING-EDGE-NEXT: .ascii  "tail-call"
-
-; CHECK-NEXT: .text