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Differential D125477

[AArch64] Teach perfect shuffles tables about D-lane movs
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Authored by dmgreen on May 12 2022, 10:28 AM.

Details

Reviewers
SjoerdMeijer
jaykang10
labrinea
samtebbs
Commits
rG4c6a070a2ce1: [AArch64] Teach perfect shuffles tables about D-lane movs
Summary

Similar to D123386, this adds D-Movs to the AArch64 perfect shuffle tables, slightly lowering the costs a little more. This is a rough improvement in general, especially if you ignore mov v0.16b, v2.16b type moves that are often artefacts of the calling convention.

The D register movs are encoded as (0x4 | LaneIdx), and to generate a D register move we are required to bitcast into a higher type, but it is otherwise very similar to the S-lane mov's already supported.

Diff Detail

Event Timeline

dmgreen created this revision.May 12 2022, 10:28 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 12 2022, 10:28 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald Transcript
dmgreen requested review of this revision.May 12 2022, 10:28 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 12 2022, 10:28 AM
Harbormaster completed remote builds in B164139: Diff 428988.May 12 2022, 10:30 AM
SjoerdMeijer accepted this revision.May 13 2022, 12:49 AM

Not that easy to spot that this is an improvement from these test changes, but I think I see a few, and the idea makes sense, so LGTM.

This revision is now accepted and ready to land.May 13 2022, 12:49 AM
This revision was landed with ongoing or failed builds.May 17 2022, 10:16 AM
Closed by commit rG4c6a070a2ce1: [AArch64] Teach perfect shuffles tables about D-lane movs (authored by dmgreen). · Explain Why
This revision was automatically updated to reflect the committed changes.
dmgreen added a commit: rG4c6a070a2ce1: [AArch64] Teach perfect shuffles tables about D-lane movs.
Herald added a project: Restricted Project. · View Herald TranscriptMay 17 2022, 10:16 AM
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Revision Contents

PathSize
clang/
test/
CodeGen/
72 lines
llvm/
lib/
Target/
AArch64/
39 lines
422 lines
test/
Analysis/
CostModel/
AArch64/
10 lines
CodeGen/
AArch64/
22 lines
329 lines
7 lines
51 lines
Transforms/
VectorCombine/
AArch64/
4 lines
utils/
PerfectShuffle/
18 lines

Diff 430110

clang/test/CodeGen/aarch64-neon-vcmla.c

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// CHECK-LABEL: @test_vcmlaq_rot270_f64( // CHECK-LABEL: @test_vcmlaq_rot270_f64(
// CHECK: [[RES:%.*]] = call <2 x double> @llvm.aarch64.neon.vcmla.rot270.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) // CHECK: [[RES:%.*]] = call <2 x double> @llvm.aarch64.neon.vcmla.rot270.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs)
// CHECK: ret <2 x double> [[RES]] // CHECK: ret <2 x double> [[RES]]
float64x2_t test_vcmlaq_rot270_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) { float64x2_t test_vcmlaq_rot270_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) {
return vcmlaq_rot270_f64(acc, lhs, rhs); return vcmlaq_rot270_f64(acc, lhs, rhs);
} }
// CHECK-LABEL: @test_vcmla_lane_f16( // CHECK-LABEL: @test_vcmla_lane_f16(
// CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half>
// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]])
// CHECK: ret <4 x half> [[RES]] // CHECK: ret <4 x half> [[RES]]
float16x4_t test_vcmla_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { float16x4_t test_vcmla_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) {
return vcmla_lane_f16(acc, lhs, rhs, 1); return vcmla_lane_f16(acc, lhs, rhs, 1);
} }
// ACLE says this exists, but it won't map to a single instruction if lane > 1. // ACLE says this exists, but it won't map to a single instruction if lane > 1.
// CHECK-LABEL: @test_vcmla_laneq_f16( // CHECK-LABEL: @test_vcmla_laneq_f16(
// CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32>
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// CHECK: ret <2 x float> [[RES]] // CHECK: ret <2 x float> [[RES]]
float32x2_t test_vcmla_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { float32x2_t test_vcmla_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) {
return vcmla_laneq_f32(acc, lhs, rhs, 1); return vcmla_laneq_f32(acc, lhs, rhs, 1);
} }
// CHECK-LABEL: @test_vcmlaq_lane_f32( // CHECK-LABEL: @test_vcmlaq_lane_f32(
// CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64
// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[CPLX_VEC]] to <4 x float>
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { float32x4_t test_vcmlaq_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) {
return vcmlaq_lane_f32(acc, lhs, rhs, 0); return vcmlaq_lane_f32(acc, lhs, rhs, 0);
} }
// CHECK-LABEL: @test_vcmlaq_laneq_f32( // CHECK-LABEL: @test_vcmlaq_laneq_f32(
// CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { float32x4_t test_vcmlaq_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) {
return vcmlaq_laneq_f32(acc, lhs, rhs, 1); return vcmlaq_laneq_f32(acc, lhs, rhs, 1);
} }
// CHECK-LABEL: @test_vcmla_rot90_lane_f16( // CHECK-LABEL: @test_vcmla_rot90_lane_f16(
// CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half>
// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]])
// CHECK: ret <4 x half> [[RES]] // CHECK: ret <4 x half> [[RES]]
float16x4_t test_vcmla_rot90_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { float16x4_t test_vcmla_rot90_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) {
return vcmla_rot90_lane_f16(acc, lhs, rhs, 1); return vcmla_rot90_lane_f16(acc, lhs, rhs, 1);
} }
// ACLE says this exists, but it won't map to a single instruction if lane > 1. // ACLE says this exists, but it won't map to a single instruction if lane > 1.
// CHECK-LABEL: @test_vcmla_rot90_laneq_f16( // CHECK-LABEL: @test_vcmla_rot90_laneq_f16(
// CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32>
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// CHECK: ret <2 x float> [[RES]] // CHECK: ret <2 x float> [[RES]]
float32x2_t test_vcmla_rot90_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { float32x2_t test_vcmla_rot90_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) {
return vcmla_rot90_laneq_f32(acc, lhs, rhs, 1); return vcmla_rot90_laneq_f32(acc, lhs, rhs, 1);
} }
// CHECK-LABEL: @test_vcmlaq_rot90_lane_f32( // CHECK-LABEL: @test_vcmlaq_rot90_lane_f32(
// CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64
// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[CPLX_VEC]] to <4 x float>
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_rot90_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { float32x4_t test_vcmlaq_rot90_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) {
return vcmlaq_rot90_lane_f32(acc, lhs, rhs, 0); return vcmlaq_rot90_lane_f32(acc, lhs, rhs, 0);
} }
// CHECK-LABEL: @test_vcmlaq_rot90_laneq_f32( // CHECK-LABEL: @test_vcmlaq_rot90_laneq_f32(
// CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_rot90_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { float32x4_t test_vcmlaq_rot90_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) {
return vcmlaq_rot90_laneq_f32(acc, lhs, rhs, 1); return vcmlaq_rot90_laneq_f32(acc, lhs, rhs, 1);
} }
// CHECK-LABEL: @test_vcmla_rot180_lane_f16( // CHECK-LABEL: @test_vcmla_rot180_lane_f16(
// CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half>
// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]])
// CHECK: ret <4 x half> [[RES]] // CHECK: ret <4 x half> [[RES]]
float16x4_t test_vcmla_rot180_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { float16x4_t test_vcmla_rot180_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) {
return vcmla_rot180_lane_f16(acc, lhs, rhs, 1); return vcmla_rot180_lane_f16(acc, lhs, rhs, 1);
} }
// ACLE says this exists, but it won't map to a single instruction if lane > 1. // ACLE says this exists, but it won't map to a single instruction if lane > 1.
// CHECK-LABEL: @test_vcmla_rot180_laneq_f16( // CHECK-LABEL: @test_vcmla_rot180_laneq_f16(
// CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32>
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// CHECK: ret <2 x float> [[RES]] // CHECK: ret <2 x float> [[RES]]
float32x2_t test_vcmla_rot180_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { float32x2_t test_vcmla_rot180_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) {
return vcmla_rot180_laneq_f32(acc, lhs, rhs, 1); return vcmla_rot180_laneq_f32(acc, lhs, rhs, 1);
} }
// CHECK-LABEL: @test_vcmlaq_rot180_lane_f32( // CHECK-LABEL: @test_vcmlaq_rot180_lane_f32(
// CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64
// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[CPLX_VEC]] to <4 x float>
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_rot180_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { float32x4_t test_vcmlaq_rot180_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) {
return vcmlaq_rot180_lane_f32(acc, lhs, rhs, 0); return vcmlaq_rot180_lane_f32(acc, lhs, rhs, 0);
} }
// CHECK-LABEL: @test_vcmlaq_rot180_laneq_f32( // CHECK-LABEL: @test_vcmlaq_rot180_laneq_f32(
// CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_rot180_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { float32x4_t test_vcmlaq_rot180_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) {
return vcmlaq_rot180_laneq_f32(acc, lhs, rhs, 1); return vcmlaq_rot180_laneq_f32(acc, lhs, rhs, 1);
} }
// CHECK-LABEL: @test_vcmla_rot270_lane_f16( // CHECK-LABEL: @test_vcmla_rot270_lane_f16(
// CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half>
// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]])
// CHECK: ret <4 x half> [[RES]] // CHECK: ret <4 x half> [[RES]]
float16x4_t test_vcmla_rot270_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { float16x4_t test_vcmla_rot270_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) {
return vcmla_rot270_lane_f16(acc, lhs, rhs, 1); return vcmla_rot270_lane_f16(acc, lhs, rhs, 1);
} }
// ACLE says this exists, but it won't map to a single instruction if lane > 1. // ACLE says this exists, but it won't map to a single instruction if lane > 1.
// CHECK-LABEL: @test_vcmla_rot270_laneq_f16( // CHECK-LABEL: @test_vcmla_rot270_laneq_f16(
// CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32>
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// CHECK: ret <2 x float> [[RES]] // CHECK: ret <2 x float> [[RES]]
float32x2_t test_vcmla_rot270_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { float32x2_t test_vcmla_rot270_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) {
return vcmla_rot270_laneq_f32(acc, lhs, rhs, 1); return vcmla_rot270_laneq_f32(acc, lhs, rhs, 1);
} }
// CHECK-LABEL: @test_vcmlaq_rot270_lane_f32( // CHECK-LABEL: @test_vcmlaq_rot270_lane_f32(
// CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64
// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float>
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_rot270_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { float32x4_t test_vcmlaq_rot270_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) {
return vcmlaq_rot270_lane_f32(acc, lhs, rhs, 0); return vcmlaq_rot270_lane_f32(acc, lhs, rhs, 0);
} }
// CHECK-LABEL: @test_vcmlaq_rot270_laneq_f32( // CHECK-LABEL: @test_vcmlaq_rot270_laneq_f32(
// CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
// CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <2 x i32> <i32 1, i32 1> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]])
// CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float>
// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]])
// CHECK: ret <4 x float> [[RES]] // CHECK: ret <4 x float> [[RES]]
float32x4_t test_vcmlaq_rot270_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { float32x4_t test_vcmlaq_rot270_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) {
return vcmlaq_rot270_laneq_f32(acc, lhs, rhs, 1); return vcmlaq_rot270_laneq_f32(acc, lhs, rhs, 1);
} }

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 9,806 Lines • ▼ Show 20 Lines if (OpNum == OP_MOVLANE) {
// For OP_MOVLANE shuffles, the RHSID represents the lane to move into. We // For OP_MOVLANE shuffles, the RHSID represents the lane to move into. We
// get the lane to move from from the PFID, which is always from the // get the lane to move from from the PFID, which is always from the
// original vectors (V1 or V2). // original vectors (V1 or V2).
SDValue OpLHS = GeneratePerfectShuffle( SDValue OpLHS = GeneratePerfectShuffle(
LHSID, V1, V2, PerfectShuffleTable[LHSID], LHS, RHS, DAG, dl); LHSID, V1, V2, PerfectShuffleTable[LHSID], LHS, RHS, DAG, dl);
EVT VT = OpLHS.getValueType(); EVT VT = OpLHS.getValueType();
assert(RHSID < 8 && "Expected a lane index for RHSID!"); assert(RHSID < 8 && "Expected a lane index for RHSID!");
unsigned ExtLane = 0;
SDValue Input;
// OP_MOVLANE are either D movs (if bit 0x4 is set) or S movs. D movs
// convert into a higher type.
if (RHSID & 0x4) {
int MaskElt = getPFIDLane(ID, (RHSID & 0x01) << 1) >> 1;
if (MaskElt == -1)
MaskElt = (getPFIDLane(ID, ((RHSID & 0x01) << 1) + 1) - 1) >> 1;
assert(MaskElt >= 0 && "Didn't expect an undef movlane index!");
ExtLane = MaskElt < 2 ? MaskElt : (MaskElt - 2);
Input = MaskElt < 2 ? V1 : V2;
if (VT.getScalarSizeInBits() == 16) {
Input = DAG.getBitcast(MVT::v2f32, Input);
OpLHS = DAG.getBitcast(MVT::v2f32, OpLHS);
} else {
assert(VT.getScalarSizeInBits() == 32 &&
"Expected 16 or 32 bit shuffle elemements");
Input = DAG.getBitcast(MVT::v2f64, Input);
OpLHS = DAG.getBitcast(MVT::v2f64, OpLHS);
}
} else {
int MaskElt = getPFIDLane(ID, RHSID); int MaskElt = getPFIDLane(ID, RHSID);
assert(MaskElt >= 0 && "Didn't expect an undef movlane index!"); assert(MaskElt >= 0 && "Didn't expect an undef movlane index!");
unsigned ExtLane = MaskElt < 4 ? MaskElt : (MaskElt - 4); ExtLane = MaskElt < 4 ? MaskElt : (MaskElt - 4);
SDValue Input = MaskElt < 4 ? V1 : V2; Input = MaskElt < 4 ? V1 : V2;
// Be careful about creating illegal types. Use f16 instead of i16. // Be careful about creating illegal types. Use f16 instead of i16.
if (VT == MVT::v4i16) { if (VT == MVT::v4i16) {
Input = DAG.getBitcast(MVT::v4f16, Input); Input = DAG.getBitcast(MVT::v4f16, Input);
OpLHS = DAG.getBitcast(MVT::v4f16, OpLHS); OpLHS = DAG.getBitcast(MVT::v4f16, OpLHS);
} }
}
SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
Input.getValueType().getVectorElementType(), Input.getValueType().getVectorElementType(),
Input, DAG.getVectorIdxConstant(ExtLane, dl)); Input, DAG.getVectorIdxConstant(ExtLane, dl));
SDValue Ins = SDValue Ins =
DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Input.getValueType(), OpLHS, DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Input.getValueType(), OpLHS,
Ext, DAG.getVectorIdxConstant(RHSID & 0x3, dl)); Ext, DAG.getVectorIdxConstant(RHSID & 0x3, dl));
return DAG.getBitcast(VT, Ins); return DAG.getBitcast(VT, Ins);
} }
▲ Show 20 Lines • Show All 11,300 Lines • Show Last 20 Lines

llvm/lib/Target/AArch64/AArch64PerfectShuffle.h

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show All 11 Lines
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64PERFECTSHUFFLE_H #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64PERFECTSHUFFLE_H
#define LLVM_LIB_TARGET_AARCH64_AARCH64PERFECTSHUFFLE_H #define LLVM_LIB_TARGET_AARCH64_AARCH64PERFECTSHUFFLE_H
#include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/ArrayRef.h"
// 31 entries have cost 0 // 31 entries have cost 0
// 730 entries have cost 1 // 756 entries have cost 1
// 3658 entries have cost 2 // 3690 entries have cost 2
// 2142 entries have cost 3 // 2084 entries have cost 3
// This table is 6561*4 = 26244 bytes in size. // This table is 6561*4 = 26244 bytes in size.
static const unsigned PerfectShuffleTable[6561 + 1] = { static const unsigned PerfectShuffleTable[6561 + 1] = {
135053414U, // <0,0,0,0>: Cost 1 vdup0 LHS 135053414U, // <0,0,0,0>: Cost 1 vdup0 LHS
2080972802U, // <0,0,0,1>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,0,0,1>: Cost 2 ins <0,0,u,1>, lane 2
1679065190U, // <0,0,0,2>: Cost 2 vuzpl <0,2,0,2>, LHS 1679065190U, // <0,0,0,2>: Cost 2 vuzpl <0,2,0,2>, LHS
2085707777U, // <0,0,0,3>: Cost 2 ins <0,u,0,3>, lane 1 2085707777U, // <0,0,0,3>: Cost 2 ins <0,u,0,3>, lane 1
1476398390U, // <0,0,0,4>: Cost 2 vext1 <0,0,0,0>, RHS 1476398390U, // <0,0,0,4>: Cost 2 vext1 <0,0,0,0>, RHS
Show All 28 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
3154755586U, // <0,0,3,6>: Cost 3 ins <0,0,u,6>, lane 2 3154755586U, // <0,0,3,6>: Cost 3 ins <0,0,u,6>, lane 2
2818573312U, // <0,0,3,7>: Cost 3 vuzpr <0,0,0,0>, <1,3,5,7> 2818573312U, // <0,0,3,7>: Cost 3 vuzpr <0,0,0,0>, <1,3,5,7>
2080972802U, // <0,0,3,u>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,0,3,u>: Cost 2 ins <0,0,u,1>, lane 2
2080964610U, // <0,0,4,0>: Cost 2 ins <0,0,u,0>, lane 2 2080964610U, // <0,0,4,0>: Cost 2 ins <0,0,u,0>, lane 2
1814708326U, // <0,0,4,1>: Cost 2 vzipl <0,4,1,5>, LHS 1814708326U, // <0,0,4,1>: Cost 2 vzipl <0,4,1,5>, LHS
1947828326U, // <0,0,4,2>: Cost 2 vtrnl <0,2,4,6>, LHS 1947828326U, // <0,0,4,2>: Cost 2 vtrnl <0,2,4,6>, LHS
2086002689U, // <0,0,4,3>: Cost 2 ins <0,u,4,3>, lane 1 2086002689U, // <0,0,4,3>: Cost 2 ins <0,u,4,3>, lane 1
1947828428U, // <0,0,4,4>: Cost 2 vtrnl <0,2,4,6>, <0,2,4,6> 1947828428U, // <0,0,4,4>: Cost 2 vtrnl <0,2,4,6>, <0,2,4,6>
1543507254U, // <0,0,4,5>: Cost 2 vext2 <0,0,0,0>, RHS 2081030149U, // <0,0,4,5>: Cost 2 ins <0,0,u,u>, lane 5
1679068470U, // <0,0,4,6>: Cost 2 vuzpl <0,2,0,2>, RHS 1679068470U, // <0,0,4,6>: Cost 2 vuzpl <0,2,0,2>, RHS
3154477059U, // <0,0,4,7>: Cost 3 ins <0,0,4,u>, lane 3 3154477059U, // <0,0,4,7>: Cost 3 ins <0,0,4,u>, lane 3
1679068488U, // <0,0,4,u>: Cost 2 vuzpl <0,2,0,2>, RHS 1679068488U, // <0,0,4,u>: Cost 2 vuzpl <0,2,0,2>, RHS
2080964610U, // <0,0,5,0>: Cost 2 ins <0,0,u,0>, lane 2 2080964610U, // <0,0,5,0>: Cost 2 ins <0,0,u,0>, lane 2
2128527360U, // <0,0,5,1>: Cost 2 ins <u,0,5,1>, lane 0 2128527360U, // <0,0,5,1>: Cost 2 ins <u,0,5,1>, lane 0
2080980994U, // <0,0,5,2>: Cost 2 ins <0,0,u,2>, lane 2 2080980994U, // <0,0,5,2>: Cost 2 ins <0,0,u,2>, lane 2
2086076417U, // <0,0,5,3>: Cost 2 ins <0,u,5,3>, lane 1 2086076417U, // <0,0,5,3>: Cost 2 ins <0,u,5,3>, lane 1
3202293760U, // <0,0,5,4>: Cost 3 ins <u,0,5,4>, lane 0 3202293760U, // <0,0,5,4>: Cost 3 ins <u,0,5,4>, lane 0
1947213953U, // <0,0,5,5>: Cost 2 vtrnl <0,1,5,3>, <0,1,5,3> 1947213953U, // <0,0,5,5>: Cost 2 vtrnl <0,1,5,3>, <0,1,5,3>
2718712274U, // <0,0,5,6>: Cost 3 vext3 <5,6,7,0>, <0,5,6,7> 2718712274U, // <0,0,5,6>: Cost 3 vext3 <5,6,7,0>, <0,5,6,7>
1744833846U, // <0,0,5,7>: Cost 2 vuzpr <0,0,0,0>, RHS 1744833846U, // <0,0,5,7>: Cost 2 vuzpr <0,0,0,0>, RHS
2128527360U, // <0,0,5,u>: Cost 2 ins <u,0,5,1>, lane 0 2128527360U, // <0,0,5,u>: Cost 2 ins <u,0,5,1>, lane 0
2080964610U, // <0,0,6,0>: Cost 2 ins <0,0,u,0>, lane 2 2080964610U, // <0,0,6,0>: Cost 2 ins <0,0,u,0>, lane 2
2080972802U, // <0,0,6,1>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,0,6,1>: Cost 2 ins <0,0,u,1>, lane 2
2128609280U, // <0,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <0,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0
2086150145U, // <0,0,6,3>: Cost 2 ins <0,u,6,3>, lane 1 2086150145U, // <0,0,6,3>: Cost 2 ins <0,u,6,3>, lane 1
3202367488U, // <0,0,6,4>: Cost 3 ins <u,0,6,4>, lane 0 3202367488U, // <0,0,6,4>: Cost 3 ins <u,0,6,4>, lane 0
2617250536U, // <0,0,6,5>: Cost 3 vext2 <0,0,0,0>, <6,5,6,7> 2617250536U, // <0,0,6,5>: Cost 3 vext2 <0,0,0,0>, <6,5,6,7>
1947287690U, // <0,0,6,6>: Cost 2 vtrnl <0,1,6,3>, <0,1,6,3> 1947287690U, // <0,0,6,6>: Cost 2 vtrnl <0,1,6,3>, <0,1,6,3>
2128650240U, // <0,0,6,7>: Cost 2 ins <u,0,6,7>, lane 0 2081030149U, // <0,0,6,7>: Cost 2 ins <0,0,u,u>, lane 5
2080972802U, // <0,0,6,u>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,0,6,u>: Cost 2 ins <0,0,u,1>, lane 2
2080964610U, // <0,0,7,0>: Cost 2 ins <0,0,u,0>, lane 2 2080964610U, // <0,0,7,0>: Cost 2 ins <0,0,u,0>, lane 2
2080972802U, // <0,0,7,1>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,0,7,1>: Cost 2 ins <0,0,u,1>, lane 2
2080980994U, // <0,0,7,2>: Cost 2 ins <0,0,u,2>, lane 2 2080980994U, // <0,0,7,2>: Cost 2 ins <0,0,u,2>, lane 2
2086223873U, // <0,0,7,3>: Cost 2 ins <0,u,7,3>, lane 1 2086223873U, // <0,0,7,3>: Cost 2 ins <0,u,7,3>, lane 1
3154739202U, // <0,0,7,4>: Cost 3 ins <0,0,u,4>, lane 2 3154739202U, // <0,0,7,4>: Cost 3 ins <0,0,u,4>, lane 2
2617251265U, // <0,0,7,5>: Cost 3 vext2 <0,0,0,0>, <7,5,6,7> 2617251265U, // <0,0,7,5>: Cost 3 vext2 <0,0,0,0>, <7,5,6,7>
3154755586U, // <0,0,7,6>: Cost 3 ins <0,0,u,6>, lane 2 3154755586U, // <0,0,7,6>: Cost 3 ins <0,0,u,6>, lane 2
1947361427U, // <0,0,7,7>: Cost 2 vtrnl <0,1,7,3>, <0,1,7,3> 1947361427U, // <0,0,7,7>: Cost 2 vtrnl <0,1,7,3>, <0,1,7,3>
2080972802U, // <0,0,7,u>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,0,7,u>: Cost 2 ins <0,0,u,1>, lane 2
135053414U, // <0,0,u,0>: Cost 1 vdup0 LHS 135053414U, // <0,0,u,0>: Cost 1 vdup0 LHS
743678054U, // <0,0,u,1>: Cost 1 vzipl LHS, LHS 743678054U, // <0,0,u,1>: Cost 1 vzipl LHS, LHS
873693286U, // <0,0,u,2>: Cost 1 vtrnl LHS, LHS 873693286U, // <0,0,u,2>: Cost 1 vtrnl LHS, LHS
1012113409U, // <0,0,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <0,0,u,3>: Cost 1 ins LHS, lane 1
1947435212U, // <0,0,u,4>: Cost 2 vtrnl LHS, <0,2,4,6> 1947435212U, // <0,0,u,4>: Cost 2 vtrnl LHS, <0,2,4,6>
2085797889U, // <0,0,u,5>: Cost 2 ins <0,u,1,5>, lane 1 2085797889U, // <0,0,u,5>: Cost 2 ins <0,u,1,5>, lane 1
1679071386U, // <0,0,u,6>: Cost 2 vuzpl <0,2,0,2>, RHS 1679071386U, // <0,0,u,6>: Cost 2 vuzpl <0,2,0,2>, RHS
2080514051U, // <0,0,u,7>: Cost 2 ins <0,0,1,u>, lane 3 2080514051U, // <0,0,u,7>: Cost 2 ins <0,0,1,u>, lane 3
873693340U, // <0,0,u,u>: Cost 1 vtrnl LHS, LHS 873693340U, // <0,0,u,u>: Cost 1 vtrnl LHS, LHS
2085683201U, // <0,1,0,0>: Cost 2 ins <0,u,0,0>, lane 1 2085683201U, // <0,1,0,0>: Cost 2 ins <0,u,0,0>, lane 1
1680490834U, // <0,1,0,1>: Cost 2 vuzpl <0,4,1,5>, <0,4,1,5> 1007951877U, // <0,1,0,1>: Cost 1 ins LHS, lane 5
1680490598U, // <0,1,0,2>: Cost 2 vuzpl <0,4,1,5>, LHS 1680490598U, // <0,1,0,2>: Cost 2 vuzpl <0,4,1,5>, LHS
1007910914U, // <0,1,0,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,0,3>: Cost 1 ins LHS, lane 2
2081660930U, // <0,1,0,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <0,1,0,4>: Cost 2 ins <0,1,u,4>, lane 2
2081669122U, // <0,1,0,5>: Cost 2 ins <0,1,u,5>, lane 2 2081669122U, // <0,1,0,5>: Cost 2 ins <0,1,u,5>, lane 2
2081677314U, // <0,1,0,6>: Cost 2 ins <0,1,u,6>, lane 2 2081677314U, // <0,1,0,6>: Cost 2 ins <0,1,u,6>, lane 2
2081685506U, // <0,1,0,7>: Cost 2 ins <0,1,u,7>, lane 2 2081685506U, // <0,1,0,7>: Cost 2 ins <0,1,u,7>, lane 2
1007910914U, // <0,1,0,u>: Cost 1 ins LHS, lane 2 1007951877U, // <0,1,0,u>: Cost 1 ins LHS, lane 5
1812775670U, // <0,1,1,0>: Cost 2 vzipl LHS, <1,0,3,2> 1812775670U, // <0,1,1,0>: Cost 2 vzipl LHS, <1,0,3,2>
1812775732U, // <0,1,1,1>: Cost 2 vzipl LHS, <1,1,1,1> 1812775732U, // <0,1,1,1>: Cost 2 vzipl LHS, <1,1,1,1>
1812775830U, // <0,1,1,2>: Cost 2 vzipl LHS, <1,2,3,0> 1812775830U, // <0,1,1,2>: Cost 2 vzipl LHS, <1,2,3,0>
1007910914U, // <0,1,1,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,1,3>: Cost 1 ins LHS, lane 2
1476480310U, // <0,1,1,4>: Cost 2 vext1 <0,0,1,1>, RHS 1476480310U, // <0,1,1,4>: Cost 2 vext1 <0,0,1,1>, RHS
1812817040U, // <0,1,1,5>: Cost 2 vzipl LHS, <1,5,3,7> 1812817040U, // <0,1,1,5>: Cost 2 vzipl LHS, <1,5,3,7>
2081677314U, // <0,1,1,6>: Cost 2 ins <0,1,u,6>, lane 2 2081677314U, // <0,1,1,6>: Cost 2 ins <0,1,u,6>, lane 2
2081685506U, // <0,1,1,7>: Cost 2 ins <0,1,u,7>, lane 2 2081685506U, // <0,1,1,7>: Cost 2 ins <0,1,u,7>, lane 2
1007910914U, // <0,1,1,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,1,u>: Cost 1 ins LHS, lane 2
1007509507U, // <0,1,2,0>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,2,0>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,2,1>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,2,1>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,2,2>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,2,2>: Cost 1 ins LHS, lane 3
835584U, // <0,1,2,3>: Cost 0 copy LHS 835584U, // <0,1,2,3>: Cost 0 copy LHS
1007509507U, // <0,1,2,4>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,2,4>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,2,5>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,2,5>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,2,6>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,2,6>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,2,7>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,2,7>: Cost 1 ins LHS, lane 3
835584U, // <0,1,2,u>: Cost 0 copy LHS 835584U, // <0,1,2,u>: Cost 0 copy LHS
2081628162U, // <0,1,3,0>: Cost 2 ins <0,1,u,0>, lane 2 2133680132U, // <0,1,3,0>: Cost 2 ins <u,u,3,0>, lane 4
2081636354U, // <0,1,3,1>: Cost 2 ins <0,1,u,1>, lane 2 2081636354U, // <0,1,3,1>: Cost 2 ins <0,1,u,1>, lane 2
2081644546U, // <0,1,3,2>: Cost 2 ins <0,1,u,2>, lane 2 2133696516U, // <0,1,3,2>: Cost 2 ins <u,u,3,2>, lane 4
1007910914U, // <0,1,3,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,3,3>: Cost 1 ins LHS, lane 2
2081660930U, // <0,1,3,4>: Cost 2 ins <0,1,u,4>, lane 2 2133712900U, // <0,1,3,4>: Cost 2 ins <u,u,3,4>, lane 4
2081669122U, // <0,1,3,5>: Cost 2 ins <0,1,u,5>, lane 2 2081669122U, // <0,1,3,5>: Cost 2 ins <0,1,u,5>, lane 2
2081677314U, // <0,1,3,6>: Cost 2 ins <0,1,u,6>, lane 2 2081677314U, // <0,1,3,6>: Cost 2 ins <0,1,u,6>, lane 2
2081685506U, // <0,1,3,7>: Cost 2 ins <0,1,u,7>, lane 2 2133737476U, // <0,1,3,7>: Cost 2 ins <u,u,3,7>, lane 4
1007910914U, // <0,1,3,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,3,u>: Cost 1 ins LHS, lane 2
2081628162U, // <0,1,4,0>: Cost 2 ins <0,1,u,0>, lane 2 2081628162U, // <0,1,4,0>: Cost 2 ins <0,1,u,0>, lane 2
2081636354U, // <0,1,4,1>: Cost 2 ins <0,1,u,1>, lane 2 2081636354U, // <0,1,4,1>: Cost 2 ins <0,1,u,1>, lane 2
2081644546U, // <0,1,4,2>: Cost 2 ins <0,1,u,2>, lane 2 2081644546U, // <0,1,4,2>: Cost 2 ins <0,1,u,2>, lane 2
1007910914U, // <0,1,4,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,4,3>: Cost 1 ins LHS, lane 2
2081660930U, // <0,1,4,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <0,1,4,4>: Cost 2 ins <0,1,u,4>, lane 2
1557450038U, // <0,1,4,5>: Cost 2 vext2 <2,3,0,1>, RHS 1007951877U, // <0,1,4,5>: Cost 1 ins LHS, lane 5
1680493878U, // <0,1,4,6>: Cost 2 vuzpl <0,4,1,5>, RHS 1680493878U, // <0,1,4,6>: Cost 2 vuzpl <0,4,1,5>, RHS
2081685506U, // <0,1,4,7>: Cost 2 ins <0,1,u,7>, lane 2 2081685506U, // <0,1,4,7>: Cost 2 ins <0,1,u,7>, lane 2
1007910914U, // <0,1,4,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,4,u>: Cost 1 ins LHS, lane 2
2081628162U, // <0,1,5,0>: Cost 2 ins <0,1,u,0>, lane 2 2081628162U, // <0,1,5,0>: Cost 2 ins <0,1,u,0>, lane 2
2081636354U, // <0,1,5,1>: Cost 2 ins <0,1,u,1>, lane 2 2133835780U, // <0,1,5,1>: Cost 2 ins <u,u,5,1>, lane 4
2081644546U, // <0,1,5,2>: Cost 2 ins <0,1,u,2>, lane 2 2081644546U, // <0,1,5,2>: Cost 2 ins <0,1,u,2>, lane 2
1007910914U, // <0,1,5,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,5,3>: Cost 1 ins LHS, lane 2
2081660930U, // <0,1,5,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <0,1,5,4>: Cost 2 ins <0,1,u,4>, lane 2
2081669122U, // <0,1,5,5>: Cost 2 ins <0,1,u,5>, lane 2 2133868548U, // <0,1,5,5>: Cost 2 ins <u,u,5,5>, lane 4
2081677314U, // <0,1,5,6>: Cost 2 ins <0,1,u,6>, lane 2 2133876740U, // <0,1,5,6>: Cost 2 ins <u,u,5,6>, lane 4
1744915766U, // <0,1,5,7>: Cost 2 vuzpr <0,0,1,1>, RHS 2133884932U, // <0,1,5,7>: Cost 2 ins <u,u,5,7>, lane 4
1007910914U, // <0,1,5,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,5,u>: Cost 1 ins LHS, lane 2
2081628162U, // <0,1,6,0>: Cost 2 ins <0,1,u,0>, lane 2 2081628162U, // <0,1,6,0>: Cost 2 ins <0,1,u,0>, lane 2
2081636354U, // <0,1,6,1>: Cost 2 ins <0,1,u,1>, lane 2 2081636354U, // <0,1,6,1>: Cost 2 ins <0,1,u,1>, lane 2
2081644546U, // <0,1,6,2>: Cost 2 ins <0,1,u,2>, lane 2 2133917700U, // <0,1,6,2>: Cost 2 ins <u,u,6,2>, lane 4
1007910914U, // <0,1,6,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,6,3>: Cost 1 ins LHS, lane 2
2081660930U, // <0,1,6,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <0,1,6,4>: Cost 2 ins <0,1,u,4>, lane 2
2081669122U, // <0,1,6,5>: Cost 2 ins <0,1,u,5>, lane 2 2081669122U, // <0,1,6,5>: Cost 2 ins <0,1,u,5>, lane 2
2081677314U, // <0,1,6,6>: Cost 2 ins <0,1,u,6>, lane 2 2133950468U, // <0,1,6,6>: Cost 2 ins <u,u,6,6>, lane 4
1583993678U, // <0,1,6,7>: Cost 2 vext2 <6,7,0,1>, <6,7,0,1> 1060216836U, // <0,1,6,7>: Cost 1 ins RHS, lane 4
1007910914U, // <0,1,6,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,6,u>: Cost 1 ins LHS, lane 2
2081628162U, // <0,1,7,0>: Cost 2 ins <0,1,u,0>, lane 2 2133975044U, // <0,1,7,0>: Cost 2 ins <u,u,7,0>, lane 4
2081636354U, // <0,1,7,1>: Cost 2 ins <0,1,u,1>, lane 2 2081636354U, // <0,1,7,1>: Cost 2 ins <0,1,u,1>, lane 2
2081644546U, // <0,1,7,2>: Cost 2 ins <0,1,u,2>, lane 2 2081644546U, // <0,1,7,2>: Cost 2 ins <0,1,u,2>, lane 2
1007910914U, // <0,1,7,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,7,3>: Cost 1 ins LHS, lane 2
2081660930U, // <0,1,7,4>: Cost 2 ins <0,1,u,4>, lane 2 2134007812U, // <0,1,7,4>: Cost 2 ins <u,u,7,4>, lane 4
2081669122U, // <0,1,7,5>: Cost 2 ins <0,1,u,5>, lane 2 2081669122U, // <0,1,7,5>: Cost 2 ins <0,1,u,5>, lane 2
2081677314U, // <0,1,7,6>: Cost 2 ins <0,1,u,6>, lane 2 2134024196U, // <0,1,7,6>: Cost 2 ins <u,u,7,6>, lane 4
2081685506U, // <0,1,7,7>: Cost 2 ins <0,1,u,7>, lane 2 2134032388U, // <0,1,7,7>: Cost 2 ins <u,u,7,7>, lane 4
1007910914U, // <0,1,7,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,1,7,u>: Cost 1 ins LHS, lane 2
1007509507U, // <0,1,u,0>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,u,0>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,u,1>: Cost 1 ins LHS, lane 3 1007951877U, // <0,1,u,1>: Cost 1 ins LHS, lane 5
1007509507U, // <0,1,u,2>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,u,2>: Cost 1 ins LHS, lane 3
835584U, // <0,1,u,3>: Cost 0 copy LHS 835584U, // <0,1,u,3>: Cost 0 copy LHS
1007509507U, // <0,1,u,4>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,u,4>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,u,5>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,u,5>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,u,6>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,u,6>: Cost 1 ins LHS, lane 3
1007509507U, // <0,1,u,7>: Cost 1 ins LHS, lane 3 1007509507U, // <0,1,u,7>: Cost 1 ins LHS, lane 3
835584U, // <0,1,u,u>: Cost 0 copy LHS 835584U, // <0,1,u,u>: Cost 0 copy LHS
1678557184U, // <0,2,0,0>: Cost 2 vuzpl LHS, <0,0,0,0> 1678557184U, // <0,2,0,0>: Cost 2 vuzpl LHS, <0,0,0,0>
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
1751043383U, // <0,2,5,u>: Cost 2 vuzpr <1,0,3,2>, RHS 1751043383U, // <0,2,5,u>: Cost 2 vuzpr <1,0,3,2>, RHS
1678562126U, // <0,2,6,0>: Cost 2 vuzpl LHS, <6,7,0,1> 1678562126U, // <0,2,6,0>: Cost 2 vuzpl LHS, <6,7,0,1>
2756948257U, // <0,2,6,1>: Cost 3 vuzpl LHS, <6,0,1,2> 2756948257U, // <0,2,6,1>: Cost 3 vuzpl LHS, <6,0,1,2>
2082308098U, // <0,2,6,2>: Cost 2 ins <0,2,u,2>, lane 2 2082308098U, // <0,2,6,2>: Cost 2 ins <0,2,u,2>, lane 2
2086150145U, // <0,2,6,3>: Cost 2 ins <0,u,6,3>, lane 1 2086150145U, // <0,2,6,3>: Cost 2 ins <0,u,6,3>, lane 1
1678562166U, // <0,2,6,4>: Cost 2 vuzpl LHS, <6,7,4,5> 1678562166U, // <0,2,6,4>: Cost 2 vuzpl LHS, <6,7,4,5>
2756948621U, // <0,2,6,5>: Cost 3 vuzpl LHS, <6,4,5,6> 2756948621U, // <0,2,6,5>: Cost 3 vuzpl LHS, <6,4,5,6>
2082340866U, // <0,2,6,6>: Cost 2 ins <0,2,u,6>, lane 2 2082340866U, // <0,2,6,6>: Cost 2 ins <0,2,u,6>, lane 2
1678561786U, // <0,2,6,7>: Cost 2 vuzpl LHS, <6,2,7,3> 2082357253U, // <0,2,6,7>: Cost 2 ins <0,2,u,u>, lane 5
2082308098U, // <0,2,6,u>: Cost 2 ins <0,2,u,2>, lane 2 2082308098U, // <0,2,6,u>: Cost 2 ins <0,2,u,2>, lane 2
3099378582U, // <0,2,7,0>: Cost 3 vtrnr <2,0,5,7>, <1,2,3,0> 3099378582U, // <0,2,7,0>: Cost 3 vtrnr <2,0,5,7>, <1,2,3,0>
1678562298U, // <0,2,7,1>: Cost 2 vuzpl LHS, <7,0,1,2> 1678562298U, // <0,2,7,1>: Cost 2 vuzpl LHS, <7,0,1,2>
2082308098U, // <0,2,7,2>: Cost 2 ins <0,2,u,2>, lane 2 2082308098U, // <0,2,7,2>: Cost 2 ins <0,2,u,2>, lane 2
2130018304U, // <0,2,7,3>: Cost 2 ins <u,2,7,3>, lane 0 2130018304U, // <0,2,7,3>: Cost 2 ins <u,2,7,3>, lane 0
2645136742U, // <0,2,7,4>: Cost 3 vext2 <4,6,0,2>, <7,4,5,6> 2645136742U, // <0,2,7,4>: Cost 3 vext2 <4,6,0,2>, <7,4,5,6>
1678562662U, // <0,2,7,5>: Cost 2 vuzpl LHS, <7,4,5,6> 1678562662U, // <0,2,7,5>: Cost 2 vuzpl LHS, <7,4,5,6>
2082340866U, // <0,2,7,6>: Cost 2 ins <0,2,u,6>, lane 2 2082340866U, // <0,2,7,6>: Cost 2 ins <0,2,u,6>, lane 2
▲ Show 20 Lines • Show All 85 Lines • ▼ Show 20 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
2085699585U, // <0,3,u,2>: Cost 2 ins <0,u,0,2>, lane 1 2085699585U, // <0,3,u,2>: Cost 2 ins <0,u,0,2>, lane 1
1012113409U, // <0,3,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <0,3,u,3>: Cost 1 ins LHS, lane 1
1817422338U, // <0,3,u,4>: Cost 2 vzipl LHS, <3,4,5,6> 1817422338U, // <0,3,u,4>: Cost 2 vzipl LHS, <3,4,5,6>
1947437570U, // <0,3,u,5>: Cost 2 vtrnl LHS, <3,4,5,6> 1947437570U, // <0,3,u,5>: Cost 2 vtrnl LHS, <3,4,5,6>
2085879809U, // <0,3,u,6>: Cost 2 ins <0,u,2,6>, lane 1 2085879809U, // <0,3,u,6>: Cost 2 ins <0,u,2,6>, lane 1
2130567168U, // <0,3,u,7>: Cost 2 ins <u,3,5,7>, lane 0 2130567168U, // <0,3,u,7>: Cost 2 ins <u,3,5,7>, lane 0
1012113409U, // <0,3,u,u>: Cost 1 ins LHS, lane 1 1012113409U, // <0,3,u,u>: Cost 1 ins LHS, lane 1
2085683201U, // <0,4,0,0>: Cost 2 ins <0,u,0,0>, lane 1 2085683201U, // <0,4,0,0>: Cost 2 ins <0,u,0,0>, lane 1
2618605670U, // <0,4,0,1>: Cost 3 vext2 <0,2,0,4>, LHS 2083684357U, // <0,4,0,1>: Cost 2 ins <0,4,u,u>, lane 5
1679392870U, // <0,4,0,2>: Cost 2 vuzpl <0,2,4,6>, LHS 1679392870U, // <0,4,0,2>: Cost 2 vuzpl <0,2,4,6>, LHS
2085707777U, // <0,4,0,3>: Cost 2 ins <0,u,0,3>, lane 1 2085707777U, // <0,4,0,3>: Cost 2 ins <0,u,0,3>, lane 1
1679392972U, // <0,4,0,4>: Cost 2 vuzpl <0,2,4,6>, <0,2,4,6> 1679392972U, // <0,4,0,4>: Cost 2 vuzpl <0,2,4,6>, <0,2,4,6>
2083659778U, // <0,4,0,5>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,4,0,5>: Cost 2 ins <0,4,u,5>, lane 2
1947503926U, // <0,4,0,6>: Cost 2 vtrnl <0,2,0,2>, RHS 1947503926U, // <0,4,0,6>: Cost 2 vtrnl <0,2,0,2>, RHS
3156836355U, // <0,4,0,7>: Cost 3 ins <0,4,0,u>, lane 3 3156836355U, // <0,4,0,7>: Cost 3 ins <0,4,0,u>, lane 3
1947503944U, // <0,4,0,u>: Cost 2 vtrnl <0,2,0,2>, RHS 1947503944U, // <0,4,0,u>: Cost 2 vtrnl <0,2,0,2>, RHS
2083168259U, // <0,4,1,0>: Cost 2 ins <0,4,1,u>, lane 3 2083168259U, // <0,4,1,0>: Cost 2 ins <0,4,1,u>, lane 3
Show All 9 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
2083241987U, // <0,4,2,1>: Cost 2 ins <0,4,2,u>, lane 3 2083241987U, // <0,4,2,1>: Cost 2 ins <0,4,2,u>, lane 3
2085847041U, // <0,4,2,2>: Cost 2 ins <0,u,2,2>, lane 1 2085847041U, // <0,4,2,2>: Cost 2 ins <0,u,2,2>, lane 1
1012113409U, // <0,4,2,3>: Cost 1 ins LHS, lane 1 1012113409U, // <0,4,2,3>: Cost 1 ins LHS, lane 1
2083241987U, // <0,4,2,4>: Cost 2 ins <0,4,2,u>, lane 3 2083241987U, // <0,4,2,4>: Cost 2 ins <0,4,2,u>, lane 3
1813286198U, // <0,4,2,5>: Cost 2 vzipl <0,2,0,2>, RHS 1813286198U, // <0,4,2,5>: Cost 2 vzipl <0,2,0,2>, RHS
873254198U, // <0,4,2,6>: Cost 1 vtrnl LHS, RHS 873254198U, // <0,4,2,6>: Cost 1 vtrnl LHS, RHS
2083241987U, // <0,4,2,7>: Cost 2 ins <0,4,2,u>, lane 3 2083241987U, // <0,4,2,7>: Cost 2 ins <0,4,2,u>, lane 3
873254216U, // <0,4,2,u>: Cost 1 vtrnl LHS, RHS 873254216U, // <0,4,2,u>: Cost 1 vtrnl LHS, RHS
3020811520U, // <0,4,3,0>: Cost 3 vtrnl <0,1,3,3>, <4,5,0,7> 3020811514U, // <0,4,3,0>: Cost 3 vtrnl <0,1,3,3>, <4,5,0,1>
2753136790U, // <0,4,3,1>: Cost 3 vuzpl <0,2,4,6>, <3,0,1,2> 2753136790U, // <0,4,3,1>: Cost 3 vuzpl <0,2,4,6>, <3,0,1,2>
2753136801U, // <0,4,3,2>: Cost 3 vuzpl <0,2,4,6>, <3,0,2,4> 2753136801U, // <0,4,3,2>: Cost 3 vuzpl <0,2,4,6>, <3,0,2,4>
2085928961U, // <0,4,3,3>: Cost 2 ins <0,u,3,3>, lane 1 2085928961U, // <0,4,3,3>: Cost 2 ins <0,u,3,3>, lane 1
3204800512U, // <0,4,3,4>: Cost 3 ins <u,4,3,4>, lane 0 3204800512U, // <0,4,3,4>: Cost 3 ins <u,4,3,4>, lane 0
2083659778U, // <0,4,3,5>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,4,3,5>: Cost 2 ins <0,4,u,5>, lane 2
2083667970U, // <0,4,3,6>: Cost 2 ins <0,4,u,6>, lane 2 2083667970U, // <0,4,3,6>: Cost 2 ins <0,4,u,6>, lane 2
3087183077U, // <0,4,3,7>: Cost 3 vtrnr <0,0,2,3>, <4,4,6,7> 3087183077U, // <0,4,3,7>: Cost 3 vtrnr <0,0,2,3>, <4,4,6,7>
2083659778U, // <0,4,3,u>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,4,3,u>: Cost 2 ins <0,4,u,5>, lane 2
Show All 17 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
1618136392U, // <0,4,5,u>: Cost 2 vext3 <1,2,3,0>, RHS 1618136392U, // <0,4,5,u>: Cost 2 vext3 <1,2,3,0>, RHS
2712227146U, // <0,4,6,0>: Cost 3 vext3 <4,6,0,0>, <4,6,0,0> 2712227146U, // <0,4,6,0>: Cost 3 vext3 <4,6,0,0>, <4,6,0,0>
2753138977U, // <0,4,6,1>: Cost 3 vuzpl <0,2,4,6>, <6,0,1,2> 2753138977U, // <0,4,6,1>: Cost 3 vuzpl <0,2,4,6>, <6,0,1,2>
2753138988U, // <0,4,6,2>: Cost 3 vuzpl <0,2,4,6>, <6,0,2,4> 2753138988U, // <0,4,6,2>: Cost 3 vuzpl <0,2,4,6>, <6,0,2,4>
2086150145U, // <0,4,6,3>: Cost 2 ins <0,u,6,3>, lane 1 2086150145U, // <0,4,6,3>: Cost 2 ins <0,u,6,3>, lane 1
2712522094U, // <0,4,6,4>: Cost 3 vext3 <4,6,4,0>, <4,6,4,0> 2712522094U, // <0,4,6,4>: Cost 3 vext3 <4,6,4,0>, <4,6,4,0>
2083659778U, // <0,4,6,5>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,4,6,5>: Cost 2 ins <0,4,u,5>, lane 2
2131296256U, // <0,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0 2131296256U, // <0,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0
2131304448U, // <0,4,6,7>: Cost 2 ins <u,4,6,7>, lane 0 2083684357U, // <0,4,6,7>: Cost 2 ins <0,4,u,u>, lane 5
2083659778U, // <0,4,6,u>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,4,6,u>: Cost 2 ins <0,4,u,5>, lane 2
3021106432U, // <0,4,7,0>: Cost 3 vtrnl <0,1,7,3>, <4,5,0,7> 3021106426U, // <0,4,7,0>: Cost 3 vtrnl <0,1,7,3>, <4,5,0,1>
2860487502U, // <0,4,7,1>: Cost 3 vuzpr <7,0,1,4>, <6,7,0,1> 2860487502U, // <0,4,7,1>: Cost 3 vuzpr <7,0,1,4>, <6,7,0,1>
3157377026U, // <0,4,7,2>: Cost 3 ins <0,4,u,2>, lane 2 3157377026U, // <0,4,7,2>: Cost 3 ins <0,4,u,2>, lane 2
2086223873U, // <0,4,7,3>: Cost 2 ins <0,u,7,3>, lane 1 2086223873U, // <0,4,7,3>: Cost 2 ins <0,u,7,3>, lane 1
3205095424U, // <0,4,7,4>: Cost 3 ins <u,4,7,4>, lane 0 3205095424U, // <0,4,7,4>: Cost 3 ins <u,4,7,4>, lane 0
2083659778U, // <0,4,7,5>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,4,7,5>: Cost 2 ins <0,4,u,5>, lane 2
2131369984U, // <0,4,7,6>: Cost 2 ins <u,4,7,6>, lane 0 2131369984U, // <0,4,7,6>: Cost 2 ins <u,4,7,6>, lane 0
2752452204U, // <0,4,7,7>: Cost 3 vuzpl <0,1,4,3>, <7,7,7,7> 2752452204U, // <0,4,7,7>: Cost 3 vuzpl <0,1,4,3>, <7,7,7,7>
2083659778U, // <0,4,7,u>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,4,7,u>: Cost 2 ins <0,4,u,5>, lane 2
2083168259U, // <0,4,u,0>: Cost 2 ins <0,4,1,u>, lane 3 2083168259U, // <0,4,u,0>: Cost 2 ins <0,4,1,u>, lane 3
2085765121U, // <0,4,u,1>: Cost 2 ins <0,u,1,1>, lane 1 2083684357U, // <0,4,u,1>: Cost 2 ins <0,4,u,u>, lane 5
1679398702U, // <0,4,u,2>: Cost 2 vuzpl <0,2,4,6>, LHS 1679398702U, // <0,4,u,2>: Cost 2 vuzpl <0,2,4,6>, LHS
1012113409U, // <0,4,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <0,4,u,3>: Cost 1 ins LHS, lane 1
1679392972U, // <0,4,u,4>: Cost 2 vuzpl <0,2,4,6>, <0,2,4,6> 1679392972U, // <0,4,u,4>: Cost 2 vuzpl <0,2,4,6>, <0,2,4,6>
743681334U, // <0,4,u,5>: Cost 1 vzipl LHS, RHS 743681334U, // <0,4,u,5>: Cost 1 vzipl LHS, RHS
873696566U, // <0,4,u,6>: Cost 1 vtrnl LHS, RHS 873696566U, // <0,4,u,6>: Cost 1 vtrnl LHS, RHS
2083168259U, // <0,4,u,7>: Cost 2 ins <0,4,1,u>, lane 3 2083168259U, // <0,4,u,7>: Cost 2 ins <0,4,1,u>, lane 3
873696584U, // <0,4,u,u>: Cost 1 vtrnl LHS, RHS 873696584U, // <0,4,u,u>: Cost 1 vtrnl LHS, RHS
2085683201U, // <0,5,0,0>: Cost 2 ins <0,u,0,0>, lane 1 2085683201U, // <0,5,0,0>: Cost 2 ins <0,u,0,0>, lane 1
2625912934U, // <0,5,0,1>: Cost 3 vext2 <1,4,0,5>, LHS 2131476480U, // <0,5,0,1>: Cost 2 ins <u,5,0,1>, lane 0
2085699585U, // <0,5,0,2>: Cost 2 ins <0,u,0,2>, lane 1 2085699585U, // <0,5,0,2>: Cost 2 ins <0,u,0,2>, lane 1
2085707777U, // <0,5,0,3>: Cost 2 ins <0,u,0,3>, lane 1 2085707777U, // <0,5,0,3>: Cost 2 ins <0,u,0,3>, lane 1
3159457793U, // <0,5,0,4>: Cost 3 ins <0,u,0,4>, lane 1 3159457793U, // <0,5,0,4>: Cost 3 ins <0,u,0,4>, lane 1
1678778497U, // <0,5,0,5>: Cost 2 vuzpl <0,1,5,3>, <0,1,5,3> 1678778497U, // <0,5,0,5>: Cost 2 vuzpl <0,1,5,3>, <0,1,5,3>
3159474177U, // <0,5,0,6>: Cost 3 ins <0,u,0,6>, lane 1 3159474177U, // <0,5,0,6>: Cost 3 ins <0,u,0,6>, lane 1
2013269302U, // <0,5,0,7>: Cost 2 vtrnr <0,0,0,0>, RHS 2013269302U, // <0,5,0,7>: Cost 2 vtrnr <0,0,0,0>, RHS
2085699585U, // <0,5,0,u>: Cost 2 ins <0,u,0,2>, lane 1 2085699585U, // <0,5,0,u>: Cost 2 ins <0,u,0,2>, lane 1
1500659814U, // <0,5,1,0>: Cost 2 vext1 <4,0,5,1>, LHS 1500659814U, // <0,5,1,0>: Cost 2 vext1 <4,0,5,1>, LHS
Show All 23 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
3205480448U, // <0,5,3,6>: Cost 3 ins <u,5,3,6>, lane 0 3205480448U, // <0,5,3,6>: Cost 3 ins <u,5,3,6>, lane 0
2131746816U, // <0,5,3,7>: Cost 2 ins <u,5,3,7>, lane 0 2131746816U, // <0,5,3,7>: Cost 2 ins <u,5,3,7>, lane 0
2131746816U, // <0,5,3,u>: Cost 2 ins <u,5,3,7>, lane 0 2131746816U, // <0,5,3,u>: Cost 2 ins <u,5,3,7>, lane 0
2888453704U, // <0,5,4,0>: Cost 3 vzipl <0,4,1,5>, <5,0,1,2> 2888453704U, // <0,5,4,0>: Cost 3 vzipl <0,4,1,5>, <5,0,1,2>
3159728129U, // <0,5,4,1>: Cost 3 ins <0,u,4,1>, lane 1 3159728129U, // <0,5,4,1>: Cost 3 ins <0,u,4,1>, lane 1
3159736321U, // <0,5,4,2>: Cost 3 ins <0,u,4,2>, lane 1 3159736321U, // <0,5,4,2>: Cost 3 ins <0,u,4,2>, lane 1
2086002689U, // <0,5,4,3>: Cost 2 ins <0,u,4,3>, lane 1 2086002689U, // <0,5,4,3>: Cost 2 ins <0,u,4,3>, lane 1
2888454068U, // <0,5,4,4>: Cost 3 vzipl <0,4,1,5>, <5,4,5,6> 2888454068U, // <0,5,4,4>: Cost 3 vzipl <0,4,1,5>, <5,4,5,6>
2888454148U, // <0,5,4,5>: Cost 3 vzipl <0,4,1,5>, <5,5,5,5> 2131804160U, // <0,5,4,5>: Cost 2 ins <u,5,4,5>, lane 0
2086027265U, // <0,5,4,6>: Cost 2 ins <0,u,4,6>, lane 1 2086027265U, // <0,5,4,6>: Cost 2 ins <0,u,4,6>, lane 1
2131820544U, // <0,5,4,7>: Cost 2 ins <u,5,4,7>, lane 0 2131820544U, // <0,5,4,7>: Cost 2 ins <u,5,4,7>, lane 0
2086027265U, // <0,5,4,u>: Cost 2 ins <0,u,4,6>, lane 1 2086027265U, // <0,5,4,u>: Cost 2 ins <0,u,4,6>, lane 1
3205578752U, // <0,5,5,0>: Cost 3 ins <u,5,5,0>, lane 0 3205578752U, // <0,5,5,0>: Cost 3 ins <u,5,5,0>, lane 0
2997291922U, // <0,5,5,1>: Cost 3 vzipr <7,4,0,5>, <4,0,5,1> 2997291922U, // <0,5,5,1>: Cost 3 vzipr <7,4,0,5>, <4,0,5,1>
2752523939U, // <0,5,5,2>: Cost 3 vuzpl <0,1,5,3>, <5,1,2,3> 2752523939U, // <0,5,5,2>: Cost 3 vuzpl <0,1,5,3>, <5,1,2,3>
2086076417U, // <0,5,5,3>: Cost 2 ins <0,u,5,3>, lane 1 2086076417U, // <0,5,5,3>: Cost 2 ins <0,u,5,3>, lane 1
3205611520U, // <0,5,5,4>: Cost 3 ins <u,5,5,4>, lane 0 3205611520U, // <0,5,5,4>: Cost 3 ins <u,5,5,4>, lane 0
Show All 24 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
2085699585U, // <0,5,u,2>: Cost 2 ins <0,u,0,2>, lane 1 2085699585U, // <0,5,u,2>: Cost 2 ins <0,u,0,2>, lane 1
1012113409U, // <0,5,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <0,5,u,3>: Cost 1 ins LHS, lane 1
1817423814U, // <0,5,u,4>: Cost 2 vzipl LHS, <5,4,7,6> 1817423814U, // <0,5,u,4>: Cost 2 vzipl LHS, <5,4,7,6>
2085797889U, // <0,5,u,5>: Cost 2 ins <0,u,1,5>, lane 1 2085797889U, // <0,5,u,5>: Cost 2 ins <0,u,1,5>, lane 1
2085879809U, // <0,5,u,6>: Cost 2 ins <0,u,2,6>, lane 1 2085879809U, // <0,5,u,6>: Cost 2 ins <0,u,2,6>, lane 1
1058226176U, // <0,5,u,7>: Cost 1 ins RHS, lane 0 1058226176U, // <0,5,u,7>: Cost 1 ins RHS, lane 0
1012113409U, // <0,5,u,u>: Cost 1 ins LHS, lane 1 1012113409U, // <0,5,u,u>: Cost 1 ins LHS, lane 1
2085683201U, // <0,6,0,0>: Cost 2 ins <0,u,0,0>, lane 1 2085683201U, // <0,6,0,0>: Cost 2 ins <0,u,0,0>, lane 1
2619949158U, // <0,6,0,1>: Cost 3 vext2 <0,4,0,6>, LHS 2085691393U, // <0,6,0,1>: Cost 2 ins <0,u,0,1>, lane 1
2132148224U, // <0,6,0,2>: Cost 2 ins <u,6,0,2>, lane 0 2132148224U, // <0,6,0,2>: Cost 2 ins <u,6,0,2>, lane 0
2085707777U, // <0,6,0,3>: Cost 2 ins <0,u,0,3>, lane 1 2085707777U, // <0,6,0,3>: Cost 2 ins <0,u,0,3>, lane 1
2619949386U, // <0,6,0,4>: Cost 3 vext2 <0,4,0,6>, <0,4,0,6> 2619949386U, // <0,6,0,4>: Cost 3 vext2 <0,4,0,6>, <0,4,0,6>
2586415202U, // <0,6,0,5>: Cost 3 vext1 <6,0,6,0>, <5,6,7,0> 2586415202U, // <0,6,0,5>: Cost 3 vext1 <6,0,6,0>, <5,6,7,0>
1678852234U, // <0,6,0,6>: Cost 2 vuzpl <0,1,6,3>, <0,1,6,3> 1678852234U, // <0,6,0,6>: Cost 2 vuzpl <0,1,6,3>, <0,1,6,3>
1879051574U, // <0,6,0,7>: Cost 2 vzipr <0,0,0,0>, RHS 1879051574U, // <0,6,0,7>: Cost 2 vzipr <0,0,0,0>, RHS
2132148224U, // <0,6,0,u>: Cost 2 ins <u,6,0,2>, lane 0 2132148224U, // <0,6,0,u>: Cost 2 ins <u,6,0,2>, lane 0
2993278336U, // <0,6,1,0>: Cost 3 vzipr <6,7,0,1>, <4,6,6,0> 2993278336U, // <0,6,1,0>: Cost 3 vzipr <6,7,0,1>, <4,6,6,0>
Show All 23 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
3206144000U, // <0,6,3,6>: Cost 3 ins <u,6,3,6>, lane 0 3206144000U, // <0,6,3,6>: Cost 3 ins <u,6,3,6>, lane 0
2132410368U, // <0,6,3,7>: Cost 2 ins <u,6,3,7>, lane 0 2132410368U, // <0,6,3,7>: Cost 2 ins <u,6,3,7>, lane 0
2132410368U, // <0,6,3,u>: Cost 2 ins <u,6,3,7>, lane 0 2132410368U, // <0,6,3,u>: Cost 2 ins <u,6,3,7>, lane 0
2888536380U, // <0,6,4,0>: Cost 3 vzipl <0,4,2,6>, <6,0,4,2> 2888536380U, // <0,6,4,0>: Cost 3 vzipl <0,4,2,6>, <6,0,4,2>
3021574433U, // <0,6,4,1>: Cost 3 vtrnl <0,2,4,6>, <6,0,1,2> 3021574433U, // <0,6,4,1>: Cost 3 vtrnl <0,2,4,6>, <6,0,1,2>
3021574444U, // <0,6,4,2>: Cost 3 vtrnl <0,2,4,6>, <6,0,2,4> 3021574444U, // <0,6,4,2>: Cost 3 vtrnl <0,2,4,6>, <6,0,2,4>
2086002689U, // <0,6,4,3>: Cost 2 ins <0,u,4,3>, lane 1 2086002689U, // <0,6,4,3>: Cost 2 ins <0,u,4,3>, lane 1
2562559286U, // <0,6,4,4>: Cost 3 vext1 <2,0,6,4>, RHS 2562559286U, // <0,6,4,4>: Cost 3 vext1 <2,0,6,4>, RHS
3021574797U, // <0,6,4,5>: Cost 3 vtrnl <0,2,4,6>, <6,4,5,6> 2086019073U, // <0,6,4,5>: Cost 2 ins <0,u,4,5>, lane 1
2132475904U, // <0,6,4,6>: Cost 2 ins <u,6,4,6>, lane 0 2132475904U, // <0,6,4,6>: Cost 2 ins <u,6,4,6>, lane 0
2954153270U, // <0,6,4,7>: Cost 3 vzipr <0,2,0,4>, RHS 2954153270U, // <0,6,4,7>: Cost 3 vzipr <0,2,0,4>, RHS
2132475904U, // <0,6,4,u>: Cost 2 ins <u,6,4,6>, lane 0 2132475904U, // <0,6,4,u>: Cost 2 ins <u,6,4,6>, lane 0
2718716594U, // <0,6,5,0>: Cost 3 vext3 <5,6,7,0>, <6,5,0,7> 2718716594U, // <0,6,5,0>: Cost 3 vext3 <5,6,7,0>, <6,5,0,7>
3206250496U, // <0,6,5,1>: Cost 3 ins <u,6,5,1>, lane 0 3206250496U, // <0,6,5,1>: Cost 3 ins <u,6,5,1>, lane 0
3206258688U, // <0,6,5,2>: Cost 3 ins <u,6,5,2>, lane 0 3206258688U, // <0,6,5,2>: Cost 3 ins <u,6,5,2>, lane 0
2086076417U, // <0,6,5,3>: Cost 2 ins <0,u,5,3>, lane 1 2086076417U, // <0,6,5,3>: Cost 2 ins <0,u,5,3>, lane 1
3206275072U, // <0,6,5,4>: Cost 3 ins <u,6,5,4>, lane 0 3206275072U, // <0,6,5,4>: Cost 3 ins <u,6,5,4>, lane 0
▲ Show 20 Lines • Show All 105 Lines • ▼ Show 20 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
2085699585U, // <0,7,u,2>: Cost 2 ins <0,u,0,2>, lane 1 2085699585U, // <0,7,u,2>: Cost 2 ins <0,u,0,2>, lane 1
1012113409U, // <0,7,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <0,7,u,3>: Cost 1 ins LHS, lane 1
1817425254U, // <0,7,u,4>: Cost 2 vzipl LHS, <7,4,5,6> 1817425254U, // <0,7,u,4>: Cost 2 vzipl LHS, <7,4,5,6>
2085797889U, // <0,7,u,5>: Cost 2 ins <0,u,1,5>, lane 1 2085797889U, // <0,7,u,5>: Cost 2 ins <0,u,1,5>, lane 1
2085879809U, // <0,7,u,6>: Cost 2 ins <0,u,2,6>, lane 1 2085879809U, // <0,7,u,6>: Cost 2 ins <0,u,2,6>, lane 1
2133221376U, // <0,7,u,7>: Cost 2 ins <u,7,5,7>, lane 0 2133221376U, // <0,7,u,7>: Cost 2 ins <u,7,5,7>, lane 0
1012113409U, // <0,7,u,u>: Cost 1 ins LHS, lane 1 1012113409U, // <0,7,u,u>: Cost 1 ins LHS, lane 1
135053414U, // <0,u,0,0>: Cost 1 vdup0 LHS 135053414U, // <0,u,0,0>: Cost 1 vdup0 LHS
1678999562U, // <0,u,0,1>: Cost 2 vuzpl LHS, <0,0,1,1> 1007951877U, // <0,u,0,1>: Cost 1 ins LHS, lane 5
605257830U, // <0,u,0,2>: Cost 1 vuzpl LHS, LHS 605257830U, // <0,u,0,2>: Cost 1 vuzpl LHS, LHS
1007910914U, // <0,u,0,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,0,3>: Cost 1 ins LHS, lane 2
1678999756U, // <0,u,0,4>: Cost 2 vuzpl LHS, <0,2,4,6> 1678999756U, // <0,u,0,4>: Cost 2 vuzpl LHS, <0,2,4,6>
2081767427U, // <0,u,0,5>: Cost 2 ins <0,2,0,u>, lane 3 2081767427U, // <0,u,0,5>: Cost 2 ins <0,2,0,u>, lane 3
1947506842U, // <0,u,0,6>: Cost 2 vtrnl <0,2,0,2>, RHS 1947506842U, // <0,u,0,6>: Cost 2 vtrnl <0,2,0,2>, RHS
2081767427U, // <0,u,0,7>: Cost 2 ins <0,2,0,u>, lane 3 2081767427U, // <0,u,0,7>: Cost 2 ins <0,2,0,u>, lane 3
605257884U, // <0,u,0,u>: Cost 1 vuzpl LHS, LHS 605257884U, // <0,u,0,u>: Cost 1 vuzpl LHS, LHS
1812821715U, // <0,u,1,0>: Cost 2 vzipl LHS, <u,0,1,2> 1812821715U, // <0,u,1,0>: Cost 2 vzipl LHS, <u,0,1,2>
Show All 9 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
1007509507U, // <0,u,2,1>: Cost 1 ins LHS, lane 3 1007509507U, // <0,u,2,1>: Cost 1 ins LHS, lane 3
873256750U, // <0,u,2,2>: Cost 1 vtrnl LHS, LHS 873256750U, // <0,u,2,2>: Cost 1 vtrnl LHS, LHS
835584U, // <0,u,2,3>: Cost 0 copy LHS 835584U, // <0,u,2,3>: Cost 0 copy LHS
1007509507U, // <0,u,2,4>: Cost 1 ins LHS, lane 3 1007509507U, // <0,u,2,4>: Cost 1 ins LHS, lane 3
1007509507U, // <0,u,2,5>: Cost 1 ins LHS, lane 3 1007509507U, // <0,u,2,5>: Cost 1 ins LHS, lane 3
873257114U, // <0,u,2,6>: Cost 1 vtrnl LHS, RHS 873257114U, // <0,u,2,6>: Cost 1 vtrnl LHS, RHS
1007509507U, // <0,u,2,7>: Cost 1 ins LHS, lane 3 1007509507U, // <0,u,2,7>: Cost 1 ins LHS, lane 3
835584U, // <0,u,2,u>: Cost 0 copy LHS 835584U, // <0,u,2,u>: Cost 0 copy LHS
2129698816U, // <0,u,3,0>: Cost 2 ins <u,2,3,0>, lane 0 2133680132U, // <0,u,3,0>: Cost 2 ins <u,u,3,0>, lane 4
1679001750U, // <0,u,3,1>: Cost 2 vuzpl LHS, <3,0,1,2> 1679001750U, // <0,u,3,1>: Cost 2 vuzpl LHS, <3,0,1,2>
2128388096U, // <0,u,3,2>: Cost 2 ins <u,0,3,2>, lane 0 2128388096U, // <0,u,3,2>: Cost 2 ins <u,0,3,2>, lane 0
1007910914U, // <0,u,3,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,3,3>: Cost 1 ins LHS, lane 2
2129731584U, // <0,u,3,4>: Cost 2 ins <u,2,3,4>, lane 0 2133712900U, // <0,u,3,4>: Cost 2 ins <u,u,3,4>, lane 4
1679002114U, // <0,u,3,5>: Cost 2 vuzpl LHS, <3,4,5,6> 1679002114U, // <0,u,3,5>: Cost 2 vuzpl LHS, <3,4,5,6>
2082340866U, // <0,u,3,6>: Cost 2 ins <0,2,u,6>, lane 2 2082340866U, // <0,u,3,6>: Cost 2 ins <0,2,u,6>, lane 2
2131746816U, // <0,u,3,7>: Cost 2 ins <u,5,3,7>, lane 0 2133737476U, // <0,u,3,7>: Cost 2 ins <u,u,3,7>, lane 4
1007910914U, // <0,u,3,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,3,u>: Cost 1 ins LHS, lane 2
2082062339U, // <0,u,4,0>: Cost 2 ins <0,2,4,u>, lane 3 2082062339U, // <0,u,4,0>: Cost 2 ins <0,2,4,u>, lane 3
1814714158U, // <0,u,4,1>: Cost 2 vzipl <0,4,1,5>, LHS 1814714158U, // <0,u,4,1>: Cost 2 vzipl <0,4,1,5>, LHS
1947834158U, // <0,u,4,2>: Cost 2 vtrnl <0,2,4,6>, LHS 1947834158U, // <0,u,4,2>: Cost 2 vtrnl <0,2,4,6>, LHS
1007910914U, // <0,u,4,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,4,3>: Cost 1 ins LHS, lane 2
1947828428U, // <0,u,4,4>: Cost 2 vtrnl <0,2,4,6>, <0,2,4,6> 1947828428U, // <0,u,4,4>: Cost 2 vtrnl <0,2,4,6>, <0,2,4,6>
1544899894U, // <0,u,4,5>: Cost 2 vext2 <0,2,0,u>, RHS 1007951877U, // <0,u,4,5>: Cost 1 ins LHS, lane 5
605261110U, // <0,u,4,6>: Cost 1 vuzpl LHS, RHS 605261110U, // <0,u,4,6>: Cost 1 vuzpl LHS, RHS
2082062339U, // <0,u,4,7>: Cost 2 ins <0,2,4,u>, lane 3 2082062339U, // <0,u,4,7>: Cost 2 ins <0,2,4,u>, lane 3
605261128U, // <0,u,4,u>: Cost 1 vuzpl LHS, RHS 605261128U, // <0,u,4,u>: Cost 1 vuzpl LHS, RHS
2080964610U, // <0,u,5,0>: Cost 2 ins <0,0,u,0>, lane 2 2080964610U, // <0,u,5,0>: Cost 2 ins <0,0,u,0>, lane 2
2128527360U, // <0,u,5,1>: Cost 2 ins <u,0,5,1>, lane 0 2128527360U, // <0,u,5,1>: Cost 2 ins <u,0,5,1>, lane 0
2080980994U, // <0,u,5,2>: Cost 2 ins <0,0,u,2>, lane 2 2080980994U, // <0,u,5,2>: Cost 2 ins <0,0,u,2>, lane 2
1007910914U, // <0,u,5,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,5,3>: Cost 1 ins LHS, lane 2
2081660930U, // <0,u,5,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <0,u,5,4>: Cost 2 ins <0,1,u,4>, lane 2
2131214336U, // <0,u,5,5>: Cost 2 ins <u,4,5,5>, lane 0 2133868548U, // <0,u,5,5>: Cost 2 ins <u,u,5,5>, lane 4
1618139290U, // <0,u,5,6>: Cost 2 vext3 <1,2,3,0>, RHS 1618139290U, // <0,u,5,6>: Cost 2 vext3 <1,2,3,0>, RHS
1751092534U, // <0,u,5,7>: Cost 2 vuzpr <1,0,3,u>, RHS 1751092534U, // <0,u,5,7>: Cost 2 vuzpr <1,0,3,u>, RHS
1007910914U, // <0,u,5,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,5,u>: Cost 1 ins LHS, lane 2
1679004494U, // <0,u,6,0>: Cost 2 vuzpl LHS, <6,7,0,1> 1679004494U, // <0,u,6,0>: Cost 2 vuzpl LHS, <6,7,0,1>
2080972802U, // <0,u,6,1>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,u,6,1>: Cost 2 ins <0,0,u,1>, lane 2
2128609280U, // <0,u,6,2>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <0,u,6,2>: Cost 2 ins <u,0,6,2>, lane 0
1007910914U, // <0,u,6,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,6,3>: Cost 1 ins LHS, lane 2
1679004534U, // <0,u,6,4>: Cost 2 vuzpl LHS, <6,7,4,5> 1679004534U, // <0,u,6,4>: Cost 2 vuzpl LHS, <6,7,4,5>
2083659778U, // <0,u,6,5>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,u,6,5>: Cost 2 ins <0,4,u,5>, lane 2
2082340866U, // <0,u,6,6>: Cost 2 ins <0,2,u,6>, lane 2 2133950468U, // <0,u,6,6>: Cost 2 ins <u,u,6,6>, lane 4
1058226176U, // <0,u,6,7>: Cost 1 ins RHS, lane 0 1060216836U, // <0,u,6,7>: Cost 1 ins RHS, lane 4
1007910914U, // <0,u,6,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,6,u>: Cost 1 ins LHS, lane 2
2132647936U, // <0,u,7,0>: Cost 2 ins <u,6,7,0>, lane 0 2133975044U, // <0,u,7,0>: Cost 2 ins <u,u,7,0>, lane 4
2080972802U, // <0,u,7,1>: Cost 2 ins <0,0,u,1>, lane 2 2080972802U, // <0,u,7,1>: Cost 2 ins <0,0,u,1>, lane 2
2080980994U, // <0,u,7,2>: Cost 2 ins <0,0,u,2>, lane 2 2080980994U, // <0,u,7,2>: Cost 2 ins <0,0,u,2>, lane 2
1007910914U, // <0,u,7,3>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,7,3>: Cost 1 ins LHS, lane 2
2132680704U, // <0,u,7,4>: Cost 2 ins <u,6,7,4>, lane 0 2134007812U, // <0,u,7,4>: Cost 2 ins <u,u,7,4>, lane 4
2083659778U, // <0,u,7,5>: Cost 2 ins <0,4,u,5>, lane 2 2083659778U, // <0,u,7,5>: Cost 2 ins <0,4,u,5>, lane 2
2082340866U, // <0,u,7,6>: Cost 2 ins <0,2,u,6>, lane 2 2134024196U, // <0,u,7,6>: Cost 2 ins <u,u,7,6>, lane 4
2132041728U, // <0,u,7,7>: Cost 2 ins <u,5,7,7>, lane 0 2134032388U, // <0,u,7,7>: Cost 2 ins <u,u,7,7>, lane 4
1007910914U, // <0,u,7,u>: Cost 1 ins LHS, lane 2 1007910914U, // <0,u,7,u>: Cost 1 ins LHS, lane 2
135053414U, // <0,u,u,0>: Cost 1 vdup0 LHS 135053414U, // <0,u,u,0>: Cost 1 vdup0 LHS
743683886U, // <0,u,u,1>: Cost 1 vzipl LHS, LHS 743683886U, // <0,u,u,1>: Cost 1 vzipl LHS, LHS
605263662U, // <0,u,u,2>: Cost 1 vuzpl LHS, LHS 605263662U, // <0,u,u,2>: Cost 1 vuzpl LHS, LHS
835584U, // <0,u,u,3>: Cost 0 copy LHS 835584U, // <0,u,u,3>: Cost 0 copy LHS
1007509507U, // <0,u,u,4>: Cost 1 ins LHS, lane 3 1007509507U, // <0,u,u,4>: Cost 1 ins LHS, lane 3
743684250U, // <0,u,u,5>: Cost 1 vzipl LHS, RHS 743684250U, // <0,u,u,5>: Cost 1 vzipl LHS, RHS
605264026U, // <0,u,u,6>: Cost 1 vuzpl LHS, RHS 605264026U, // <0,u,u,6>: Cost 1 vuzpl LHS, RHS
1007509507U, // <0,u,u,7>: Cost 1 ins LHS, lane 3 1007509507U, // <0,u,u,7>: Cost 1 ins LHS, lane 3
835584U, // <0,u,u,u>: Cost 0 copy LHS 835584U, // <0,u,u,u>: Cost 0 copy LHS
2128150528U, // <1,0,0,0>: Cost 2 ins <u,0,0,0>, lane 0 2128150528U, // <1,0,0,0>: Cost 2 ins <u,0,0,0>, lane 0
1818148966U, // <1,0,0,1>: Cost 2 vzipl <1,0,3,2>, LHS 1818148966U, // <1,0,0,1>: Cost 2 vzipl <1,0,3,2>, LHS
2086952962U, // <1,0,0,2>: Cost 2 ins <1,0,u,2>, lane 2 2086952962U, // <1,0,0,2>: Cost 2 ins <1,0,u,2>, lane 2
2619310332U, // <1,0,0,3>: Cost 3 vext2 <0,3,1,0>, <0,3,1,0> 2619310332U, // <1,0,0,3>: Cost 3 vext2 <0,3,1,0>, <0,3,1,0>
2891891026U, // <1,0,0,4>: Cost 3 vzipl <1,0,3,2>, <0,4,1,5> 2891891026U, // <1,0,0,4>: Cost 3 vzipl <1,0,3,2>, <0,4,1,5>
3165437953U, // <1,0,0,5>: Cost 3 ins <1,u,0,5>, lane 1 3165437953U, // <1,0,0,5>: Cost 3 ins <1,u,0,5>, lane 1
3160154115U, // <1,0,0,6>: Cost 3 ins <1,0,0,u>, lane 3 3160154115U, // <1,0,0,6>: Cost 3 ins <1,0,0,u>, lane 3
3160154115U, // <1,0,0,7>: Cost 3 ins <1,0,0,u>, lane 3 3160154115U, // <1,0,0,7>: Cost 3 ins <1,0,0,u>, lane 3
1818149533U, // <1,0,0,u>: Cost 2 vzipl <1,0,3,2>, LHS 1818149533U, // <1,0,0,u>: Cost 2 vzipl <1,0,3,2>, LHS
1745641571U, // <1,0,1,0>: Cost 2 vuzpr <0,1,2,0>, <0,1,2,0> 1141522514U, // <1,0,1,0>: Cost 2 vrev <0,1,0,1>
1818656870U, // <1,0,1,1>: Cost 2 vzipl <1,1,1,1>, LHS 1818656870U, // <1,0,1,1>: Cost 2 vzipl <1,1,1,1>, LHS
1616003174U, // <1,0,1,2>: Cost 2 vext3 <0,u,1,1>, LHS 1616003174U, // <1,0,1,2>: Cost 2 vext3 <0,u,1,1>, LHS
2091753473U, // <1,0,1,3>: Cost 2 ins <1,u,1,3>, lane 1 2091753473U, // <1,0,1,3>: Cost 2 ins <1,u,1,3>, lane 1
2556783926U, // <1,0,1,4>: Cost 3 vext1 <1,1,0,1>, RHS 1477070134U, // <1,0,1,4>: Cost 2 vext1 <0,1,0,1>, RHS
2760770560U, // <1,0,1,5>: Cost 3 vuzpl <1,5,0,2>, <1,3,5,7> 2760770560U, // <1,0,1,5>: Cost 3 vuzpl <1,5,0,2>, <1,3,5,7>
2724839566U, // <1,0,1,6>: Cost 3 vext3 <6,7,0,1>, <0,1,6,7> 2724839566U, // <1,0,1,6>: Cost 3 vext3 <6,7,0,1>, <0,1,6,7>
3165528065U, // <1,0,1,7>: Cost 3 ins <1,u,1,7>, lane 1 3165528065U, // <1,0,1,7>: Cost 3 ins <1,u,1,7>, lane 1
1616003228U, // <1,0,1,u>: Cost 2 vext3 <0,u,1,1>, LHS 1616003228U, // <1,0,1,u>: Cost 2 vext3 <0,u,1,1>, LHS
2685690019U, // <1,0,2,0>: Cost 3 vext3 <0,2,0,1>, <0,2,0,1> 2685690019U, // <1,0,2,0>: Cost 3 vext3 <0,2,0,1>, <0,2,0,1>
1819459686U, // <1,0,2,1>: Cost 2 vzipl <1,2,3,0>, LHS 1819459686U, // <1,0,2,1>: Cost 2 vzipl <1,2,3,0>, LHS
2128314368U, // <1,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0 2128314368U, // <1,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0
2128322560U, // <1,0,2,3>: Cost 2 ins <u,0,2,3>, lane 0 2087002117U, // <1,0,2,3>: Cost 2 ins <1,0,u,u>, lane 5
2689745100U, // <1,0,2,4>: Cost 3 vext3 <0,u,1,1>, <0,2,4,6> 2689745100U, // <1,0,2,4>: Cost 3 vext3 <0,u,1,1>, <0,2,4,6>
2970798548U, // <1,0,2,5>: Cost 3 vzipr <3,0,1,2>, <3,4,0,5> 2970798548U, // <1,0,2,5>: Cost 3 vzipr <3,0,1,2>, <3,4,0,5>
3165593601U, // <1,0,2,6>: Cost 3 ins <1,u,2,6>, lane 1 3165593601U, // <1,0,2,6>: Cost 3 ins <1,u,2,6>, lane 1
2592625730U, // <1,0,2,7>: Cost 3 vext1 <7,1,0,2>, <7,1,0,2> 2592625730U, // <1,0,2,7>: Cost 3 vext1 <7,1,0,2>, <7,1,0,2>
1819460253U, // <1,0,2,u>: Cost 2 vzipl <1,2,3,0>, LHS 1819460253U, // <1,0,2,u>: Cost 2 vzipl <1,2,3,0>, LHS
2014101504U, // <1,0,3,0>: Cost 2 vtrnr LHS, <0,0,0,0> 2014101504U, // <1,0,3,0>: Cost 2 vtrnr LHS, <0,0,0,0>
2014101514U, // <1,0,3,1>: Cost 2 vtrnr LHS, <0,0,1,1> 2014101514U, // <1,0,3,1>: Cost 2 vtrnr LHS, <0,0,1,1>
67944550U, // <1,0,3,2>: Cost 1 vrev LHS 67944550U, // <1,0,3,2>: Cost 1 vrev LHS
2091900929U, // <1,0,3,3>: Cost 2 ins <1,u,3,3>, lane 1 2091900929U, // <1,0,3,3>: Cost 2 ins <1,u,3,3>, lane 1
2091909121U, // <1,0,3,4>: Cost 2 ins <1,u,3,4>, lane 1 2091909121U, // <1,0,3,4>: Cost 2 ins <1,u,3,4>, lane 1
2086633475U, // <1,0,3,5>: Cost 2 ins <1,0,3,u>, lane 3 2086633475U, // <1,0,3,5>: Cost 2 ins <1,0,3,u>, lane 3
2086633475U, // <1,0,3,6>: Cost 2 ins <1,0,3,u>, lane 3 2086633475U, // <1,0,3,6>: Cost 2 ins <1,0,3,u>, lane 3
2091933697U, // <1,0,3,7>: Cost 2 ins <1,u,3,7>, lane 1 2091933697U, // <1,0,3,7>: Cost 2 ins <1,u,3,7>, lane 1
68386972U, // <1,0,3,u>: Cost 1 vrev LHS 68386972U, // <1,0,3,u>: Cost 1 vrev LHS
2667752338U, // <1,0,4,0>: Cost 3 vext2 <u,4,1,0>, <4,0,5,1> 2667752338U, // <1,0,4,0>: Cost 3 vext2 <u,4,1,0>, <4,0,5,1>
2689745234U, // <1,0,4,1>: Cost 3 vext3 <0,u,1,1>, <0,4,1,5> 2689745234U, // <1,0,4,1>: Cost 3 vext3 <0,u,1,1>, <0,4,1,5>
2086952962U, // <1,0,4,2>: Cost 2 ins <1,0,u,2>, lane 2 2086952962U, // <1,0,4,2>: Cost 2 ins <1,0,u,2>, lane 2
2819383641U, // <1,0,4,3>: Cost 3 vuzpr <0,1,2,0>, <0,4,2,3> 2819383641U, // <1,0,4,3>: Cost 3 vuzpr <0,1,2,0>, <0,4,2,3>
2894569810U, // <1,0,4,4>: Cost 3 vzipl <1,4,3,5>, <0,4,1,5> 2894569810U, // <1,0,4,4>: Cost 3 vzipl <1,4,3,5>, <0,4,1,5>
2619313462U, // <1,0,4,5>: Cost 3 vext2 <0,3,1,0>, RHS 2087002117U, // <1,0,4,5>: Cost 2 ins <1,0,u,u>, lane 5
2758102326U, // <1,0,4,6>: Cost 3 vuzpl <1,1,0,0>, RHS 2758102326U, // <1,0,4,6>: Cost 3 vuzpl <1,1,0,0>, RHS
2819386597U, // <1,0,4,7>: Cost 3 vuzpr <0,1,2,0>, <4,4,6,7> 2819386597U, // <1,0,4,7>: Cost 3 vuzpr <0,1,2,0>, <4,4,6,7>
2086952962U, // <1,0,4,u>: Cost 2 ins <1,0,u,2>, lane 2 2086952962U, // <1,0,4,u>: Cost 2 ins <1,0,u,2>, lane 2
2955558912U, // <1,0,5,0>: Cost 3 vzipr <0,4,1,5>, <0,0,0,0> 2955558912U, // <1,0,5,0>: Cost 3 vzipr <0,4,1,5>, <0,0,0,0>
1821507686U, // <1,0,5,1>: Cost 2 vzipl <1,5,3,7>, LHS 1821507686U, // <1,0,5,1>: Cost 2 vzipl <1,5,3,7>, LHS
1954545766U, // <1,0,5,2>: Cost 2 vtrnl <1,3,5,7>, LHS 1954545766U, // <1,0,5,2>: Cost 2 vtrnl <1,3,5,7>, LHS
3165790209U, // <1,0,5,3>: Cost 3 ins <1,u,5,3>, lane 1 3165790209U, // <1,0,5,3>: Cost 3 ins <1,u,5,3>, lane 1
2955560050U, // <1,0,5,4>: Cost 3 vzipr <0,4,1,5>, <1,5,0,4> 1141850234U, // <1,0,5,4>: Cost 2 vrev <0,1,4,5>
3165806593U, // <1,0,5,5>: Cost 3 ins <1,u,5,5>, lane 1 3165806593U, // <1,0,5,5>: Cost 3 ins <1,u,5,5>, lane 1
3202310144U, // <1,0,5,6>: Cost 3 ins <u,0,5,6>, lane 0 3202310144U, // <1,0,5,6>: Cost 3 ins <u,0,5,6>, lane 0
2092081153U, // <1,0,5,7>: Cost 2 ins <1,u,5,7>, lane 1 2092081153U, // <1,0,5,7>: Cost 2 ins <1,u,5,7>, lane 1
1954545820U, // <1,0,5,u>: Cost 2 vtrnl <1,3,5,7>, LHS 1954545820U, // <1,0,5,u>: Cost 2 vtrnl <1,3,5,7>, LHS
3202334720U, // <1,0,6,0>: Cost 3 ins <u,0,6,0>, lane 0 3202334720U, // <1,0,6,0>: Cost 3 ins <u,0,6,0>, lane 0
2895765606U, // <1,0,6,1>: Cost 3 vzipl <1,6,1,7>, LHS 2895765606U, // <1,0,6,1>: Cost 3 vzipl <1,6,1,7>, LHS
2128609280U, // <1,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <1,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0
2819383803U, // <1,0,6,3>: Cost 3 vuzpr <0,1,2,0>, <0,6,2,3> 2819383803U, // <1,0,6,3>: Cost 3 vuzpr <0,1,2,0>, <0,6,2,3>
2896060754U, // <1,0,6,4>: Cost 3 vzipl <1,6,5,7>, <0,4,1,5> 2896060754U, // <1,0,6,4>: Cost 3 vzipl <1,6,5,7>, <0,4,1,5>
3029688449U, // <1,0,6,5>: Cost 3 vtrnl <1,5,6,7>, <0,1,5,3> 2215673988U, // <1,0,6,5>: Cost 3 vrev <0,1,5,6>
3165888513U, // <1,0,6,6>: Cost 3 ins <1,u,6,6>, lane 1 3165888513U, // <1,0,6,6>: Cost 3 ins <1,u,6,6>, lane 1
2128650240U, // <1,0,6,7>: Cost 2 ins <u,0,6,7>, lane 0 2087002117U, // <1,0,6,7>: Cost 2 ins <1,0,u,u>, lane 5
2128609280U, // <1,0,6,u>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <1,0,6,u>: Cost 2 ins <u,0,6,2>, lane 0
2659128312U, // <1,0,7,0>: Cost 3 vext2 <7,0,1,0>, <7,0,1,0> 2659128312U, // <1,0,7,0>: Cost 3 vext2 <7,0,1,0>, <7,0,1,0>
2974156454U, // <1,0,7,1>: Cost 3 vzipr <3,5,1,7>, <2,3,0,1> 2974156454U, // <1,0,7,1>: Cost 3 vzipr <3,5,1,7>, <2,3,0,1>
2086952962U, // <1,0,7,2>: Cost 2 ins <1,0,u,2>, lane 2 2086952962U, // <1,0,7,2>: Cost 2 ins <1,0,u,2>, lane 2
2861265024U, // <1,0,7,3>: Cost 3 vuzpr <7,1,3,0>, <5,7,1,3> 2861265024U, // <1,0,7,3>: Cost 3 vuzpr <7,1,3,0>, <5,7,1,3>
3202441216U, // <1,0,7,4>: Cost 3 ins <u,0,7,4>, lane 0 3202441216U, // <1,0,7,4>: Cost 3 ins <u,0,7,4>, lane 0
3165954049U, // <1,0,7,5>: Cost 3 ins <1,u,7,5>, lane 1 3165954049U, // <1,0,7,5>: Cost 3 ins <1,u,7,5>, lane 1
2663110110U, // <1,0,7,6>: Cost 3 vext2 <7,6,1,0>, <7,6,1,0> 1142014094U, // <1,0,7,6>: Cost 2 vrev <0,1,6,7>
3165970433U, // <1,0,7,7>: Cost 3 ins <1,u,7,7>, lane 1 3165970433U, // <1,0,7,7>: Cost 3 ins <1,u,7,7>, lane 1
2086952962U, // <1,0,7,u>: Cost 2 ins <1,0,u,2>, lane 2 2086952962U, // <1,0,7,u>: Cost 2 ins <1,0,u,2>, lane 2
2014142464U, // <1,0,u,0>: Cost 2 vtrnr LHS, <0,0,0,0> 2014142464U, // <1,0,u,0>: Cost 2 vtrnr LHS, <0,0,0,0>
2014142474U, // <1,0,u,1>: Cost 2 vtrnr LHS, <0,0,1,1> 2014142474U, // <1,0,u,1>: Cost 2 vtrnr LHS, <0,0,1,1>
67985515U, // <1,0,u,2>: Cost 1 vrev LHS 67985515U, // <1,0,u,2>: Cost 1 vrev LHS
2091753473U, // <1,0,u,3>: Cost 2 ins <1,u,1,3>, lane 1 2091753473U, // <1,0,u,3>: Cost 2 ins <1,u,1,3>, lane 1
2091909121U, // <1,0,u,4>: Cost 2 ins <1,u,3,4>, lane 1 2091909121U, // <1,0,u,4>: Cost 2 ins <1,u,3,4>, lane 1
2086633475U, // <1,0,u,5>: Cost 2 ins <1,0,3,u>, lane 3 2086633475U, // <1,0,u,5>: Cost 2 ins <1,0,3,u>, lane 3
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
1751551287U, // <1,1,5,u>: Cost 2 vuzpr <1,1,1,1>, RHS 1751551287U, // <1,1,5,u>: Cost 2 vuzpr <1,1,1,1>, RHS
3165839361U, // <1,1,6,0>: Cost 3 ins <1,u,6,0>, lane 1 3165839361U, // <1,1,6,0>: Cost 3 ins <1,u,6,0>, lane 1
2087608322U, // <1,1,6,1>: Cost 2 ins <1,1,u,1>, lane 2 2087608322U, // <1,1,6,1>: Cost 2 ins <1,1,u,1>, lane 2
2973485206U, // <1,1,6,2>: Cost 3 vzipr <3,4,1,6>, <3,0,1,2> 2973485206U, // <1,1,6,2>: Cost 3 vzipr <3,4,1,6>, <3,0,1,2>
2087624706U, // <1,1,6,3>: Cost 2 ins <1,1,u,3>, lane 2 2087624706U, // <1,1,6,3>: Cost 2 ins <1,1,u,3>, lane 2
2221572948U, // <1,1,6,4>: Cost 3 vrev <1,1,4,6> 2221572948U, // <1,1,6,4>: Cost 3 vrev <1,1,4,6>
2955567442U, // <1,1,6,5>: Cost 3 vzipr <0,4,1,6>, <0,4,1,5> 2955567442U, // <1,1,6,5>: Cost 3 vzipr <0,4,1,6>, <0,4,1,5>
2014126185U, // <1,1,6,6>: Cost 2 vtrnr <0,1,2,6>, <0,1,2,6> 2014126185U, // <1,1,6,6>: Cost 2 vtrnr <0,1,2,6>, <0,1,2,6>
2129313792U, // <1,1,6,7>: Cost 2 ins <u,1,6,7>, lane 0 2087665669U, // <1,1,6,7>: Cost 2 ins <1,1,u,u>, lane 5
2087624706U, // <1,1,6,u>: Cost 2 ins <1,1,u,3>, lane 2 2087624706U, // <1,1,6,u>: Cost 2 ins <1,1,u,3>, lane 2
2670416890U, // <1,1,7,0>: Cost 3 vext2 <u,u,1,1>, <7,0,1,2> 2670416890U, // <1,1,7,0>: Cost 3 vext2 <u,u,1,1>, <7,0,1,2>
2087608322U, // <1,1,7,1>: Cost 2 ins <1,1,u,1>, lane 2 2087608322U, // <1,1,7,1>: Cost 2 ins <1,1,u,1>, lane 2
3203088384U, // <1,1,7,2>: Cost 3 ins <u,1,7,2>, lane 0 3203088384U, // <1,1,7,2>: Cost 3 ins <u,1,7,2>, lane 0
2129354752U, // <1,1,7,3>: Cost 2 ins <u,1,7,3>, lane 0 2129354752U, // <1,1,7,3>: Cost 2 ins <u,1,7,3>, lane 0
2670417254U, // <1,1,7,4>: Cost 3 vext2 <u,u,1,1>, <7,4,5,6> 2670417254U, // <1,1,7,4>: Cost 3 vext2 <u,u,1,1>, <7,4,5,6>
2221654878U, // <1,1,7,5>: Cost 3 vrev <1,1,5,7> 2221654878U, // <1,1,7,5>: Cost 3 vrev <1,1,5,7>
3161391106U, // <1,1,7,6>: Cost 3 ins <1,1,u,6>, lane 2 3161391106U, // <1,1,7,6>: Cost 3 ins <1,1,u,6>, lane 2
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Linesstatic const unsigned PerfectShuffleTable[6561 + 1] = {
1881817195U, // <1,2,5,u>: Cost 2 vzipr <0,4,1,5>, LHS 1881817195U, // <1,2,5,u>: Cost 2 vzipr <0,4,1,5>, LHS
2088263682U, // <1,2,6,0>: Cost 2 ins <1,2,u,0>, lane 2 2088263682U, // <1,2,6,0>: Cost 2 ins <1,2,u,0>, lane 2
3162013698U, // <1,2,6,1>: Cost 3 ins <1,2,u,1>, lane 2 3162013698U, // <1,2,6,1>: Cost 3 ins <1,2,u,1>, lane 2
2659144186U, // <1,2,6,2>: Cost 3 vext2 <7,0,1,2>, <6,2,7,3> 2659144186U, // <1,2,6,2>: Cost 3 vext2 <7,0,1,2>, <6,2,7,3>
2954240102U, // <1,2,6,3>: Cost 3 vzipr <0,2,1,6>, LHS 2954240102U, // <1,2,6,3>: Cost 3 vzipr <0,2,1,6>, LHS
2088296450U, // <1,2,6,4>: Cost 2 ins <1,2,u,4>, lane 2 2088296450U, // <1,2,6,4>: Cost 2 ins <1,2,u,4>, lane 2
3162046466U, // <1,2,6,5>: Cost 3 ins <1,2,u,5>, lane 2 3162046466U, // <1,2,6,5>: Cost 3 ins <1,2,u,5>, lane 2
2895914938U, // <1,2,6,6>: Cost 3 vzipl <1,6,3,7>, <2,6,3,7> 2895914938U, // <1,2,6,6>: Cost 3 vzipl <1,6,3,7>, <2,6,3,7>
2129977344U, // <1,2,6,7>: Cost 2 ins <u,2,6,7>, lane 0 2088329221U, // <1,2,6,7>: Cost 2 ins <1,2,u,u>, lane 5
2088263682U, // <1,2,6,u>: Cost 2 ins <1,2,u,0>, lane 2 2088263682U, // <1,2,6,u>: Cost 2 ins <1,2,u,0>, lane 2
1585402874U, // <1,2,7,0>: Cost 2 vext2 <7,0,1,2>, <7,0,1,2> 1585402874U, // <1,2,7,0>: Cost 2 vext2 <7,0,1,2>, <7,0,1,2>
3203743744U, // <1,2,7,1>: Cost 3 ins <u,2,7,1>, lane 0 3203743744U, // <1,2,7,1>: Cost 3 ins <u,2,7,1>, lane 0
3203751936U, // <1,2,7,2>: Cost 3 ins <u,2,7,2>, lane 0 3203751936U, // <1,2,7,2>: Cost 3 ins <u,2,7,2>, lane 0
2130018304U, // <1,2,7,3>: Cost 2 ins <u,2,7,3>, lane 0 2130018304U, // <1,2,7,3>: Cost 2 ins <u,2,7,3>, lane 0
2088296450U, // <1,2,7,4>: Cost 2 ins <1,2,u,4>, lane 2 2088296450U, // <1,2,7,4>: Cost 2 ins <1,2,u,4>, lane 2
3203776512U, // <1,2,7,5>: Cost 3 ins <u,2,7,5>, lane 0 3203776512U, // <1,2,7,5>: Cost 3 ins <u,2,7,5>, lane 0
3203784704U, // <1,2,7,6>: Cost 3 ins <u,2,7,6>, lane 0 3203784704U, // <1,2,7,6>: Cost 3 ins <u,2,7,6>, lane 0
▲ Show 20 Lines • Show All 129 Lines • ▼ Show 20 Lines
2557100882U, // <1,4,4,1>: Cost 3 vext1 <1,1,4,4>, <1,1,4,4> 2557100882U, // <1,4,4,1>: Cost 3 vext1 <1,1,4,4>, <1,1,4,4>
3165708289U, // <1,4,4,2>: Cost 3 ins <1,u,4,2>, lane 1 3165708289U, // <1,4,4,2>: Cost 3 ins <1,u,4,2>, lane 1
2819416409U, // <1,4,4,3>: Cost 3 vuzpr <0,1,2,4>, <0,4,2,3> 2819416409U, // <1,4,4,3>: Cost 3 vuzpr <0,1,2,4>, <0,4,2,3>
2131132416U, // <1,4,4,4>: Cost 2 ins <u,4,4,4>, lane 0 2131132416U, // <1,4,4,4>: Cost 2 ins <u,4,4,4>, lane 0
2619346230U, // <1,4,4,5>: Cost 3 vext2 <0,3,1,4>, RHS 2619346230U, // <1,4,4,5>: Cost 3 vext2 <0,3,1,4>, RHS
2758438198U, // <1,4,4,6>: Cost 3 vuzpl <1,1,4,5>, RHS 2758438198U, // <1,4,4,6>: Cost 3 vuzpl <1,1,4,5>, RHS
2819419365U, // <1,4,4,7>: Cost 3 vuzpr <0,1,2,4>, <4,4,6,7> 2819419365U, // <1,4,4,7>: Cost 3 vuzpr <0,1,2,4>, <4,4,6,7>
2131132416U, // <1,4,4,u>: Cost 2 ins <u,4,4,4>, lane 0 2131132416U, // <1,4,4,u>: Cost 2 ins <u,4,4,4>, lane 0
2557108326U, // <1,4,5,0>: Cost 3 vext1 <1,1,4,5>, LHS 1477394554U, // <1,4,5,0>: Cost 2 vext1 <0,1,4,5>, <0,1,4,5>
2955558949U, // <1,4,5,1>: Cost 3 vzipr <0,4,1,5>, <0,0,4,1> 2955558949U, // <1,4,5,1>: Cost 3 vzipr <0,4,1,5>, <0,0,4,1>
3204931584U, // <1,4,5,2>: Cost 3 ins <u,4,5,2>, lane 0 3204931584U, // <1,4,5,2>: Cost 3 ins <u,4,5,2>, lane 0
3165790209U, // <1,4,5,3>: Cost 3 ins <1,u,5,3>, lane 1 3165790209U, // <1,4,5,3>: Cost 3 ins <1,u,5,3>, lane 1
2557111606U, // <1,4,5,4>: Cost 3 vext1 <1,1,4,5>, RHS 1477397814U, // <1,4,5,4>: Cost 2 vext1 <0,1,4,5>, RHS
1821510966U, // <1,4,5,5>: Cost 2 vzipl <1,5,3,7>, RHS 1821510966U, // <1,4,5,5>: Cost 2 vzipl <1,5,3,7>, RHS
1616006454U, // <1,4,5,6>: Cost 2 vext3 <0,u,1,1>, RHS 1616006454U, // <1,4,5,6>: Cost 2 vext3 <0,u,1,1>, RHS
2092081153U, // <1,4,5,7>: Cost 2 ins <1,u,5,7>, lane 1 2092081153U, // <1,4,5,7>: Cost 2 ins <1,u,5,7>, lane 1
1616006472U, // <1,4,5,u>: Cost 2 vext3 <0,u,1,1>, RHS 1616006472U, // <1,4,5,u>: Cost 2 vext3 <0,u,1,1>, RHS
2557116518U, // <1,4,6,0>: Cost 3 vext1 <1,1,4,6>, LHS 2557116518U, // <1,4,6,0>: Cost 3 vext1 <1,1,4,6>, LHS
2557117268U, // <1,4,6,1>: Cost 3 vext1 <1,1,4,6>, <1,1,4,6> 2557117268U, // <1,4,6,1>: Cost 3 vext1 <1,1,4,6>, <1,1,4,6>
3165855745U, // <1,4,6,2>: Cost 3 ins <1,u,6,2>, lane 1 3165855745U, // <1,4,6,2>: Cost 3 ins <1,u,6,2>, lane 1
2569062662U, // <1,4,6,3>: Cost 3 vext1 <3,1,4,6>, <3,1,4,6> 2569062662U, // <1,4,6,3>: Cost 3 vext1 <3,1,4,6>, <3,1,4,6>
Show All 36 Lines
2620015677U, // <1,5,1,4>: Cost 3 vext2 <0,4,1,5>, <1,4,3,5> 2620015677U, // <1,5,1,4>: Cost 3 vext2 <0,4,1,5>, <1,4,3,5>
1686111232U, // <1,5,1,5>: Cost 2 vuzpl <1,3,5,7>, <1,3,5,7> 1686111232U, // <1,5,1,5>: Cost 2 vuzpl <1,3,5,7>, <1,3,5,7>
2958181456U, // <1,5,1,6>: Cost 3 vzipr <0,u,1,1>, <1,4,5,6> 2958181456U, // <1,5,1,6>: Cost 3 vzipr <0,u,1,1>, <1,4,5,6>
2019986742U, // <1,5,1,7>: Cost 2 vtrnr <1,1,1,1>, RHS 2019986742U, // <1,5,1,7>: Cost 2 vtrnr <1,1,1,1>, RHS
2019986743U, // <1,5,1,u>: Cost 2 vtrnr <1,1,1,1>, RHS 2019986743U, // <1,5,1,u>: Cost 2 vtrnr <1,1,1,1>, RHS
2759853734U, // <1,5,2,0>: Cost 3 vuzpl <1,3,5,7>, <2,3,0,1> 2759853734U, // <1,5,2,0>: Cost 3 vuzpl <1,3,5,7>, <2,3,0,1>
2620016163U, // <1,5,2,1>: Cost 3 vext2 <0,4,1,5>, <2,1,3,5> 2620016163U, // <1,5,2,1>: Cost 3 vext2 <0,4,1,5>, <2,1,3,5>
2620016232U, // <1,5,2,2>: Cost 3 vext2 <0,4,1,5>, <2,2,2,2> 2620016232U, // <1,5,2,2>: Cost 3 vext2 <0,4,1,5>, <2,2,2,2>
2131640320U, // <1,5,2,3>: Cost 2 ins <u,5,2,3>, lane 0 2090319877U, // <1,5,2,3>: Cost 2 ins <1,5,u,u>, lane 5
2759853774U, // <1,5,2,4>: Cost 3 vuzpl <1,3,5,7>, <2,3,4,5> 2759853774U, // <1,5,2,4>: Cost 3 vuzpl <1,3,5,7>, <2,3,4,5>
2994687194U, // <1,5,2,5>: Cost 3 vzipr <7,0,1,2>, <4,4,5,5> 2994687194U, // <1,5,2,5>: Cost 3 vzipr <7,0,1,2>, <4,4,5,5>
2620016570U, // <1,5,2,6>: Cost 3 vext2 <0,4,1,5>, <2,6,3,7> 2620016570U, // <1,5,2,6>: Cost 3 vext2 <0,4,1,5>, <2,6,3,7>
2090311682U, // <1,5,2,7>: Cost 2 ins <1,5,u,7>, lane 2 2090311682U, // <1,5,2,7>: Cost 2 ins <1,5,u,7>, lane 2
2090311682U, // <1,5,2,u>: Cost 2 ins <1,5,u,7>, lane 2 2090319877U, // <1,5,2,u>: Cost 2 ins <1,5,u,u>, lane 5
2091876353U, // <1,5,3,0>: Cost 2 ins <1,u,3,0>, lane 1 2091876353U, // <1,5,3,0>: Cost 2 ins <1,u,3,0>, lane 1
2089951235U, // <1,5,3,1>: Cost 2 ins <1,5,3,u>, lane 3 2089951235U, // <1,5,3,1>: Cost 2 ins <1,5,3,u>, lane 3
2091892737U, // <1,5,3,2>: Cost 2 ins <1,u,3,2>, lane 1 2091892737U, // <1,5,3,2>: Cost 2 ins <1,u,3,2>, lane 1
2091900929U, // <1,5,3,3>: Cost 2 ins <1,u,3,3>, lane 1 2091900929U, // <1,5,3,3>: Cost 2 ins <1,u,3,3>, lane 1
2091909121U, // <1,5,3,4>: Cost 2 ins <1,u,3,4>, lane 1 2091909121U, // <1,5,3,4>: Cost 2 ins <1,u,3,4>, lane 1
2061881348U, // <1,5,3,5>: Cost 2 vtrnr LHS, <5,5,5,5> 2061881348U, // <1,5,3,5>: Cost 2 vtrnr LHS, <5,5,5,5>
2089951235U, // <1,5,3,6>: Cost 2 ins <1,5,3,u>, lane 3 2089951235U, // <1,5,3,6>: Cost 2 ins <1,5,3,u>, lane 3
940363062U, // <1,5,3,7>: Cost 1 vtrnr LHS, RHS 940363062U, // <1,5,3,7>: Cost 1 vtrnr LHS, RHS
▲ Show 20 Lines • Show All 431 Lines • ▼ Show 20 Lines
2129313792U, // <2,1,6,7>: Cost 2 ins <u,1,6,7>, lane 0 2129313792U, // <2,1,6,7>: Cost 2 ins <u,1,6,7>, lane 0
2014937195U, // <2,1,6,u>: Cost 2 vtrnr <0,2,4,6>, LHS 2014937195U, // <2,1,6,u>: Cost 2 vtrnr <0,2,4,6>, LHS
3171885057U, // <2,1,7,0>: Cost 3 ins <2,u,7,0>, lane 1 3171885057U, // <2,1,7,0>: Cost 3 ins <2,u,7,0>, lane 1
3203080192U, // <2,1,7,1>: Cost 3 ins <u,1,7,1>, lane 0 3203080192U, // <2,1,7,1>: Cost 3 ins <u,1,7,1>, lane 0
3001439874U, // <2,1,7,2>: Cost 3 vzipr <u,1,2,7>, <7,u,1,2> 3001439874U, // <2,1,7,2>: Cost 3 vzipr <u,1,2,7>, <7,u,1,2>
2129354752U, // <2,1,7,3>: Cost 2 ins <u,1,7,3>, lane 0 2129354752U, // <2,1,7,3>: Cost 2 ins <u,1,7,3>, lane 0
3171917825U, // <2,1,7,4>: Cost 3 ins <2,u,7,4>, lane 1 3171917825U, // <2,1,7,4>: Cost 3 ins <2,u,7,4>, lane 1
3203112960U, // <2,1,7,5>: Cost 3 ins <u,1,7,5>, lane 0 3203112960U, // <2,1,7,5>: Cost 3 ins <u,1,7,5>, lane 0
3112722537U, // <2,1,7,6>: Cost 3 vtrnr <4,2,6,7>, <0,1,2,6> 2222392248U, // <2,1,7,6>: Cost 3 vrev <1,2,6,7>
3171942401U, // <2,1,7,7>: Cost 3 ins <2,u,7,7>, lane 1 3171942401U, // <2,1,7,7>: Cost 3 ins <2,u,7,7>, lane 1
2129354752U, // <2,1,7,u>: Cost 2 ins <u,1,7,3>, lane 0 2129354752U, // <2,1,7,u>: Cost 2 ins <u,1,7,3>, lane 0
2128961536U, // <2,1,u,0>: Cost 2 ins <u,1,2,0>, lane 0 2128961536U, // <2,1,u,0>: Cost 2 ins <u,1,2,0>, lane 0
1879924746U, // <2,1,u,1>: Cost 2 vzipr LHS, <0,0,1,1> 1879924746U, // <2,1,u,1>: Cost 2 vzipr LHS, <0,0,1,1>
1879926934U, // <2,1,u,2>: Cost 2 vzipr LHS, <3,0,1,2> 1879926934U, // <2,1,u,2>: Cost 2 vzipr LHS, <3,0,1,2>
1055244288U, // <2,1,u,3>: Cost 1 ins LHS, lane 0 1055244288U, // <2,1,u,3>: Cost 1 ins LHS, lane 0
2128994304U, // <2,1,u,4>: Cost 2 ins <u,1,2,4>, lane 0 2128994304U, // <2,1,u,4>: Cost 2 ins <u,1,2,4>, lane 0
1879925074U, // <2,1,u,5>: Cost 2 vzipr LHS, <0,4,1,5> 1879925074U, // <2,1,u,5>: Cost 2 vzipr LHS, <0,4,1,5>
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
1746177335U, // <2,2,5,u>: Cost 2 vuzpr <0,2,0,2>, RHS 1746177335U, // <2,2,5,u>: Cost 2 vuzpr <0,2,0,2>, RHS
3088679830U, // <2,2,6,0>: Cost 3 vtrnr <0,2,4,6>, <1,2,3,0> 3088679830U, // <2,2,6,0>: Cost 3 vtrnr <0,2,4,6>, <1,2,3,0>
3171819521U, // <2,2,6,1>: Cost 3 ins <2,u,6,1>, lane 1 3171819521U, // <2,2,6,1>: Cost 3 ins <2,u,6,1>, lane 1
2094252034U, // <2,2,6,2>: Cost 2 ins <2,2,u,2>, lane 2 2094252034U, // <2,2,6,2>: Cost 2 ins <2,2,u,2>, lane 2
1881899110U, // <2,2,6,3>: Cost 2 vzipr <0,4,2,6>, LHS 1881899110U, // <2,2,6,3>: Cost 2 vzipr <0,4,2,6>, LHS
3088679078U, // <2,2,6,4>: Cost 3 vtrnr <0,2,4,6>, <0,2,0,4> 3088679078U, // <2,2,6,4>: Cost 3 vtrnr <0,2,4,6>, <0,2,0,4>
3171852289U, // <2,2,6,5>: Cost 3 ins <2,u,6,5>, lane 1 3171852289U, // <2,2,6,5>: Cost 3 ins <2,u,6,5>, lane 1
2014937292U, // <2,2,6,6>: Cost 2 vtrnr <0,2,4,6>, <0,2,4,6> 2014937292U, // <2,2,6,6>: Cost 2 vtrnr <0,2,4,6>, <0,2,4,6>
2129977344U, // <2,2,6,7>: Cost 2 ins <u,2,6,7>, lane 0 2094301189U, // <2,2,6,7>: Cost 2 ins <2,2,u,u>, lane 5
1881899115U, // <2,2,6,u>: Cost 2 vzipr <0,4,2,6>, LHS 1881899115U, // <2,2,6,u>: Cost 2 vzipr <0,4,2,6>, LHS
2726250474U, // <2,2,7,0>: Cost 3 vext3 <7,0,1,2>, <2,7,0,1> 2726250474U, // <2,2,7,0>: Cost 3 vext3 <7,0,1,2>, <2,7,0,1>
2867696462U, // <2,2,7,1>: Cost 3 vuzpr <u,2,0,2>, <6,7,0,1> 2867696462U, // <2,2,7,1>: Cost 3 vuzpr <u,2,0,2>, <6,7,0,1>
2094252034U, // <2,2,7,2>: Cost 2 ins <2,2,u,2>, lane 2 2094252034U, // <2,2,7,2>: Cost 2 ins <2,2,u,2>, lane 2
2130018304U, // <2,2,7,3>: Cost 2 ins <u,2,7,3>, lane 0 2130018304U, // <2,2,7,3>: Cost 2 ins <u,2,7,3>, lane 0
2670499174U, // <2,2,7,4>: Cost 3 vext2 <u,u,2,2>, <7,4,5,6> 2670499174U, // <2,2,7,4>: Cost 3 vext2 <u,u,2,2>, <7,4,5,6>
2228291208U, // <2,2,7,5>: Cost 3 vrev <2,2,5,7> 2228291208U, // <2,2,7,5>: Cost 3 vrev <2,2,5,7>
3203784704U, // <2,2,7,6>: Cost 3 ins <u,2,7,6>, lane 0 3203784704U, // <2,2,7,6>: Cost 3 ins <u,2,7,6>, lane 0
Show All 19 Lines
470598301U, // <2,3,0,u>: Cost 1 vext2 LHS, LHS 470598301U, // <2,3,0,u>: Cost 1 vext2 LHS, LHS
1544340214U, // <2,3,1,0>: Cost 2 vext2 LHS, <1,0,3,2> 1544340214U, // <2,3,1,0>: Cost 2 vext2 LHS, <1,0,3,2>
1544340276U, // <2,3,1,1>: Cost 2 vext2 LHS, <1,1,1,1> 1544340276U, // <2,3,1,1>: Cost 2 vext2 LHS, <1,1,1,1>
1544340374U, // <2,3,1,2>: Cost 2 vext2 LHS, <1,2,3,0> 1544340374U, // <2,3,1,2>: Cost 2 vext2 LHS, <1,2,3,0>
1548985304U, // <2,3,1,3>: Cost 2 vext2 LHS, <1,3,1,3> 1548985304U, // <2,3,1,3>: Cost 2 vext2 LHS, <1,3,1,3>
2551696694U, // <2,3,1,4>: Cost 3 vext1 <0,2,3,1>, RHS 2551696694U, // <2,3,1,4>: Cost 3 vext1 <0,2,3,1>, RHS
1548985488U, // <2,3,1,5>: Cost 2 vext2 LHS, <1,5,3,7> 1548985488U, // <2,3,1,5>: Cost 2 vext2 LHS, <1,5,3,7>
2622727375U, // <2,3,1,6>: Cost 3 vext2 LHS, <1,6,1,7> 2622727375U, // <2,3,1,6>: Cost 3 vext2 LHS, <1,6,1,7>
2665858347U, // <2,3,1,7>: Cost 3 vext2 LHS, <1,7,3,0> 2094956546U, // <2,3,1,7>: Cost 2 ins <2,3,u,7>, lane 2
1548985709U, // <2,3,1,u>: Cost 2 vext2 LHS, <1,u,1,3> 1548985709U, // <2,3,1,u>: Cost 2 vext2 LHS, <1,u,1,3>
2958263190U, // <2,3,2,0>: Cost 3 vzipr <0,u,2,2>, <1,2,3,0> 2094522371U, // <2,3,2,0>: Cost 2 ins <2,3,2,u>, lane 3
2094907394U, // <2,3,2,1>: Cost 2 ins <2,3,u,1>, lane 2 2094907394U, // <2,3,2,1>: Cost 2 ins <2,3,u,1>, lane 2
1544341096U, // <2,3,2,2>: Cost 2 vext2 LHS, <2,2,2,2> 1544341096U, // <2,3,2,2>: Cost 2 vext2 LHS, <2,2,2,2>
1544341158U, // <2,3,2,3>: Cost 2 vext2 LHS, <2,3,0,1> 1059889156U, // <2,3,2,3>: Cost 1 ins LHS, lane 4
2958263194U, // <2,3,2,4>: Cost 3 vzipr <0,u,2,2>, <1,2,3,4> 2094522371U, // <2,3,2,4>: Cost 2 ins <2,3,2,u>, lane 3
2094940162U, // <2,3,2,5>: Cost 2 ins <2,3,u,5>, lane 2 2094940162U, // <2,3,2,5>: Cost 2 ins <2,3,u,5>, lane 2
1548986298U, // <2,3,2,6>: Cost 2 vext2 LHS, <2,6,3,7> 1548986298U, // <2,3,2,6>: Cost 2 vext2 LHS, <2,6,3,7>
3088352256U, // <2,3,2,7>: Cost 3 vtrnr <0,2,0,2>, <1,3,5,7> 2094956546U, // <2,3,2,7>: Cost 2 ins <2,3,u,7>, lane 2
1548986427U, // <2,3,2,u>: Cost 2 vext2 LHS, <2,u,0,1> 1059889156U, // <2,3,2,u>: Cost 1 ins LHS, lane 4
1879884694U, // <2,3,3,0>: Cost 2 vzipr LHS, <1,2,3,0> 1879884694U, // <2,3,3,0>: Cost 2 vzipr LHS, <1,2,3,0>
2094907394U, // <2,3,3,1>: Cost 2 ins <2,3,u,1>, lane 2 2094907394U, // <2,3,3,1>: Cost 2 ins <2,3,u,1>, lane 2
1879884534U, // <2,3,3,2>: Cost 2 vzipr LHS, <1,0,3,2> 1879884534U, // <2,3,3,2>: Cost 2 vzipr LHS, <1,0,3,2>
1544341916U, // <2,3,3,3>: Cost 2 vext2 LHS, <3,3,3,3> 1544341916U, // <2,3,3,3>: Cost 2 vext2 LHS, <3,3,3,3>
1879884698U, // <2,3,3,4>: Cost 2 vzipr LHS, <1,2,3,4> 1879884698U, // <2,3,3,4>: Cost 2 vzipr LHS, <1,2,3,4>
2094940162U, // <2,3,3,5>: Cost 2 ins <2,3,u,5>, lane 2 2094940162U, // <2,3,3,5>: Cost 2 ins <2,3,u,5>, lane 2
2953627415U, // <2,3,3,6>: Cost 3 vzipr LHS, <2,4,3,6> 2953627415U, // <2,3,3,6>: Cost 3 vzipr LHS, <2,4,3,6>
1884529808U, // <2,3,3,7>: Cost 2 vzipr LHS, <1,5,3,7> 1884529808U, // <2,3,3,7>: Cost 2 vzipr LHS, <1,5,3,7>
1879884702U, // <2,3,3,u>: Cost 2 vzipr LHS, <1,2,3,u> 1879884702U, // <2,3,3,u>: Cost 2 vzipr LHS, <1,2,3,u>
1483948134U, // <2,3,4,0>: Cost 2 vext1 <1,2,3,4>, LHS 1483948134U, // <2,3,4,0>: Cost 2 vext1 <1,2,3,4>, LHS
1483948954U, // <2,3,4,1>: Cost 2 vext1 <1,2,3,4>, <1,2,3,4> 1483948954U, // <2,3,4,1>: Cost 2 vext1 <1,2,3,4>, <1,2,3,4>
2094669827U, // <2,3,4,2>: Cost 2 ins <2,3,4,u>, lane 3 2094669827U, // <2,3,4,2>: Cost 2 ins <2,3,4,u>, lane 3
2094669827U, // <2,3,4,3>: Cost 2 ins <2,3,4,u>, lane 3 2094669827U, // <2,3,4,3>: Cost 2 ins <2,3,4,u>, lane 3
1483951414U, // <2,3,4,4>: Cost 2 vext1 <1,2,3,4>, RHS 1483951414U, // <2,3,4,4>: Cost 2 vext1 <1,2,3,4>, RHS
470601014U, // <2,3,4,5>: Cost 1 vext2 LHS, RHS 470601014U, // <2,3,4,5>: Cost 1 vext2 LHS, RHS
1691241782U, // <2,3,4,6>: Cost 2 vuzpl <2,2,3,3>, RHS 1691241782U, // <2,3,4,6>: Cost 2 vuzpl <2,2,3,3>, RHS
2094669827U, // <2,3,4,7>: Cost 2 ins <2,3,4,u>, lane 3 2094669827U, // <2,3,4,7>: Cost 2 ins <2,3,4,u>, lane 3
470601257U, // <2,3,4,u>: Cost 1 vext2 LHS, RHS 470601257U, // <2,3,4,u>: Cost 1 vext2 LHS, RHS
2551726274U, // <2,3,5,0>: Cost 3 vext1 <0,2,3,5>, <0,2,3,5> 2551726274U, // <2,3,5,0>: Cost 3 vext1 <0,2,3,5>, <0,2,3,5>
1592118992U, // <2,3,5,1>: Cost 2 vext2 LHS, <5,1,7,3> 1592118992U, // <2,3,5,1>: Cost 2 vext2 LHS, <5,1,7,3>
2665860843U, // <2,3,5,2>: Cost 3 vext2 LHS, <5,2,1,3> 2665860843U, // <2,3,5,2>: Cost 3 vext2 LHS, <5,2,1,3>
2551728642U, // <2,3,5,3>: Cost 3 vext1 <0,2,3,5>, <3,4,5,6> 2094923778U, // <2,3,5,3>: Cost 2 ins <2,3,u,3>, lane 2
1592119238U, // <2,3,5,4>: Cost 2 vext2 LHS, <5,4,7,6> 1592119238U, // <2,3,5,4>: Cost 2 vext2 LHS, <5,4,7,6>
1592119300U, // <2,3,5,5>: Cost 2 vext2 LHS, <5,5,5,5> 1592119300U, // <2,3,5,5>: Cost 2 vext2 LHS, <5,5,5,5>
1592119394U, // <2,3,5,6>: Cost 2 vext2 LHS, <5,6,7,0> 1592119394U, // <2,3,5,6>: Cost 2 vext2 LHS, <5,6,7,0>
1758350646U, // <2,3,5,7>: Cost 2 vuzpr <2,2,3,3>, RHS 1758350646U, // <2,3,5,7>: Cost 2 vuzpr <2,2,3,3>, RHS
1758350647U, // <2,3,5,u>: Cost 2 vuzpr <2,2,3,3>, RHS 1758350647U, // <2,3,5,u>: Cost 2 vuzpr <2,2,3,3>, RHS
2955641750U, // <2,3,6,0>: Cost 3 vzipr <0,4,2,6>, <1,2,3,0> 2094817283U, // <2,3,6,0>: Cost 2 ins <2,3,6,u>, lane 3
2094907394U, // <2,3,6,1>: Cost 2 ins <2,3,u,1>, lane 2 2094907394U, // <2,3,6,1>: Cost 2 ins <2,3,u,1>, lane 2
1592119802U, // <2,3,6,2>: Cost 2 vext2 LHS, <6,2,7,3> 1592119802U, // <2,3,6,2>: Cost 2 vext2 LHS, <6,2,7,3>
3088679896U, // <2,3,6,3>: Cost 3 vtrnr <0,2,4,6>, <1,3,1,3> 2094923778U, // <2,3,6,3>: Cost 2 ins <2,3,u,3>, lane 2
2955641754U, // <2,3,6,4>: Cost 3 vzipr <0,4,2,6>, <1,2,3,4> 2094817283U, // <2,3,6,4>: Cost 2 ins <2,3,6,u>, lane 3
2094940162U, // <2,3,6,5>: Cost 2 ins <2,3,u,5>, lane 2 2094940162U, // <2,3,6,5>: Cost 2 ins <2,3,u,5>, lane 2
1592120120U, // <2,3,6,6>: Cost 2 vext2 LHS, <6,6,6,6> 1592120120U, // <2,3,6,6>: Cost 2 vext2 LHS, <6,6,6,6>
1592120142U, // <2,3,6,7>: Cost 2 vext2 LHS, <6,7,0,1> 1060216836U, // <2,3,6,7>: Cost 1 ins RHS, lane 4
1592120223U, // <2,3,6,u>: Cost 2 vext2 LHS, <6,u,0,1> 1060216836U, // <2,3,6,u>: Cost 1 ins RHS, lane 4
1592120314U, // <2,3,7,0>: Cost 2 vext2 LHS, <7,0,1,2> 1592120314U, // <2,3,7,0>: Cost 2 vext2 LHS, <7,0,1,2>
2094907394U, // <2,3,7,1>: Cost 2 ins <2,3,u,1>, lane 2 2094907394U, // <2,3,7,1>: Cost 2 ins <2,3,u,1>, lane 2
2974892790U, // <2,3,7,2>: Cost 3 vzipr <3,6,2,7>, <1,0,3,2> 2974892790U, // <2,3,7,2>: Cost 3 vzipr <3,6,2,7>, <1,0,3,2>
2856276096U, // <2,3,7,3>: Cost 3 vuzpr <6,2,7,3>, <5,7,1,3> 2133999620U, // <2,3,7,3>: Cost 2 ins <u,u,7,3>, lane 4
1592120678U, // <2,3,7,4>: Cost 2 vext2 LHS, <7,4,5,6> 1592120678U, // <2,3,7,4>: Cost 2 vext2 LHS, <7,4,5,6>
2094940162U, // <2,3,7,5>: Cost 2 ins <2,3,u,5>, lane 2 2094940162U, // <2,3,7,5>: Cost 2 ins <2,3,u,5>, lane 2
2767672522U, // <2,3,7,6>: Cost 3 vuzpl <2,6,3,7>, <7,2,6,3> 2134024196U, // <2,3,7,6>: Cost 2 ins <u,u,7,6>, lane 4
1592120940U, // <2,3,7,7>: Cost 2 vext2 LHS, <7,7,7,7> 1592120940U, // <2,3,7,7>: Cost 2 vext2 LHS, <7,7,7,7>
1592120962U, // <2,3,7,u>: Cost 2 vext2 LHS, <7,u,1,2> 1592120962U, // <2,3,7,u>: Cost 2 vext2 LHS, <7,u,1,2>
1879925654U, // <2,3,u,0>: Cost 2 vzipr LHS, <1,2,3,0> 1879925654U, // <2,3,u,0>: Cost 2 vzipr LHS, <1,2,3,0>
470603566U, // <2,3,u,1>: Cost 1 vext2 LHS, LHS 470603566U, // <2,3,u,1>: Cost 1 vext2 LHS, LHS
1879925494U, // <2,3,u,2>: Cost 2 vzipr LHS, <1,0,3,2> 1879925494U, // <2,3,u,2>: Cost 2 vzipr LHS, <1,0,3,2>
1879925576U, // <2,3,u,3>: Cost 2 vzipr LHS, <1,1,3,3> 1059889156U, // <2,3,u,3>: Cost 1 ins LHS, lane 4
1879925658U, // <2,3,u,4>: Cost 2 vzipr LHS, <1,2,3,4> 1879925658U, // <2,3,u,4>: Cost 2 vzipr LHS, <1,2,3,4>
470603930U, // <2,3,u,5>: Cost 1 vext2 LHS, RHS 470603930U, // <2,3,u,5>: Cost 1 vext2 LHS, RHS
1548990672U, // <2,3,u,6>: Cost 2 vext2 LHS, <u,6,3,7> 1548990672U, // <2,3,u,6>: Cost 2 vext2 LHS, <u,6,3,7>
1879925904U, // <2,3,u,7>: Cost 2 vzipr LHS, <1,5,3,7> 1060216836U, // <2,3,u,7>: Cost 1 ins RHS, lane 4
470604133U, // <2,3,u,u>: Cost 1 vext2 LHS, LHS 470604133U, // <2,3,u,u>: Cost 1 vext2 LHS, LHS
2826125312U, // <2,4,0,0>: Cost 3 vuzpr <1,2,3,4>, <0,0,0,0> 2826125312U, // <2,4,0,0>: Cost 3 vuzpr <1,2,3,4>, <0,0,0,0>
2097635329U, // <2,4,0,1>: Cost 2 ins <2,u,0,1>, lane 1 2097635329U, // <2,4,0,1>: Cost 2 ins <2,u,0,1>, lane 1
1691992166U, // <2,4,0,2>: Cost 2 vuzpl <2,3,4,5>, LHS 1691992166U, // <2,4,0,2>: Cost 2 vuzpl <2,3,4,5>, LHS
3171393537U, // <2,4,0,3>: Cost 3 ins <2,u,0,3>, lane 1 3171393537U, // <2,4,0,3>: Cost 3 ins <2,u,0,3>, lane 1
2765734092U, // <2,4,0,4>: Cost 3 vuzpl <2,3,4,5>, <0,2,4,6> 2765734092U, // <2,4,0,4>: Cost 3 vuzpl <2,3,4,5>, <0,2,4,6>
3094528338U, // <2,4,0,5>: Cost 3 vtrnr <1,2,3,0>, <0,4,1,5> 3094528338U, // <2,4,0,5>: Cost 3 vtrnr <1,2,3,0>, <0,4,1,5>
1960103222U, // <2,4,0,6>: Cost 2 vtrnl <2,3,0,1>, RHS 1960103222U, // <2,4,0,6>: Cost 2 vtrnl <2,3,0,1>, RHS
▲ Show 20 Lines • Show All 168 Lines • ▼ Show 20 Lines
2620097598U, // <2,6,1,4>: Cost 3 vext2 <0,4,2,6>, <1,4,3,6> 2620097598U, // <2,6,1,4>: Cost 3 vext2 <0,4,2,6>, <1,4,3,6>
2620097680U, // <2,6,1,5>: Cost 3 vext2 <0,4,2,6>, <1,5,3,7> 2620097680U, // <2,6,1,5>: Cost 3 vext2 <0,4,2,6>, <1,5,3,7>
3205996544U, // <2,6,1,6>: Cost 3 ins <u,6,1,6>, lane 0 3205996544U, // <2,6,1,6>: Cost 3 ins <u,6,1,6>, lane 0
2096947202U, // <2,6,1,7>: Cost 2 ins <2,6,u,7>, lane 2 2096947202U, // <2,6,1,7>: Cost 2 ins <2,6,u,7>, lane 2
1746501739U, // <2,6,1,u>: Cost 2 vuzpr <0,2,4,6>, LHS 1746501739U, // <2,6,1,u>: Cost 2 vuzpr <0,2,4,6>, LHS
2820244374U, // <2,6,2,0>: Cost 3 vuzpr <0,2,4,6>, <1,2,3,0> 2820244374U, // <2,6,2,0>: Cost 3 vuzpr <0,2,4,6>, <1,2,3,0>
3171524609U, // <2,6,2,1>: Cost 3 ins <2,u,2,1>, lane 1 3171524609U, // <2,6,2,1>: Cost 3 ins <2,u,2,1>, lane 1
2097790977U, // <2,6,2,2>: Cost 2 ins <2,u,2,2>, lane 1 2097790977U, // <2,6,2,2>: Cost 2 ins <2,u,2,2>, lane 1
2132303872U, // <2,6,2,3>: Cost 2 ins <u,6,2,3>, lane 0 2096955397U, // <2,6,2,3>: Cost 2 ins <2,6,u,u>, lane 5
2820243622U, // <2,6,2,4>: Cost 3 vuzpr <0,2,4,6>, <0,2,0,4> 2820243622U, // <2,6,2,4>: Cost 3 vuzpr <0,2,4,6>, <0,2,0,4>
3171557377U, // <2,6,2,5>: Cost 3 ins <2,u,2,5>, lane 1 3171557377U, // <2,6,2,5>: Cost 3 ins <2,u,2,5>, lane 1
1746501836U, // <2,6,2,6>: Cost 2 vuzpr <0,2,4,6>, <0,2,4,6> 1746501836U, // <2,6,2,6>: Cost 2 vuzpr <0,2,4,6>, <0,2,4,6>
1884523830U, // <2,6,2,7>: Cost 2 vzipr <0,u,2,2>, RHS 1884523830U, // <2,6,2,7>: Cost 2 vzipr <0,u,2,2>, RHS
1884523831U, // <2,6,2,u>: Cost 2 vzipr <0,u,2,2>, RHS 1884523831U, // <2,6,2,u>: Cost 2 vzipr <0,u,2,2>, RHS
2096586755U, // <2,6,3,0>: Cost 2 ins <2,6,3,u>, lane 3 2096586755U, // <2,6,3,0>: Cost 2 ins <2,6,3,u>, lane 3
2096586755U, // <2,6,3,1>: Cost 2 ins <2,6,3,u>, lane 3 2096586755U, // <2,6,3,1>: Cost 2 ins <2,6,3,u>, lane 3
1927662492U, // <2,6,3,2>: Cost 2 vzipr LHS, <4,0,6,2> 1927662492U, // <2,6,3,2>: Cost 2 vzipr LHS, <4,0,6,2>
▲ Show 20 Lines • Show All 185 Lines • ▼ Show 20 Lines
1611962540U, // <2,u,5,u>: Cost 2 vext3 <0,2,0,2>, RHS 1611962540U, // <2,u,5,u>: Cost 2 vext3 <0,2,0,2>, RHS
1478361328U, // <2,u,6,0>: Cost 2 vext1 <0,2,u,6>, <0,2,u,6> 1478361328U, // <2,u,6,0>: Cost 2 vext1 <0,2,u,6>, <0,2,u,6>
1828149038U, // <2,u,6,1>: Cost 2 vzipl <2,6,3,7>, LHS 1828149038U, // <2,u,6,1>: Cost 2 vzipl <2,6,3,7>, LHS
1592160762U, // <2,u,6,2>: Cost 2 vext2 LHS, <6,2,7,3> 1592160762U, // <2,u,6,2>: Cost 2 vext2 LHS, <6,2,7,3>
2014937757U, // <2,u,6,3>: Cost 2 vtrnr <0,2,4,6>, LHS 2014937757U, // <2,u,6,3>: Cost 2 vtrnr <0,2,4,6>, LHS
1478364470U, // <2,u,6,4>: Cost 2 vext1 <0,2,u,6>, RHS 1478364470U, // <2,u,6,4>: Cost 2 vext1 <0,2,u,6>, RHS
1828149402U, // <2,u,6,5>: Cost 2 vzipl <2,6,3,7>, RHS 1828149402U, // <2,u,6,5>: Cost 2 vzipl <2,6,3,7>, RHS
1592161080U, // <2,u,6,6>: Cost 2 vext2 LHS, <6,6,6,6> 1592161080U, // <2,u,6,6>: Cost 2 vext2 LHS, <6,6,6,6>
1058226176U, // <2,u,6,7>: Cost 1 ins RHS, lane 0 1060216836U, // <2,u,6,7>: Cost 1 ins RHS, lane 4
1058226176U, // <2,u,6,u>: Cost 1 ins RHS, lane 0 1060216836U, // <2,u,6,u>: Cost 1 ins RHS, lane 4
1592161274U, // <2,u,7,0>: Cost 2 vext2 LHS, <7,0,1,2> 1592161274U, // <2,u,7,0>: Cost 2 vext2 LHS, <7,0,1,2>
2094907394U, // <2,u,7,1>: Cost 2 ins <2,3,u,1>, lane 2 2094907394U, // <2,u,7,1>: Cost 2 ins <2,3,u,1>, lane 2
2094252034U, // <2,u,7,2>: Cost 2 ins <2,2,u,2>, lane 2 2094252034U, // <2,u,7,2>: Cost 2 ins <2,2,u,2>, lane 2
2129354752U, // <2,u,7,3>: Cost 2 ins <u,1,7,3>, lane 0 2129354752U, // <2,u,7,3>: Cost 2 ins <u,1,7,3>, lane 0
1592161638U, // <2,u,7,4>: Cost 2 vext2 LHS, <7,4,5,6> 1592161638U, // <2,u,7,4>: Cost 2 vext2 LHS, <7,4,5,6>
2094940162U, // <2,u,7,5>: Cost 2 ins <2,3,u,5>, lane 2 2094940162U, // <2,u,7,5>: Cost 2 ins <2,3,u,5>, lane 2
2131369984U, // <2,u,7,6>: Cost 2 ins <u,4,7,6>, lane 0 2134024196U, // <2,u,7,6>: Cost 2 ins <u,u,7,6>, lane 4
1592161900U, // <2,u,7,7>: Cost 2 vext2 LHS, <7,7,7,7> 1592161900U, // <2,u,7,7>: Cost 2 vext2 LHS, <7,7,7,7>
1592161922U, // <2,u,7,u>: Cost 2 vext2 LHS, <7,u,1,2> 1592161922U, // <2,u,7,u>: Cost 2 vext2 LHS, <7,u,1,2>
1879925699U, // <2,u,u,0>: Cost 2 vzipr LHS, <1,2,u,0> 1879925699U, // <2,u,u,0>: Cost 2 vzipr LHS, <1,2,u,0>
470644526U, // <2,u,u,1>: Cost 1 vext2 LHS, LHS 470644526U, // <2,u,u,1>: Cost 1 vext2 LHS, LHS
269271142U, // <2,u,u,2>: Cost 1 vdup2 LHS 269271142U, // <2,u,u,2>: Cost 1 vdup2 LHS
806183068U, // <2,u,u,3>: Cost 1 vzipr LHS, LHS 806183068U, // <2,u,u,3>: Cost 1 vzipr LHS, LHS
1879925703U, // <2,u,u,4>: Cost 2 vzipr LHS, <1,2,u,4> 1879925703U, // <2,u,u,4>: Cost 2 vzipr LHS, <1,2,u,4>
470644890U, // <2,u,u,5>: Cost 1 vext2 LHS, RHS 470644890U, // <2,u,u,5>: Cost 1 vext2 LHS, RHS
Show All 16 Lines
1490341174U, // <3,0,1,4>: Cost 2 vext1 <2,3,0,1>, RHS 1490341174U, // <3,0,1,4>: Cost 2 vext1 <2,3,0,1>, RHS
2098429955U, // <3,0,1,5>: Cost 2 ins <3,0,1,u>, lane 3 2098429955U, // <3,0,1,5>: Cost 2 ins <3,0,1,u>, lane 3
2098429955U, // <3,0,1,6>: Cost 2 ins <3,0,1,u>, lane 3 2098429955U, // <3,0,1,6>: Cost 2 ins <3,0,1,u>, lane 3
2098429955U, // <3,0,1,7>: Cost 2 ins <3,0,1,u>, lane 3 2098429955U, // <3,0,1,7>: Cost 2 ins <3,0,1,u>, lane 3
537706652U, // <3,0,1,u>: Cost 1 vext3 LHS, LHS 537706652U, // <3,0,1,u>: Cost 1 vext3 LHS, LHS
1611890852U, // <3,0,2,0>: Cost 2 vext3 LHS, <0,2,0,2> 1611890852U, // <3,0,2,0>: Cost 2 vext3 LHS, <0,2,0,2>
2685632684U, // <3,0,2,1>: Cost 3 vext3 LHS, <0,2,1,1> 2685632684U, // <3,0,2,1>: Cost 3 vext3 LHS, <0,2,1,1>
2128314368U, // <3,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0 2128314368U, // <3,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0
2128322560U, // <3,0,2,3>: Cost 2 ins <u,0,2,3>, lane 0 2098946053U, // <3,0,2,3>: Cost 2 ins <3,0,u,u>, lane 5
1611890892U, // <3,0,2,4>: Cost 2 vext3 LHS, <0,2,4,6> 1611890892U, // <3,0,2,4>: Cost 2 vext3 LHS, <0,2,4,6>
2959000610U, // <3,0,2,5>: Cost 3 vzipr <1,0,3,2>, <1,4,0,5> 2959000610U, // <3,0,2,5>: Cost 3 vzipr <1,0,3,2>, <1,4,0,5>
2624767930U, // <3,0,2,6>: Cost 3 vext2 <1,2,3,0>, <2,6,3,7> 2624767930U, // <3,0,2,6>: Cost 3 vext2 <1,2,3,0>, <2,6,3,7>
3177545729U, // <3,0,2,7>: Cost 3 ins <3,u,2,7>, lane 1 3177545729U, // <3,0,2,7>: Cost 3 ins <3,u,2,7>, lane 1
1611890924U, // <3,0,2,u>: Cost 2 vext3 LHS, <0,2,u,2> 1611890924U, // <3,0,2,u>: Cost 2 vext3 LHS, <0,2,u,2>
2820636924U, // <3,0,3,0>: Cost 3 vuzpr <0,3,1,0>, <0,3,1,0> 2820636924U, // <3,0,3,0>: Cost 3 vuzpr <0,3,1,0>, <0,3,1,0>
1832091750U, // <3,0,3,1>: Cost 2 vzipl <3,3,3,3>, LHS 1832091750U, // <3,0,3,1>: Cost 2 vzipl <3,3,3,3>, LHS
1966309478U, // <3,0,3,2>: Cost 2 vtrnl <3,3,3,3>, LHS 1966309478U, // <3,0,3,2>: Cost 2 vtrnl <3,3,3,3>, LHS
Show All 23 Lines
1967145116U, // <3,0,5,u>: Cost 2 vtrnl <3,4,5,6>, LHS 1967145116U, // <3,0,5,u>: Cost 2 vtrnl <3,4,5,6>, LHS
3202334720U, // <3,0,6,0>: Cost 3 ins <u,0,6,0>, lane 0 3202334720U, // <3,0,6,0>: Cost 3 ins <u,0,6,0>, lane 0
2907635814U, // <3,0,6,1>: Cost 3 vzipl <3,6,0,7>, LHS 2907635814U, // <3,0,6,1>: Cost 3 vzipl <3,6,0,7>, LHS
2128609280U, // <3,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <3,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0
3177807873U, // <3,0,6,3>: Cost 3 ins <3,u,6,3>, lane 1 3177807873U, // <3,0,6,3>: Cost 3 ins <3,u,6,3>, lane 1
3202367488U, // <3,0,6,4>: Cost 3 ins <u,0,6,4>, lane 0 3202367488U, // <3,0,6,4>: Cost 3 ins <u,0,6,4>, lane 0
3172663298U, // <3,0,6,5>: Cost 3 ins <3,0,u,5>, lane 2 3172663298U, // <3,0,6,5>: Cost 3 ins <3,0,u,5>, lane 2
2666574648U, // <3,0,6,6>: Cost 3 vext2 <u,2,3,0>, <6,6,6,6> 2666574648U, // <3,0,6,6>: Cost 3 vext2 <u,2,3,0>, <6,6,6,6>
2128650240U, // <3,0,6,7>: Cost 2 ins <u,0,6,7>, lane 0 2098946053U, // <3,0,6,7>: Cost 2 ins <3,0,u,u>, lane 5
2128609280U, // <3,0,6,u>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <3,0,6,u>: Cost 2 ins <u,0,6,2>, lane 0
3095396352U, // <3,0,7,0>: Cost 3 vtrnr <1,3,5,7>, <0,0,0,0> 3095396352U, // <3,0,7,0>: Cost 3 vtrnr <1,3,5,7>, <0,0,0,0>
3095396362U, // <3,0,7,1>: Cost 3 vtrnr <1,3,5,7>, <0,0,1,1> 3095396362U, // <3,0,7,1>: Cost 3 vtrnr <1,3,5,7>, <0,0,1,1>
2098896898U, // <3,0,7,2>: Cost 2 ins <3,0,u,2>, lane 2 2098896898U, // <3,0,7,2>: Cost 2 ins <3,0,u,2>, lane 2
3177881601U, // <3,0,7,3>: Cost 3 ins <3,u,7,3>, lane 1 3177881601U, // <3,0,7,3>: Cost 3 ins <3,u,7,3>, lane 1
2666575206U, // <3,0,7,4>: Cost 3 vext2 <u,2,3,0>, <7,4,5,6> 2666575206U, // <3,0,7,4>: Cost 3 vext2 <u,2,3,0>, <7,4,5,6>
3177897985U, // <3,0,7,5>: Cost 3 ins <3,u,7,5>, lane 1 3177897985U, // <3,0,7,5>: Cost 3 ins <3,u,7,5>, lane 1
3202457600U, // <3,0,7,6>: Cost 3 ins <u,0,7,6>, lane 0 3202457600U, // <3,0,7,6>: Cost 3 ins <u,0,7,6>, lane 0
2666575468U, // <3,0,7,7>: Cost 3 vext2 <u,2,3,0>, <7,7,7,7> 2666575468U, // <3,0,7,7>: Cost 3 vext2 <u,2,3,0>, <7,7,7,7>
2098896898U, // <3,0,7,u>: Cost 2 ins <3,0,u,2>, lane 2 2098896898U, // <3,0,7,u>: Cost 2 ins <3,0,u,2>, lane 2
1616093834U, // <3,0,u,0>: Cost 2 vext3 LHS, <0,u,0,2> 1616093834U, // <3,0,u,0>: Cost 2 vext3 LHS, <0,u,0,2>
1611891346U, // <3,0,u,1>: Cost 2 vext3 LHS, <0,u,1,1> 1611891346U, // <3,0,u,1>: Cost 2 vext3 LHS, <0,u,1,1>
537707165U, // <3,0,u,2>: Cost 1 vext3 LHS, LHS 537707165U, // <3,0,u,2>: Cost 1 vext3 LHS, LHS
2098429955U, // <3,0,u,3>: Cost 2 ins <3,0,1,u>, lane 3 2098429955U, // <3,0,u,3>: Cost 2 ins <3,0,1,u>, lane 3
1616093874U, // <3,0,u,4>: Cost 2 vext3 LHS, <0,u,4,6> 1616093874U, // <3,0,u,4>: Cost 2 vext3 LHS, <0,u,4,6>
1551030426U, // <3,0,u,5>: Cost 2 vext2 <1,2,3,0>, RHS 1551030426U, // <3,0,u,5>: Cost 2 vext2 <1,2,3,0>, RHS
2098429955U, // <3,0,u,6>: Cost 2 ins <3,0,1,u>, lane 3 2098429955U, // <3,0,u,6>: Cost 2 ins <3,0,1,u>, lane 3
2098429955U, // <3,0,u,7>: Cost 2 ins <3,0,1,u>, lane 3 2098429955U, // <3,0,u,7>: Cost 2 ins <3,0,1,u>, lane 3
537707219U, // <3,0,u,u>: Cost 1 vext3 LHS, LHS 537707219U, // <3,0,u,u>: Cost 1 vext3 LHS, LHS
2552201468U, // <3,1,0,0>: Cost 3 vext1 <0,3,1,0>, <0,3,1,0> 2552201468U, // <3,1,0,0>: Cost 3 vext1 <0,3,1,0>, <0,3,1,0>
2618802278U, // <3,1,0,1>: Cost 3 vext2 <0,2,3,1>, LHS 2128822272U, // <3,1,0,1>: Cost 2 ins <u,1,0,1>, lane 0
1695727718U, // <3,1,0,2>: Cost 2 vuzpl <3,0,1,2>, LHS 1695727718U, // <3,1,0,2>: Cost 2 vuzpl <3,0,1,2>, LHS
1611449078U, // <3,1,0,3>: Cost 2 vext3 LHS, <1,0,3,2> 1611449078U, // <3,1,0,3>: Cost 2 vext3 LHS, <1,0,3,2>
2552204598U, // <3,1,0,4>: Cost 3 vext1 <0,3,1,0>, RHS 2552204598U, // <3,1,0,4>: Cost 3 vext1 <0,3,1,0>, RHS
2960310610U, // <3,1,0,5>: Cost 3 vzipr <1,2,3,0>, <0,4,1,5> 2960310610U, // <3,1,0,5>: Cost 3 vzipr <1,2,3,0>, <0,4,1,5>
2832516572U, // <3,1,0,6>: Cost 3 vuzpr <2,3,0,1>, <2,0,4,6> 2832516572U, // <3,1,0,6>: Cost 3 vuzpr <2,3,0,1>, <2,0,4,6>
3177398273U, // <3,1,0,7>: Cost 3 ins <3,u,0,7>, lane 1 3177398273U, // <3,1,0,7>: Cost 3 ins <3,u,0,7>, lane 1
1611891491U, // <3,1,0,u>: Cost 2 vext3 LHS, <1,0,u,2> 1611891491U, // <3,1,0,u>: Cost 2 vext3 LHS, <1,0,u,2>
2689835819U, // <3,1,1,0>: Cost 3 vext3 LHS, <1,1,0,1> 2689835819U, // <3,1,1,0>: Cost 3 vext3 LHS, <1,1,0,1>
Show All 23 Lines
2689836041U, // <3,1,3,6>: Cost 3 vext3 LHS, <1,3,6,7> 2689836041U, // <3,1,3,6>: Cost 3 vext3 LHS, <1,3,6,7>
2832516096U, // <3,1,3,7>: Cost 3 vuzpr <2,3,0,1>, <1,3,5,7> 2832516096U, // <3,1,3,7>: Cost 3 vuzpr <2,3,0,1>, <1,3,5,7>
1611891735U, // <3,1,3,u>: Cost 2 vext3 LHS, <1,3,u,3> 1611891735U, // <3,1,3,u>: Cost 2 vext3 LHS, <1,3,u,3>
2552234240U, // <3,1,4,0>: Cost 3 vext1 <0,3,1,4>, <0,3,1,4> 2552234240U, // <3,1,4,0>: Cost 3 vext1 <0,3,1,4>, <0,3,1,4>
2960343050U, // <3,1,4,1>: Cost 3 vzipr <1,2,3,4>, <0,0,1,1> 2960343050U, // <3,1,4,1>: Cost 3 vzipr <1,2,3,4>, <0,0,1,1>
2960345238U, // <3,1,4,2>: Cost 3 vzipr <1,2,3,4>, <3,0,1,2> 2960345238U, // <3,1,4,2>: Cost 3 vzipr <1,2,3,4>, <3,0,1,2>
2129133568U, // <3,1,4,3>: Cost 2 ins <u,1,4,3>, lane 0 2129133568U, // <3,1,4,3>: Cost 2 ins <u,1,4,3>, lane 0
2552237366U, // <3,1,4,4>: Cost 3 vext1 <0,3,1,4>, RHS 2552237366U, // <3,1,4,4>: Cost 3 vext1 <0,3,1,4>, RHS
2618805558U, // <3,1,4,5>: Cost 3 vext2 <0,2,3,1>, RHS 2129149952U, // <3,1,4,5>: Cost 2 ins <u,1,4,5>, lane 0
1695730998U, // <3,1,4,6>: Cost 2 vuzpl <3,0,1,2>, RHS 1695730998U, // <3,1,4,6>: Cost 2 vuzpl <3,0,1,2>, RHS
3177693185U, // <3,1,4,7>: Cost 3 ins <3,u,4,7>, lane 1 3177693185U, // <3,1,4,7>: Cost 3 ins <3,u,4,7>, lane 1
1695731016U, // <3,1,4,u>: Cost 2 vuzpl <3,0,1,2>, RHS 1695731016U, // <3,1,4,u>: Cost 2 vuzpl <3,0,1,2>, RHS
2689836143U, // <3,1,5,0>: Cost 3 vext3 LHS, <1,5,0,1> 2689836143U, // <3,1,5,0>: Cost 3 vext3 LHS, <1,5,0,1>
2564187280U, // <3,1,5,1>: Cost 3 vext1 <2,3,1,5>, <1,5,3,7> 2564187280U, // <3,1,5,1>: Cost 3 vext1 <2,3,1,5>, <1,5,3,7>
2564187827U, // <3,1,5,2>: Cost 3 vext1 <2,3,1,5>, <2,3,1,5> 2564187827U, // <3,1,5,2>: Cost 3 vext1 <2,3,1,5>, <2,3,1,5>
1611891856U, // <3,1,5,3>: Cost 2 vext3 LHS, <1,5,3,7> 1611891856U, // <3,1,5,3>: Cost 2 vext3 LHS, <1,5,3,7>
2689836183U, // <3,1,5,4>: Cost 3 vext3 LHS, <1,5,4,5> 2689836183U, // <3,1,5,4>: Cost 3 vext3 LHS, <1,5,4,5>
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
1611892338U, // <3,2,2,3>: Cost 2 vext3 LHS, <2,2,3,3> 1611892338U, // <3,2,2,3>: Cost 2 vext3 LHS, <2,2,3,3>
2689836669U, // <3,2,2,4>: Cost 3 vext3 LHS, <2,2,4,5> 2689836669U, // <3,2,2,4>: Cost 3 vext3 LHS, <2,2,4,5>
2689836680U, // <3,2,2,5>: Cost 3 vext3 LHS, <2,2,5,7> 2689836680U, // <3,2,2,5>: Cost 3 vext3 LHS, <2,2,5,7>
2689836685U, // <3,2,2,6>: Cost 3 vext3 LHS, <2,2,6,3> 2689836685U, // <3,2,2,6>: Cost 3 vext3 LHS, <2,2,6,3>
3177545729U, // <3,2,2,7>: Cost 3 ins <3,u,2,7>, lane 1 3177545729U, // <3,2,2,7>: Cost 3 ins <3,u,2,7>, lane 1
1611892383U, // <3,2,2,u>: Cost 2 vext3 LHS, <2,2,u,3> 1611892383U, // <3,2,2,u>: Cost 2 vext3 LHS, <2,2,u,3>
1611450022U, // <3,2,3,0>: Cost 2 vext3 LHS, <2,3,0,1> 1611450022U, // <3,2,3,0>: Cost 2 vext3 LHS, <2,3,0,1>
2685191854U, // <3,2,3,1>: Cost 3 vext3 LHS, <2,3,1,0> 2685191854U, // <3,2,3,1>: Cost 3 vext3 LHS, <2,3,1,0>
1696475377U, // <3,2,3,2>: Cost 2 vuzpl <3,1,2,3>, <3,1,2,3> 1611450042U, // <3,2,3,2>: Cost 2 vext3 LHS, <2,3,2,3>
1885929574U, // <3,2,3,3>: Cost 2 vzipr <1,1,3,3>, LHS 1885929574U, // <3,2,3,3>: Cost 2 vzipr <1,1,3,3>, LHS
1611450062U, // <3,2,3,4>: Cost 2 vext3 LHS, <2,3,4,5> 1611450062U, // <3,2,3,4>: Cost 2 vext3 LHS, <2,3,4,5>
2732967635U, // <3,2,3,5>: Cost 3 vext3 LHS, <2,3,5,1> 2732967635U, // <3,2,3,5>: Cost 3 vext3 LHS, <2,3,5,1>
2959671644U, // <3,2,3,6>: Cost 3 vzipr <1,1,3,3>, <0,4,2,6> 1611450082U, // <3,2,3,6>: Cost 2 vext3 LHS, <2,3,6,7>
2732967652U, // <3,2,3,7>: Cost 3 vext3 LHS, <2,3,7,0> 2732967652U, // <3,2,3,7>: Cost 3 vext3 LHS, <2,3,7,0>
1611450094U, // <3,2,3,u>: Cost 2 vext3 LHS, <2,3,u,1> 1611450094U, // <3,2,3,u>: Cost 2 vext3 LHS, <2,3,u,1>
2558279782U, // <3,2,4,0>: Cost 3 vext1 <1,3,2,4>, LHS 2558279782U, // <3,2,4,0>: Cost 3 vext1 <1,3,2,4>, LHS
2558280674U, // <3,2,4,1>: Cost 3 vext1 <1,3,2,4>, <1,3,2,4> 2558280674U, // <3,2,4,1>: Cost 3 vext1 <1,3,2,4>, <1,3,2,4>
2960343060U, // <3,2,4,2>: Cost 3 vzipr <1,2,3,4>, <0,0,2,2> 2960343060U, // <3,2,4,2>: Cost 3 vzipr <1,2,3,4>, <0,0,2,2>
1886601318U, // <3,2,4,3>: Cost 2 vzipr <1,2,3,4>, LHS 1886601318U, // <3,2,4,3>: Cost 2 vzipr <1,2,3,4>, LHS
2960344034U, // <3,2,4,4>: Cost 3 vzipr <1,2,3,4>, <1,3,2,4> 2960344034U, // <3,2,4,4>: Cost 3 vzipr <1,2,3,4>, <1,3,2,4>
1549716790U, // <3,2,4,5>: Cost 2 vext2 <1,0,3,2>, RHS 1549716790U, // <3,2,4,5>: Cost 2 vext2 <1,0,3,2>, RHS
Show All 19 Lines
2129977344U, // <3,2,6,7>: Cost 2 ins <u,2,6,7>, lane 0 2129977344U, // <3,2,6,7>: Cost 2 ins <u,2,6,7>, lane 0
1611892711U, // <3,2,6,u>: Cost 2 vext3 LHS, <2,6,u,7> 1611892711U, // <3,2,6,u>: Cost 2 vext3 LHS, <2,6,u,7>
3095397270U, // <3,2,7,0>: Cost 3 vtrnr <1,3,5,7>, <1,2,3,0> 3095397270U, // <3,2,7,0>: Cost 3 vtrnr <1,3,5,7>, <1,2,3,0>
3203743744U, // <3,2,7,1>: Cost 3 ins <u,2,7,1>, lane 0 3203743744U, // <3,2,7,1>: Cost 3 ins <u,2,7,1>, lane 0
3095396516U, // <3,2,7,2>: Cost 3 vtrnr <1,3,5,7>, <0,2,0,2> 3095396516U, // <3,2,7,2>: Cost 3 vtrnr <1,3,5,7>, <0,2,0,2>
1888616550U, // <3,2,7,3>: Cost 2 vzipr <1,5,3,7>, LHS 1888616550U, // <3,2,7,3>: Cost 2 vzipr <1,5,3,7>, LHS
3095397274U, // <3,2,7,4>: Cost 3 vtrnr <1,3,5,7>, <1,2,3,4> 3095397274U, // <3,2,7,4>: Cost 3 vtrnr <1,3,5,7>, <1,2,3,4>
3095396528U, // <3,2,7,5>: Cost 3 vtrnr <1,3,5,7>, <0,2,1,5> 3095396528U, // <3,2,7,5>: Cost 3 vtrnr <1,3,5,7>, <0,2,1,5>
3095396556U, // <3,2,7,6>: Cost 3 vtrnr <1,3,5,7>, <0,2,4,6> 1155286754U, // <3,2,7,6>: Cost 2 vrev <2,3,6,7>
2665264748U, // <3,2,7,7>: Cost 3 vext2 <u,0,3,2>, <7,7,7,7> 2665264748U, // <3,2,7,7>: Cost 3 vext2 <u,0,3,2>, <7,7,7,7>
1888616555U, // <3,2,7,u>: Cost 2 vzipr <1,5,3,7>, LHS 1888616555U, // <3,2,7,u>: Cost 2 vzipr <1,5,3,7>, LHS
1611892795U, // <3,2,u,0>: Cost 2 vext3 LHS, <2,u,0,1> 1611892795U, // <3,2,u,0>: Cost 2 vext3 LHS, <2,u,0,1>
1549719342U, // <3,2,u,1>: Cost 2 vext2 <1,0,3,2>, LHS 1549719342U, // <3,2,u,1>: Cost 2 vext2 <1,0,3,2>, LHS
2129494016U, // <3,2,u,2>: Cost 2 ins <u,2,0,2>, lane 0 2129494016U, // <3,2,u,2>: Cost 2 ins <u,2,0,2>, lane 0
1611892824U, // <3,2,u,3>: Cost 2 vext3 LHS, <2,u,3,3> 1611892824U, // <3,2,u,3>: Cost 2 vext3 LHS, <2,u,3,3>
1611892835U, // <3,2,u,4>: Cost 2 vext3 LHS, <2,u,4,5> 1611892835U, // <3,2,u,4>: Cost 2 vext3 LHS, <2,u,4,5>
1549719706U, // <3,2,u,5>: Cost 2 vext2 <1,0,3,2>, RHS 1549719706U, // <3,2,u,5>: Cost 2 vext2 <1,0,3,2>, RHS
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
2564377910U, // <3,4,1,4>: Cost 3 vext1 <2,3,4,1>, RHS 2564377910U, // <3,4,1,4>: Cost 3 vext1 <2,3,4,1>, RHS
2130919424U, // <3,4,1,5>: Cost 2 ins <u,4,1,5>, lane 0 2130919424U, // <3,4,1,5>: Cost 2 ins <u,4,1,5>, lane 0
1964166454U, // <3,4,1,6>: Cost 2 vtrnl <3,0,1,2>, RHS 1964166454U, // <3,4,1,6>: Cost 2 vtrnl <3,0,1,2>, RHS
3177472001U, // <3,4,1,7>: Cost 3 ins <3,u,1,7>, lane 1 3177472001U, // <3,4,1,7>: Cost 3 ins <3,u,1,7>, lane 1
1555039616U, // <3,4,1,u>: Cost 2 vext2 <1,u,3,4>, <1,u,3,4> 1555039616U, // <3,4,1,u>: Cost 2 vext2 <1,u,3,4>, <1,u,3,4>
3204694016U, // <3,4,2,0>: Cost 3 ins <u,4,2,0>, lane 0 3204694016U, // <3,4,2,0>: Cost 3 ins <u,4,2,0>, lane 0
2624800298U, // <3,4,2,1>: Cost 3 vext2 <1,2,3,4>, <2,1,4,3> 2624800298U, // <3,4,2,1>: Cost 3 vext2 <1,2,3,4>, <2,1,4,3>
2624800360U, // <3,4,2,2>: Cost 3 vext2 <1,2,3,4>, <2,2,2,2> 2624800360U, // <3,4,2,2>: Cost 3 vext2 <1,2,3,4>, <2,2,2,2>
2130976768U, // <3,4,2,3>: Cost 2 ins <u,4,2,3>, lane 0 2101600261U, // <3,4,2,3>: Cost 2 ins <3,4,u,u>, lane 5
2826716058U, // <3,4,2,4>: Cost 3 vuzpr <1,3,2,4>, <1,2,3,4> 2826716058U, // <3,4,2,4>: Cost 3 vuzpr <1,3,2,4>, <1,2,3,4>
2959001294U, // <3,4,2,5>: Cost 3 vzipr <1,0,3,2>, <2,3,4,5> 2959001294U, // <3,4,2,5>: Cost 3 vzipr <1,0,3,2>, <2,3,4,5>
2131001344U, // <3,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0 2131001344U, // <3,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0
3177545729U, // <3,4,2,7>: Cost 3 ins <3,u,2,7>, lane 1 3177545729U, // <3,4,2,7>: Cost 3 ins <3,u,2,7>, lane 1
2131001344U, // <3,4,2,u>: Cost 2 ins <u,4,2,6>, lane 0 2101600261U, // <3,4,2,u>: Cost 2 ins <3,4,u,u>, lane 5
2624800918U, // <3,4,3,0>: Cost 3 vext2 <1,2,3,4>, <3,0,1,2> 2624800918U, // <3,4,3,0>: Cost 3 vext2 <1,2,3,4>, <3,0,1,2>
2636081403U, // <3,4,3,1>: Cost 3 vext2 <3,1,3,4>, <3,1,3,4> 2636081403U, // <3,4,3,1>: Cost 3 vext2 <3,1,3,4>, <3,1,3,4>
2636745036U, // <3,4,3,2>: Cost 3 vext2 <3,2,3,4>, <3,2,3,4> 2636745036U, // <3,4,3,2>: Cost 3 vext2 <3,2,3,4>, <3,2,3,4>
2103844865U, // <3,4,3,3>: Cost 2 ins <3,u,3,3>, lane 1 2103844865U, // <3,4,3,3>: Cost 2 ins <3,u,3,3>, lane 1
2820669696U, // <3,4,3,4>: Cost 3 vuzpr <0,3,1,4>, <0,3,1,4> 2820669696U, // <3,4,3,4>: Cost 3 vuzpr <0,3,1,4>, <0,3,1,4>
1832095030U, // <3,4,3,5>: Cost 2 vzipl <3,3,3,3>, RHS 1832095030U, // <3,4,3,5>: Cost 2 vzipl <3,3,3,3>, RHS
1966312758U, // <3,4,3,6>: Cost 2 vtrnl <3,3,3,3>, RHS 1966312758U, // <3,4,3,6>: Cost 2 vtrnl <3,3,3,3>, RHS
3177619457U, // <3,4,3,7>: Cost 3 ins <3,u,3,7>, lane 1 3177619457U, // <3,4,3,7>: Cost 3 ins <3,u,3,7>, lane 1
Show All 18 Lines
537709896U, // <3,4,5,u>: Cost 1 vext3 LHS, RHS 537709896U, // <3,4,5,u>: Cost 1 vext3 LHS, RHS
1659227468U, // <3,4,6,0>: Cost 2 vext3 LHS, <4,6,0,2> 1659227468U, // <3,4,6,0>: Cost 2 vext3 LHS, <4,6,0,2>
2689838422U, // <3,4,6,1>: Cost 3 vext3 LHS, <4,6,1,3> 2689838422U, // <3,4,6,1>: Cost 3 vext3 LHS, <4,6,1,3>
2564417231U, // <3,4,6,2>: Cost 3 vext1 <2,3,4,6>, <2,3,4,6> 2564417231U, // <3,4,6,2>: Cost 3 vext1 <2,3,4,6>, <2,3,4,6>
2558446082U, // <3,4,6,3>: Cost 3 vext1 <1,3,4,6>, <3,4,5,6> 2558446082U, // <3,4,6,3>: Cost 3 vext1 <1,3,4,6>, <3,4,5,6>
1659227508U, // <3,4,6,4>: Cost 2 vext3 LHS, <4,6,4,6> 1659227508U, // <3,4,6,4>: Cost 2 vext3 LHS, <4,6,4,6>
2689838462U, // <3,4,6,5>: Cost 3 vext3 LHS, <4,6,5,7> 2689838462U, // <3,4,6,5>: Cost 3 vext3 LHS, <4,6,5,7>
2131296256U, // <3,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0 2131296256U, // <3,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0
2131304448U, // <3,4,6,7>: Cost 2 ins <u,4,6,7>, lane 0 2101600261U, // <3,4,6,7>: Cost 2 ins <3,4,u,u>, lane 5
1659227540U, // <3,4,6,u>: Cost 2 vext3 LHS, <4,6,u,2> 1659227540U, // <3,4,6,u>: Cost 2 vext3 LHS, <4,6,u,2>
2666607610U, // <3,4,7,0>: Cost 3 vext2 <u,2,3,4>, <7,0,1,2> 2666607610U, // <3,4,7,0>: Cost 3 vext2 <u,2,3,4>, <7,0,1,2>
2659972191U, // <3,4,7,1>: Cost 3 vext2 <7,1,3,4>, <7,1,3,4> 2659972191U, // <3,4,7,1>: Cost 3 vext2 <7,1,3,4>, <7,1,3,4>
2660635824U, // <3,4,7,2>: Cost 3 vext2 <7,2,3,4>, <7,2,3,4> 2660635824U, // <3,4,7,2>: Cost 3 vext2 <7,2,3,4>, <7,2,3,4>
3177881601U, // <3,4,7,3>: Cost 3 ins <3,u,7,3>, lane 1 3177881601U, // <3,4,7,3>: Cost 3 ins <3,u,7,3>, lane 1
2666607974U, // <3,4,7,4>: Cost 3 vext2 <u,2,3,4>, <7,4,5,6> 2666607974U, // <3,4,7,4>: Cost 3 vext2 <u,2,3,4>, <7,4,5,6>
3095396690U, // <3,4,7,5>: Cost 3 vtrnr <1,3,5,7>, <0,4,1,5> 3095396690U, // <3,4,7,5>: Cost 3 vtrnr <1,3,5,7>, <0,4,1,5>
2131369984U, // <3,4,7,6>: Cost 2 ins <u,4,7,6>, lane 0 2131369984U, // <3,4,7,6>: Cost 2 ins <u,4,7,6>, lane 0
2666608236U, // <3,4,7,7>: Cost 3 vext2 <u,2,3,4>, <7,7,7,7> 2666608236U, // <3,4,7,7>: Cost 3 vext2 <u,2,3,4>, <7,7,7,7>
2131369984U, // <3,4,7,u>: Cost 2 ins <u,4,7,6>, lane 0 2131369984U, // <3,4,7,u>: Cost 2 ins <u,4,7,6>, lane 0
1490690150U, // <3,4,u,0>: Cost 2 vext1 <2,3,4,u>, LHS 1490690150U, // <3,4,u,0>: Cost 2 vext1 <2,3,4,u>, LHS
1551062830U, // <3,4,u,1>: Cost 2 vext2 <1,2,3,4>, LHS 1551062830U, // <3,4,u,1>: Cost 2 vext2 <1,2,3,4>, LHS
1490691793U, // <3,4,u,2>: Cost 2 vext1 <2,3,4,u>, <2,3,4,u> 1490691793U, // <3,4,u,2>: Cost 2 vext1 <2,3,4,u>, <2,3,4,u>
2101379075U, // <3,4,u,3>: Cost 2 ins <3,4,5,u>, lane 3 2101600261U, // <3,4,u,3>: Cost 2 ins <3,4,u,u>, lane 5
1490693430U, // <3,4,u,4>: Cost 2 vext1 <2,3,4,u>, RHS 1490693430U, // <3,4,u,4>: Cost 2 vext1 <2,3,4,u>, RHS
1551063194U, // <3,4,u,5>: Cost 2 vext2 <1,2,3,4>, RHS 1551063194U, // <3,4,u,5>: Cost 2 vext2 <1,2,3,4>, RHS
537710121U, // <3,4,u,6>: Cost 1 vext3 LHS, RHS 537710121U, // <3,4,u,6>: Cost 1 vext3 LHS, RHS
2101379075U, // <3,4,u,7>: Cost 2 ins <3,4,5,u>, lane 3 2101379075U, // <3,4,u,7>: Cost 2 ins <3,4,5,u>, lane 3
537710139U, // <3,4,u,u>: Cost 1 vext3 LHS, RHS 537710139U, // <3,4,u,u>: Cost 1 vext3 LHS, RHS
2832842752U, // <3,5,0,0>: Cost 3 vuzpr <2,3,4,5>, <0,0,0,0> 2832842752U, // <3,5,0,0>: Cost 3 vuzpr <2,3,4,5>, <0,0,0,0>
2618835046U, // <3,5,0,1>: Cost 3 vext2 <0,2,3,5>, LHS 2131476480U, // <3,5,0,1>: Cost 2 ins <u,5,0,1>, lane 0
1698709606U, // <3,5,0,2>: Cost 2 vuzpl <3,4,5,6>, LHS 1698709606U, // <3,5,0,2>: Cost 2 vuzpl <3,4,5,6>, LHS
2772451522U, // <3,5,0,3>: Cost 3 vuzpl <3,4,5,6>, <0,2,3,5> 2772451522U, // <3,5,0,3>: Cost 3 vuzpl <3,4,5,6>, <0,2,3,5>
2689838690U, // <3,5,0,4>: Cost 3 vext3 LHS, <5,0,4,1> 2689838690U, // <3,5,0,4>: Cost 3 vext3 LHS, <5,0,4,1>
2732969579U, // <3,5,0,5>: Cost 3 vext3 LHS, <5,0,5,1> 2732969579U, // <3,5,0,5>: Cost 3 vext3 LHS, <5,0,5,1>
2960310647U, // <3,5,0,6>: Cost 3 vzipr <1,2,3,0>, <0,4,5,6> 2960310647U, // <3,5,0,6>: Cost 3 vzipr <1,2,3,0>, <0,4,5,6>
2131525632U, // <3,5,0,7>: Cost 2 ins <u,5,0,7>, lane 0 2131525632U, // <3,5,0,7>: Cost 2 ins <u,5,0,7>, lane 0
1698709660U, // <3,5,0,u>: Cost 2 vuzpl <3,4,5,6>, LHS 1698709660U, // <3,5,0,u>: Cost 2 vuzpl <3,4,5,6>, LHS
2594308198U, // <3,5,1,0>: Cost 3 vext1 <7,3,5,1>, LHS 2594308198U, // <3,5,1,0>: Cost 3 vext1 <7,3,5,1>, LHS
Show All 23 Lines
2959673858U, // <3,5,3,6>: Cost 3 vzipr <1,1,3,3>, <3,4,5,6> 2959673858U, // <3,5,3,6>: Cost 3 vzipr <1,1,3,3>, <3,4,5,6>
2021330230U, // <3,5,3,7>: Cost 2 vtrnr <1,3,1,3>, RHS 2021330230U, // <3,5,3,7>: Cost 2 vtrnr <1,3,1,3>, RHS
2021330231U, // <3,5,3,u>: Cost 2 vtrnr <1,3,1,3>, RHS 2021330231U, // <3,5,3,u>: Cost 2 vtrnr <1,3,1,3>, RHS
2832845308U, // <3,5,4,0>: Cost 3 vuzpr <2,3,4,5>, <3,4,5,0> 2832845308U, // <3,5,4,0>: Cost 3 vuzpr <2,3,4,5>, <3,4,5,0>
2732969871U, // <3,5,4,1>: Cost 3 vext3 LHS, <5,4,1,5> 2732969871U, // <3,5,4,1>: Cost 3 vext3 LHS, <5,4,1,5>
2832844536U, // <3,5,4,2>: Cost 3 vuzpr <2,3,4,5>, <2,4,0,2> 2832844536U, // <3,5,4,2>: Cost 3 vuzpr <2,3,4,5>, <2,4,0,2>
3177660417U, // <3,5,4,3>: Cost 3 ins <3,u,4,3>, lane 1 3177660417U, // <3,5,4,3>: Cost 3 ins <3,u,4,3>, lane 1
2832845312U, // <3,5,4,4>: Cost 3 vuzpr <2,3,4,5>, <3,4,5,4> 2832845312U, // <3,5,4,4>: Cost 3 vuzpr <2,3,4,5>, <3,4,5,4>
2618838326U, // <3,5,4,5>: Cost 3 vext2 <0,2,3,5>, RHS 2131804160U, // <3,5,4,5>: Cost 2 ins <u,5,4,5>, lane 0
1698712886U, // <3,5,4,6>: Cost 2 vuzpl <3,4,5,6>, RHS 1698712886U, // <3,5,4,6>: Cost 2 vuzpl <3,4,5,6>, RHS
1659228102U, // <3,5,4,7>: Cost 2 vext3 LHS, <5,4,7,6> 1659228102U, // <3,5,4,7>: Cost 2 vext3 LHS, <5,4,7,6>
1698712904U, // <3,5,4,u>: Cost 2 vuzpl <3,4,5,6>, RHS 1698712904U, // <3,5,4,u>: Cost 2 vuzpl <3,4,5,6>, RHS
2570453094U, // <3,5,5,0>: Cost 3 vext1 <3,3,5,5>, LHS 2570453094U, // <3,5,5,0>: Cost 3 vext1 <3,3,5,5>, LHS
2832846074U, // <3,5,5,1>: Cost 3 vuzpr <2,3,4,5>, <4,5,0,1> 2832846074U, // <3,5,5,1>: Cost 3 vuzpr <2,3,4,5>, <4,5,0,1>
2570454734U, // <3,5,5,2>: Cost 3 vext1 <3,3,5,5>, <2,3,4,5> 2570454734U, // <3,5,5,2>: Cost 3 vext1 <3,3,5,5>, <2,3,4,5>
2832845356U, // <3,5,5,3>: Cost 3 vuzpr <2,3,4,5>, <3,5,1,3> 2832845356U, // <3,5,5,3>: Cost 3 vuzpr <2,3,4,5>, <3,5,1,3>
2570456374U, // <3,5,5,4>: Cost 3 vext1 <3,3,5,5>, RHS 2570456374U, // <3,5,5,4>: Cost 3 vext1 <3,3,5,5>, RHS
▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
3177807873U, // <3,6,6,3>: Cost 3 ins <3,u,6,3>, lane 1 3177807873U, // <3,6,6,3>: Cost 3 ins <3,u,6,3>, lane 1
2732970788U, // <3,6,6,4>: Cost 3 vext3 LHS, <6,6,4,4> 2732970788U, // <3,6,6,4>: Cost 3 vext3 LHS, <6,6,4,4>
2732970800U, // <3,6,6,5>: Cost 3 vext3 LHS, <6,6,5,7> 2732970800U, // <3,6,6,5>: Cost 3 vext3 LHS, <6,6,5,7>
1659228984U, // <3,6,6,6>: Cost 2 vext3 LHS, <6,6,6,6> 1659228984U, // <3,6,6,6>: Cost 2 vext3 LHS, <6,6,6,6>
1659228994U, // <3,6,6,7>: Cost 2 vext3 LHS, <6,6,7,7> 1659228994U, // <3,6,6,7>: Cost 2 vext3 LHS, <6,6,7,7>
1659229003U, // <3,6,6,u>: Cost 2 vext3 LHS, <6,6,u,7> 1659229003U, // <3,6,6,u>: Cost 2 vext3 LHS, <6,6,u,7>
1659229006U, // <3,6,7,0>: Cost 2 vext3 LHS, <6,7,0,1> 1659229006U, // <3,6,7,0>: Cost 2 vext3 LHS, <6,7,0,1>
2558600201U, // <3,6,7,1>: Cost 3 vext1 <1,3,6,7>, <1,3,6,7> 2558600201U, // <3,6,7,1>: Cost 3 vext1 <1,3,6,7>, <1,3,6,7>
2558601146U, // <3,6,7,2>: Cost 3 vext1 <1,3,6,7>, <2,6,3,7> 1611453282U, // <3,6,7,2>: Cost 2 vext3 LHS, <6,7,2,3>
2968996198U, // <3,6,7,3>: Cost 3 vzipr <2,6,3,7>, <3,2,6,3> 2968996198U, // <3,6,7,3>: Cost 3 vzipr <2,6,3,7>, <3,2,6,3>
1659229046U, // <3,6,7,4>: Cost 2 vext3 LHS, <6,7,4,5> 1659229046U, // <3,6,7,4>: Cost 2 vext3 LHS, <6,7,4,5>
2968995633U, // <3,6,7,5>: Cost 3 vzipr <2,6,3,7>, <2,4,6,5> 2968995633U, // <3,6,7,5>: Cost 3 vzipr <2,6,3,7>, <2,4,6,5>
2722059141U, // <3,6,7,6>: Cost 3 vext3 <6,2,7,3>, <6,7,6,2> 1611453322U, // <3,6,7,6>: Cost 2 vext3 LHS, <6,7,6,7>
1888619830U, // <3,6,7,7>: Cost 2 vzipr <1,5,3,7>, RHS 1888619830U, // <3,6,7,7>: Cost 2 vzipr <1,5,3,7>, RHS
1888619831U, // <3,6,7,u>: Cost 2 vzipr <1,5,3,7>, RHS 1888619831U, // <3,6,7,u>: Cost 2 vzipr <1,5,3,7>, RHS
1659229087U, // <3,6,u,0>: Cost 2 vext3 LHS, <6,u,0,1> 1659229087U, // <3,6,u,0>: Cost 2 vext3 LHS, <6,u,0,1>
2689840041U, // <3,6,u,1>: Cost 3 vext3 LHS, <6,u,1,2> 2689840041U, // <3,6,u,1>: Cost 3 vext3 LHS, <6,u,1,2>
2132148224U, // <3,6,u,2>: Cost 2 ins <u,6,0,2>, lane 0 2132148224U, // <3,6,u,2>: Cost 2 ins <u,6,0,2>, lane 0
2132303872U, // <3,6,u,3>: Cost 2 ins <u,6,2,3>, lane 0 2132303872U, // <3,6,u,3>: Cost 2 ins <u,6,2,3>, lane 0
1659229127U, // <3,6,u,4>: Cost 2 vext3 LHS, <6,u,4,5> 1659229127U, // <3,6,u,4>: Cost 2 vext3 LHS, <6,u,4,5>
2689840081U, // <3,6,u,5>: Cost 3 vext3 LHS, <6,u,5,6> 2689840081U, // <3,6,u,5>: Cost 3 vext3 LHS, <6,u,5,6>
▲ Show 20 Lines • Show All 178 Lines • ▼ Show 20 Lines
2570718518U, // <4,0,1,4>: Cost 3 vext1 <3,4,0,1>, RHS 2570718518U, // <4,0,1,4>: Cost 3 vext1 <3,4,0,1>, RHS
2779350016U, // <4,0,1,5>: Cost 3 vuzpl <4,6,0,2>, <1,3,5,7> 2779350016U, // <4,0,1,5>: Cost 3 vuzpl <4,6,0,2>, <1,3,5,7>
3202015232U, // <4,0,1,6>: Cost 3 ins <u,0,1,6>, lane 0 3202015232U, // <4,0,1,6>: Cost 3 ins <u,0,1,6>, lane 0
2109702145U, // <4,0,1,7>: Cost 2 ins <4,u,1,7>, lane 1 2109702145U, // <4,0,1,7>: Cost 2 ins <4,u,1,7>, lane 1
1618165916U, // <4,0,1,u>: Cost 2 vext3 <1,2,3,4>, LHS 1618165916U, // <4,0,1,u>: Cost 2 vext3 <1,2,3,4>, LHS
2685714598U, // <4,0,2,0>: Cost 3 vext3 <0,2,0,4>, <0,2,0,4> 2685714598U, // <4,0,2,0>: Cost 3 vext3 <0,2,0,4>, <0,2,0,4>
2104860674U, // <4,0,2,1>: Cost 2 ins <4,0,u,1>, lane 2 2104860674U, // <4,0,2,1>: Cost 2 ins <4,0,u,1>, lane 2
2128314368U, // <4,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0 2128314368U, // <4,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0
2128322560U, // <4,0,2,3>: Cost 2 ins <u,0,2,3>, lane 0 2104918021U, // <4,0,2,3>: Cost 2 ins <4,0,u,u>, lane 5
2685714636U, // <4,0,2,4>: Cost 3 vext3 <0,2,0,4>, <0,2,4,6> 2685714636U, // <4,0,2,4>: Cost 3 vext3 <0,2,0,4>, <0,2,4,6>
3044622465U, // <4,0,2,5>: Cost 3 vtrnl <4,1,2,3>, <0,1,5,3> 3044622465U, // <4,0,2,5>: Cost 3 vtrnl <4,1,2,3>, <0,1,5,3>
2833613004U, // <4,0,2,6>: Cost 3 vuzpr <2,4,6,0>, <0,2,4,6> 2833613004U, // <4,0,2,6>: Cost 3 vuzpr <2,4,6,0>, <0,2,4,6>
2109775873U, // <4,0,2,7>: Cost 2 ins <4,u,2,7>, lane 1 2109775873U, // <4,0,2,7>: Cost 2 ins <4,u,2,7>, lane 1
2104860674U, // <4,0,2,u>: Cost 2 ins <4,0,u,1>, lane 2 2104860674U, // <4,0,2,u>: Cost 2 ins <4,0,u,1>, lane 2
3202113536U, // <4,0,3,0>: Cost 3 ins <u,0,3,0>, lane 0 3202113536U, // <4,0,3,0>: Cost 3 ins <u,0,3,0>, lane 0
2104860674U, // <4,0,3,1>: Cost 2 ins <4,0,u,1>, lane 2 2104860674U, // <4,0,3,1>: Cost 2 ins <4,0,u,1>, lane 2
2128388096U, // <4,0,3,2>: Cost 2 ins <u,0,3,2>, lane 0 2128388096U, // <4,0,3,2>: Cost 2 ins <u,0,3,2>, lane 0
2779351452U, // <4,0,3,3>: Cost 3 vuzpl <4,6,0,2>, <3,3,3,3> 2779351452U, // <4,0,3,3>: Cost 3 vuzpl <4,6,0,2>, <3,3,3,3>
3178627074U, // <4,0,3,4>: Cost 3 ins <4,0,u,4>, lane 2 3178627074U, // <4,0,3,4>: Cost 3 ins <4,0,u,4>, lane 2
2839512782U, // <4,0,3,5>: Cost 3 vuzpr <3,4,5,0>, <2,3,4,5> 2839512782U, // <4,0,3,5>: Cost 3 vuzpr <3,4,5,0>, <2,3,4,5>
3178643458U, // <4,0,3,6>: Cost 3 ins <4,0,u,6>, lane 2 3178643458U, // <4,0,3,6>: Cost 3 ins <4,0,u,6>, lane 2
2109849601U, // <4,0,3,7>: Cost 2 ins <4,u,3,7>, lane 1 2109849601U, // <4,0,3,7>: Cost 2 ins <4,u,3,7>, lane 1
2104860674U, // <4,0,3,u>: Cost 2 ins <4,0,u,1>, lane 2 2104860674U, // <4,0,3,u>: Cost 2 ins <4,0,u,1>, lane 2
1705610572U, // <4,0,4,0>: Cost 2 vuzpl <4,6,0,2>, <4,6,0,2> 1705610572U, // <4,0,4,0>: Cost 2 vuzpl <4,6,0,2>, <4,6,0,2>
2104860674U, // <4,0,4,1>: Cost 2 ins <4,0,u,1>, lane 2 2104860674U, // <4,0,4,1>: Cost 2 ins <4,0,u,1>, lane 2
1974370406U, // <4,0,4,2>: Cost 2 vtrnl <4,6,4,6>, LHS 1974370406U, // <4,0,4,2>: Cost 2 vtrnl <4,6,4,6>, LHS
3178364931U, // <4,0,4,3>: Cost 3 ins <4,0,4,u>, lane 3 3178364931U, // <4,0,4,3>: Cost 3 ins <4,0,4,u>, lane 3
2109898753U, // <4,0,4,4>: Cost 2 ins <4,u,4,4>, lane 1 2109898753U, // <4,0,4,4>: Cost 2 ins <4,u,4,4>, lane 1
2631478582U, // <4,0,4,5>: Cost 3 vext2 <2,3,4,0>, RHS 2104918021U, // <4,0,4,5>: Cost 2 ins <4,0,u,u>, lane 5
1705610550U, // <4,0,4,6>: Cost 2 vuzpl <4,6,0,2>, RHS 1705610550U, // <4,0,4,6>: Cost 2 vuzpl <4,6,0,2>, RHS
2109923329U, // <4,0,4,7>: Cost 2 ins <4,u,4,7>, lane 1 2109923329U, // <4,0,4,7>: Cost 2 ins <4,u,4,7>, lane 1
1705610568U, // <4,0,4,u>: Cost 2 vuzpl <4,6,0,2>, RHS 1705610568U, // <4,0,4,u>: Cost 2 vuzpl <4,6,0,2>, RHS
1839644672U, // <4,0,5,0>: Cost 2 vzipl RHS, <0,0,0,0> 1839644672U, // <4,0,5,0>: Cost 2 vzipl RHS, <0,0,0,0>
765902950U, // <4,0,5,1>: Cost 1 vzipl RHS, LHS 765902950U, // <4,0,5,1>: Cost 1 vzipl RHS, LHS
1839644836U, // <4,0,5,2>: Cost 2 vzipl RHS, <0,2,0,2> 1839644836U, // <4,0,5,2>: Cost 2 vzipl RHS, <0,2,0,2>
2104696835U, // <4,0,5,3>: Cost 2 ins <4,0,5,u>, lane 3 2104696835U, // <4,0,5,3>: Cost 2 ins <4,0,5,u>, lane 3
1839645010U, // <4,0,5,4>: Cost 2 vzipl RHS, <0,4,1,5> 1839645010U, // <4,0,5,4>: Cost 2 vzipl RHS, <0,4,1,5>
Show All 17 Lines
3178627074U, // <4,0,7,4>: Cost 3 ins <4,0,u,4>, lane 2 3178627074U, // <4,0,7,4>: Cost 3 ins <4,0,u,4>, lane 2
2779354470U, // <4,0,7,5>: Cost 3 vuzpl <4,6,0,2>, <7,4,5,6> 2779354470U, // <4,0,7,5>: Cost 3 vuzpl <4,6,0,2>, <7,4,5,6>
2779354473U, // <4,0,7,6>: Cost 3 vuzpl <4,6,0,2>, <7,4,6,0> 2779354473U, // <4,0,7,6>: Cost 3 vuzpl <4,6,0,2>, <7,4,6,0>
2110144513U, // <4,0,7,7>: Cost 2 ins <4,u,7,7>, lane 1 2110144513U, // <4,0,7,7>: Cost 2 ins <4,u,7,7>, lane 1
2104860674U, // <4,0,7,u>: Cost 2 ins <4,0,u,1>, lane 2 2104860674U, // <4,0,7,u>: Cost 2 ins <4,0,u,1>, lane 2
1974009856U, // <4,0,u,0>: Cost 2 vtrnl RHS, <0,0,0,0> 1974009856U, // <4,0,u,0>: Cost 2 vtrnl RHS, <0,0,0,0>
767893606U, // <4,0,u,1>: Cost 1 vzipl RHS, LHS 767893606U, // <4,0,u,1>: Cost 1 vzipl RHS, LHS
900268134U, // <4,0,u,2>: Cost 1 vtrnl RHS, LHS 900268134U, // <4,0,u,2>: Cost 1 vtrnl RHS, LHS
2104696835U, // <4,0,u,3>: Cost 2 ins <4,0,5,u>, lane 3 2104918021U, // <4,0,u,3>: Cost 2 ins <4,0,u,u>, lane 5
1974010060U, // <4,0,u,4>: Cost 2 vtrnl RHS, <0,2,4,6> 1974010060U, // <4,0,u,4>: Cost 2 vtrnl RHS, <0,2,4,6>
2109980673U, // <4,0,u,5>: Cost 2 ins <4,u,5,5>, lane 1 2104918021U, // <4,0,u,5>: Cost 2 ins <4,0,u,u>, lane 5
1705613466U, // <4,0,u,6>: Cost 2 vuzpl <4,6,0,2>, RHS 1705613466U, // <4,0,u,6>: Cost 2 vuzpl <4,6,0,2>, RHS
1036328961U, // <4,0,u,7>: Cost 1 ins RHS, lane 1 1036328961U, // <4,0,u,7>: Cost 1 ins RHS, lane 1
900268188U, // <4,0,u,u>: Cost 1 vtrnl RHS, LHS 900268188U, // <4,0,u,u>: Cost 1 vtrnl RHS, LHS
2600640614U, // <4,1,0,0>: Cost 3 vext1 <u,4,1,0>, LHS 2600640614U, // <4,1,0,0>: Cost 3 vext1 <u,4,1,0>, LHS
2622857318U, // <4,1,0,1>: Cost 3 vext2 <0,u,4,1>, LHS 2128822272U, // <4,1,0,1>: Cost 2 ins <u,1,0,1>, lane 0
2109587457U, // <4,1,0,2>: Cost 2 ins <4,u,0,2>, lane 1 2109587457U, // <4,1,0,2>: Cost 2 ins <4,u,0,2>, lane 1
2128838656U, // <4,1,0,3>: Cost 2 ins <u,1,0,3>, lane 0 2128838656U, // <4,1,0,3>: Cost 2 ins <u,1,0,3>, lane 0
2622857554U, // <4,1,0,4>: Cost 3 vext2 <0,u,4,1>, <0,4,1,5> 2622857554U, // <4,1,0,4>: Cost 3 vext2 <0,u,4,1>, <0,4,1,5>
3047785472U, // <4,1,0,5>: Cost 3 vtrnl <4,6,0,2>, <1,3,5,7> 3047785472U, // <4,1,0,5>: Cost 3 vtrnl <4,6,0,2>, <1,3,5,7>
3183362049U, // <4,1,0,6>: Cost 3 ins <4,u,0,6>, lane 1 3183362049U, // <4,1,0,6>: Cost 3 ins <4,u,0,6>, lane 1
2109628417U, // <4,1,0,7>: Cost 2 ins <4,u,0,7>, lane 1 2109628417U, // <4,1,0,7>: Cost 2 ins <4,u,0,7>, lane 1
2109587457U, // <4,1,0,u>: Cost 2 ins <4,u,0,2>, lane 1 2109587457U, // <4,1,0,u>: Cost 2 ins <4,u,0,2>, lane 1
3202629632U, // <4,1,1,0>: Cost 3 ins <u,1,1,0>, lane 0 3202629632U, // <4,1,1,0>: Cost 3 ins <u,1,1,0>, lane 0
Show All 23 Lines
2588725862U, // <4,1,3,6>: Cost 3 vext1 <6,4,1,3>, <6,4,1,3> 2588725862U, // <4,1,3,6>: Cost 3 vext1 <6,4,1,3>, <6,4,1,3>
2109849601U, // <4,1,3,7>: Cost 2 ins <4,u,3,7>, lane 1 2109849601U, // <4,1,3,7>: Cost 2 ins <4,u,3,7>, lane 1
2129059840U, // <4,1,3,u>: Cost 2 ins <u,1,3,3>, lane 0 2129059840U, // <4,1,3,u>: Cost 2 ins <u,1,3,3>, lane 0
2600673382U, // <4,1,4,0>: Cost 3 vext1 <u,4,1,4>, LHS 2600673382U, // <4,1,4,0>: Cost 3 vext1 <u,4,1,4>, LHS
1705061641U, // <4,1,4,1>: Cost 2 vuzpl <4,5,1,7>, <4,5,1,7> 1705061641U, // <4,1,4,1>: Cost 2 vuzpl <4,5,1,7>, <4,5,1,7>
2912641946U, // <4,1,4,2>: Cost 3 vzipl <4,4,5,6>, <1,2,3,4> 2912641946U, // <4,1,4,2>: Cost 3 vzipl <4,4,5,6>, <1,2,3,4>
2040135782U, // <4,1,4,3>: Cost 2 vtrnr <4,4,4,4>, LHS 2040135782U, // <4,1,4,3>: Cost 2 vtrnr <4,4,4,4>, LHS
2109898753U, // <4,1,4,4>: Cost 2 ins <4,u,4,4>, lane 1 2109898753U, // <4,1,4,4>: Cost 2 ins <4,u,4,4>, lane 1
2622860598U, // <4,1,4,5>: Cost 3 vext2 <0,u,4,1>, RHS 2129149952U, // <4,1,4,5>: Cost 2 ins <u,1,4,5>, lane 0
2109915137U, // <4,1,4,6>: Cost 2 ins <4,u,4,6>, lane 1 2109915137U, // <4,1,4,6>: Cost 2 ins <4,u,4,6>, lane 1
2109923329U, // <4,1,4,7>: Cost 2 ins <4,u,4,7>, lane 1 2109923329U, // <4,1,4,7>: Cost 2 ins <4,u,4,7>, lane 1
2109915137U, // <4,1,4,u>: Cost 2 ins <4,u,4,6>, lane 1 2109915137U, // <4,1,4,u>: Cost 2 ins <4,u,4,6>, lane 1
1479164242U, // <4,1,5,0>: Cost 2 vext1 <0,4,1,5>, <0,4,1,5> 1479164242U, // <4,1,5,0>: Cost 2 vext1 <0,4,1,5>, <0,4,1,5>
1839645492U, // <4,1,5,1>: Cost 2 vzipl RHS, <1,1,1,1> 1839645492U, // <4,1,5,1>: Cost 2 vzipl RHS, <1,1,1,1>
1839645590U, // <4,1,5,2>: Cost 2 vzipl RHS, <1,2,3,0> 1839645590U, // <4,1,5,2>: Cost 2 vzipl RHS, <1,2,3,0>
2016034918U, // <4,1,5,3>: Cost 2 vtrnr <0,4,1,5>, LHS 2016034918U, // <4,1,5,3>: Cost 2 vtrnr <0,4,1,5>, LHS
1479167286U, // <4,1,5,4>: Cost 2 vext1 <0,4,1,5>, RHS 1479167286U, // <4,1,5,4>: Cost 2 vext1 <0,4,1,5>, RHS
Show All 24 Lines
1841636246U, // <4,1,u,2>: Cost 2 vzipl RHS, <1,2,3,0> 1841636246U, // <4,1,u,2>: Cost 2 vzipl RHS, <1,2,3,0>
1055244288U, // <4,1,u,3>: Cost 1 ins LHS, lane 0 1055244288U, // <4,1,u,3>: Cost 1 ins LHS, lane 0
1479191862U, // <4,1,u,4>: Cost 2 vext1 <0,4,1,u>, RHS 1479191862U, // <4,1,u,4>: Cost 2 vext1 <0,4,1,u>, RHS
1974010880U, // <4,1,u,5>: Cost 2 vtrnl RHS, <1,3,5,7> 1974010880U, // <4,1,u,5>: Cost 2 vtrnl RHS, <1,3,5,7>
2109915137U, // <4,1,u,6>: Cost 2 ins <4,u,4,6>, lane 1 2109915137U, // <4,1,u,6>: Cost 2 ins <4,u,4,6>, lane 1
1036328961U, // <4,1,u,7>: Cost 1 ins RHS, lane 1 1036328961U, // <4,1,u,7>: Cost 1 ins RHS, lane 1
1055244288U, // <4,1,u,u>: Cost 1 ins LHS, lane 0 1055244288U, // <4,1,u,u>: Cost 1 ins LHS, lane 0
3047786150U, // <4,2,0,0>: Cost 3 vtrnl <4,6,0,2>, <2,3,0,1> 3047786150U, // <4,2,0,0>: Cost 3 vtrnl <4,6,0,2>, <2,3,0,1>
2622865510U, // <4,2,0,1>: Cost 3 vext2 <0,u,4,2>, LHS 2109579265U, // <4,2,0,1>: Cost 2 ins <4,u,0,1>, lane 1
2129494016U, // <4,2,0,2>: Cost 2 ins <u,2,0,2>, lane 0 2129494016U, // <4,2,0,2>: Cost 2 ins <u,2,0,2>, lane 0
2967019622U, // <4,2,0,3>: Cost 3 vzipr <2,3,4,0>, LHS 2967019622U, // <4,2,0,3>: Cost 3 vzipr <2,3,4,0>, LHS
2635473244U, // <4,2,0,4>: Cost 3 vext2 <3,0,4,2>, <0,4,2,6> 2635473244U, // <4,2,0,4>: Cost 3 vext2 <3,0,4,2>, <0,4,2,6>
2909947747U, // <4,2,0,5>: Cost 3 vzipl <4,0,5,1>, <2,5,3,1> 2909947747U, // <4,2,0,5>: Cost 3 vzipl <4,0,5,1>, <2,5,3,1>
2696775148U, // <4,2,0,6>: Cost 3 vext3 <2,0,6,4>, <2,0,6,4> 2696775148U, // <4,2,0,6>: Cost 3 vext3 <2,0,6,4>, <2,0,6,4>
2109628417U, // <4,2,0,7>: Cost 2 ins <4,u,0,7>, lane 1 2109628417U, // <4,2,0,7>: Cost 2 ins <4,u,0,7>, lane 1
2129494016U, // <4,2,0,u>: Cost 2 ins <u,2,0,2>, lane 0 2129494016U, // <4,2,0,u>: Cost 2 ins <u,2,0,2>, lane 0
3203293184U, // <4,2,1,0>: Cost 3 ins <u,2,1,0>, lane 0 3203293184U, // <4,2,1,0>: Cost 3 ins <u,2,1,0>, lane 0
Show All 23 Lines
3203489792U, // <4,2,3,6>: Cost 3 ins <u,2,3,6>, lane 0 3203489792U, // <4,2,3,6>: Cost 3 ins <u,2,3,6>, lane 0
2109849601U, // <4,2,3,7>: Cost 2 ins <4,u,3,7>, lane 1 2109849601U, // <4,2,3,7>: Cost 2 ins <4,u,3,7>, lane 1
2129698816U, // <4,2,3,u>: Cost 2 ins <u,2,3,0>, lane 0 2129698816U, // <4,2,3,u>: Cost 2 ins <u,2,3,0>, lane 0
2564915302U, // <4,2,4,0>: Cost 3 vext1 <2,4,2,4>, LHS 2564915302U, // <4,2,4,0>: Cost 3 vext1 <2,4,2,4>, LHS
2564916122U, // <4,2,4,1>: Cost 3 vext1 <2,4,2,4>, <1,2,3,4> 2564916122U, // <4,2,4,1>: Cost 3 vext1 <2,4,2,4>, <1,2,3,4>
1702448074U, // <4,2,4,2>: Cost 2 vuzpl <4,1,2,3>, <4,1,2,3> 1702448074U, // <4,2,4,2>: Cost 2 vuzpl <4,1,2,3>, <4,1,2,3>
1905918054U, // <4,2,4,3>: Cost 2 vzipr <4,4,4,4>, LHS 1905918054U, // <4,2,4,3>: Cost 2 vzipr <4,4,4,4>, LHS
2109898753U, // <4,2,4,4>: Cost 2 ins <4,u,4,4>, lane 1 2109898753U, // <4,2,4,4>: Cost 2 ins <4,u,4,4>, lane 1
2622868790U, // <4,2,4,5>: Cost 3 vext2 <0,u,4,2>, RHS 2109906945U, // <4,2,4,5>: Cost 2 ins <4,u,4,5>, lane 1
2129821696U, // <4,2,4,6>: Cost 2 ins <u,2,4,6>, lane 0 2129821696U, // <4,2,4,6>: Cost 2 ins <u,2,4,6>, lane 0
2109923329U, // <4,2,4,7>: Cost 2 ins <4,u,4,7>, lane 1 2109923329U, // <4,2,4,7>: Cost 2 ins <4,u,4,7>, lane 1
2129821696U, // <4,2,4,u>: Cost 2 ins <u,2,4,6>, lane 0 2129821696U, // <4,2,4,u>: Cost 2 ins <u,2,4,6>, lane 0
3089777558U, // <4,2,5,0>: Cost 3 vtrnr <0,4,1,5>, <1,2,3,0> 3089777558U, // <4,2,5,0>: Cost 3 vtrnr <0,4,1,5>, <1,2,3,0>
2109947905U, // <4,2,5,1>: Cost 2 ins <4,u,5,1>, lane 1 2109947905U, // <4,2,5,1>: Cost 2 ins <4,u,5,1>, lane 1
1839646312U, // <4,2,5,2>: Cost 2 vzipl RHS, <2,2,2,2> 1839646312U, // <4,2,5,2>: Cost 2 vzipl RHS, <2,2,2,2>
1893318758U, // <4,2,5,3>: Cost 2 vzipr <2,3,4,5>, LHS 1893318758U, // <4,2,5,3>: Cost 2 vzipr <2,3,4,5>, LHS
3089777562U, // <4,2,5,4>: Cost 3 vtrnr <0,4,1,5>, <1,2,3,4> 3089777562U, // <4,2,5,4>: Cost 3 vtrnr <0,4,1,5>, <1,2,3,4>
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
1036328961U, // <4,3,6,7>: Cost 1 ins RHS, lane 1 1036328961U, // <4,3,6,7>: Cost 1 ins RHS, lane 1
1036328961U, // <4,3,6,u>: Cost 1 ins RHS, lane 1 1036328961U, // <4,3,6,u>: Cost 1 ins RHS, lane 1
3204399104U, // <4,3,7,0>: Cost 3 ins <u,3,7,0>, lane 0 3204399104U, // <4,3,7,0>: Cost 3 ins <u,3,7,0>, lane 0
3204407296U, // <4,3,7,1>: Cost 3 ins <u,3,7,1>, lane 0 3204407296U, // <4,3,7,1>: Cost 3 ins <u,3,7,1>, lane 0
2660701368U, // <4,3,7,2>: Cost 3 vext2 <7,2,4,3>, <7,2,4,3> 2660701368U, // <4,3,7,2>: Cost 3 vext2 <7,2,4,3>, <7,2,4,3>
3204423680U, // <4,3,7,3>: Cost 3 ins <u,3,7,3>, lane 0 3204423680U, // <4,3,7,3>: Cost 3 ins <u,3,7,3>, lane 0
2968404890U, // <4,3,7,4>: Cost 3 vzipr <2,5,4,7>, <1,2,3,4> 2968404890U, // <4,3,7,4>: Cost 3 vzipr <2,5,4,7>, <1,2,3,4>
3204440064U, // <4,3,7,5>: Cost 3 ins <u,3,7,5>, lane 0 3204440064U, // <4,3,7,5>: Cost 3 ins <u,3,7,5>, lane 0
2778953153U, // <4,3,7,6>: Cost 3 vuzpl <4,5,3,7>, <7,5,6,7> 2235664908U, // <4,3,7,6>: Cost 3 vrev <3,4,6,7>
2110144513U, // <4,3,7,7>: Cost 2 ins <4,u,7,7>, lane 1 2110144513U, // <4,3,7,7>: Cost 2 ins <4,u,7,7>, lane 1
2110144513U, // <4,3,7,u>: Cost 2 ins <4,u,7,7>, lane 1 2110144513U, // <4,3,7,u>: Cost 2 ins <4,u,7,7>, lane 1
1841637526U, // <4,3,u,0>: Cost 2 vzipl RHS, <3,0,1,2> 1841637526U, // <4,3,u,0>: Cost 2 vzipl RHS, <3,0,1,2>
1974012054U, // <4,3,u,1>: Cost 2 vtrnl RHS, <3,0,1,2> 1974012054U, // <4,3,u,1>: Cost 2 vtrnl RHS, <3,0,1,2>
2109587457U, // <4,3,u,2>: Cost 2 ins <4,u,0,2>, lane 1 2109587457U, // <4,3,u,2>: Cost 2 ins <4,u,0,2>, lane 1
1974012316U, // <4,3,u,3>: Cost 2 vtrnl RHS, <3,3,3,3> 1974012316U, // <4,3,u,3>: Cost 2 vtrnl RHS, <3,3,3,3>
1841637890U, // <4,3,u,4>: Cost 2 vzipl RHS, <3,4,5,6> 1841637890U, // <4,3,u,4>: Cost 2 vzipl RHS, <3,4,5,6>
1161857540U, // <4,3,u,5>: Cost 2 vrev <3,4,5,u> 1161857540U, // <4,3,u,5>: Cost 2 vrev <3,4,5,u>
2109915137U, // <4,3,u,6>: Cost 2 ins <4,u,4,6>, lane 1 2109915137U, // <4,3,u,6>: Cost 2 ins <4,u,4,6>, lane 1
1036328961U, // <4,3,u,7>: Cost 1 ins RHS, lane 1 1036328961U, // <4,3,u,7>: Cost 1 ins RHS, lane 1
1036328961U, // <4,3,u,u>: Cost 1 ins RHS, lane 1 1036328961U, // <4,3,u,u>: Cost 1 ins RHS, lane 1
1974046028U, // <4,4,0,0>: Cost 2 vtrnl <4,6,0,2>, <4,6,0,2> 1974046028U, // <4,4,0,0>: Cost 2 vtrnl <4,6,0,2>, <4,6,0,2>
1570373734U, // <4,4,0,1>: Cost 2 vext2 <4,4,4,4>, LHS 2107572229U, // <4,4,0,1>: Cost 2 ins <4,4,u,u>, lane 5
1705934950U, // <4,4,0,2>: Cost 2 vuzpl <4,6,4,6>, LHS 1705934950U, // <4,4,0,2>: Cost 2 vuzpl <4,6,4,6>, LHS
3180724227U, // <4,4,0,3>: Cost 3 ins <4,4,0,u>, lane 3 3180724227U, // <4,4,0,3>: Cost 3 ins <4,4,0,u>, lane 3
2107539458U, // <4,4,0,4>: Cost 2 ins <4,4,u,4>, lane 2 2107539458U, // <4,4,0,4>: Cost 2 ins <4,4,u,4>, lane 2
2107547650U, // <4,4,0,5>: Cost 2 ins <4,4,u,5>, lane 2 2107547650U, // <4,4,0,5>: Cost 2 ins <4,4,u,5>, lane 2
1974046006U, // <4,4,0,6>: Cost 2 vtrnl <4,6,0,2>, RHS 1974046006U, // <4,4,0,6>: Cost 2 vtrnl <4,6,0,2>, RHS
2109628417U, // <4,4,0,7>: Cost 2 ins <4,u,0,7>, lane 1 2109628417U, // <4,4,0,7>: Cost 2 ins <4,u,0,7>, lane 1
1974046024U, // <4,4,0,u>: Cost 2 vtrnl <4,6,0,2>, RHS 1974046024U, // <4,4,0,u>: Cost 2 vtrnl <4,6,0,2>, RHS
3204620288U, // <4,4,1,0>: Cost 3 ins <u,4,1,0>, lane 0 3204620288U, // <4,4,1,0>: Cost 3 ins <u,4,1,0>, lane 0
1836665802U, // <4,4,1,1>: Cost 2 vzipl <4,1,2,3>, <4,1,2,3> 1836665802U, // <4,4,1,1>: Cost 2 vzipl <4,1,2,3>, <4,1,2,3>
2691910602U, // <4,4,1,2>: Cost 3 vext3 <1,2,3,4>, <4,1,2,3> 2691910602U, // <4,4,1,2>: Cost 3 vext3 <1,2,3,4>, <4,1,2,3>
1771700326U, // <4,4,1,3>: Cost 2 vuzpr <4,4,4,4>, LHS 1771700326U, // <4,4,1,3>: Cost 2 vuzpr <4,4,4,4>, LHS
2107539458U, // <4,4,1,4>: Cost 2 ins <4,4,u,4>, lane 2 2107539458U, // <4,4,1,4>: Cost 2 ins <4,4,u,4>, lane 2
2130919424U, // <4,4,1,5>: Cost 2 ins <u,4,1,5>, lane 0 2130919424U, // <4,4,1,5>: Cost 2 ins <u,4,1,5>, lane 0
2107555842U, // <4,4,1,6>: Cost 2 ins <4,4,u,6>, lane 2 2107555842U, // <4,4,1,6>: Cost 2 ins <4,4,u,6>, lane 2
2109702145U, // <4,4,1,7>: Cost 2 ins <4,u,1,7>, lane 1 2109702145U, // <4,4,1,7>: Cost 2 ins <4,u,1,7>, lane 1
2130919424U, // <4,4,1,u>: Cost 2 ins <u,4,1,5>, lane 0 2130919424U, // <4,4,1,u>: Cost 2 ins <u,4,1,5>, lane 0
2779678374U, // <4,4,2,0>: Cost 3 vuzpl <4,6,4,6>, <2,3,0,1> 2779678374U, // <4,4,2,0>: Cost 3 vuzpl <4,6,4,6>, <2,3,0,1>
3044625673U, // <4,4,2,1>: Cost 3 vtrnl <4,1,2,3>, <4,5,1,7> 3044625673U, // <4,4,2,1>: Cost 3 vtrnl <4,1,2,3>, <4,5,1,7>
1970883530U, // <4,4,2,2>: Cost 2 vtrnl <4,1,2,3>, <4,1,2,3> 1970883530U, // <4,4,2,2>: Cost 2 vtrnl <4,1,2,3>, <4,1,2,3>
2130976768U, // <4,4,2,3>: Cost 2 ins <u,4,2,3>, lane 0 2107572229U, // <4,4,2,3>: Cost 2 ins <4,4,u,u>, lane 5
2107539458U, // <4,4,2,4>: Cost 2 ins <4,4,u,4>, lane 2 2107539458U, // <4,4,2,4>: Cost 2 ins <4,4,u,4>, lane 2
2107547650U, // <4,4,2,5>: Cost 2 ins <4,4,u,5>, lane 2 2107547650U, // <4,4,2,5>: Cost 2 ins <4,4,u,5>, lane 2
2131001344U, // <4,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0 2131001344U, // <4,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0
2109775873U, // <4,4,2,7>: Cost 2 ins <4,u,2,7>, lane 1 2109775873U, // <4,4,2,7>: Cost 2 ins <4,u,2,7>, lane 1
2107547650U, // <4,4,2,u>: Cost 2 ins <4,4,u,5>, lane 2 2107572229U, // <4,4,2,u>: Cost 2 ins <4,4,u,u>, lane 5
3181248514U, // <4,4,3,0>: Cost 3 ins <4,4,u,0>, lane 2 3181248514U, // <4,4,3,0>: Cost 3 ins <4,4,u,0>, lane 2
2779678870U, // <4,4,3,1>: Cost 3 vuzpl <4,6,4,6>, <3,0,1,2> 2779678870U, // <4,4,3,1>: Cost 3 vuzpl <4,6,4,6>, <3,0,1,2>
3181264898U, // <4,4,3,2>: Cost 3 ins <4,4,u,2>, lane 2 3181264898U, // <4,4,3,2>: Cost 3 ins <4,4,u,2>, lane 2
1880031352U, // <4,4,3,3>: Cost 2 vzipr <0,1,4,3>, <0,1,4,3> 1880031352U, // <4,4,3,3>: Cost 2 vzipr <0,1,4,3>, <0,1,4,3>
2107539458U, // <4,4,3,4>: Cost 2 ins <4,4,u,4>, lane 2 2107539458U, // <4,4,3,4>: Cost 2 ins <4,4,u,4>, lane 2
2107547650U, // <4,4,3,5>: Cost 2 ins <4,4,u,5>, lane 2 2107547650U, // <4,4,3,5>: Cost 2 ins <4,4,u,5>, lane 2
2107555842U, // <4,4,3,6>: Cost 2 ins <4,4,u,6>, lane 2 2107555842U, // <4,4,3,6>: Cost 2 ins <4,4,u,6>, lane 2
2109849601U, // <4,4,3,7>: Cost 2 ins <4,u,3,7>, lane 1 2109849601U, // <4,4,3,7>: Cost 2 ins <4,u,3,7>, lane 1
Show All 30 Lines
3181264898U, // <4,4,7,2>: Cost 3 ins <4,4,u,2>, lane 2 3181264898U, // <4,4,7,2>: Cost 3 ins <4,4,u,2>, lane 2
2845442636U, // <4,4,7,3>: Cost 3 vuzpr <4,4,4,4>, <0,7,2,3> 2845442636U, // <4,4,7,3>: Cost 3 vuzpr <4,4,4,4>, <0,7,2,3>
2107539458U, // <4,4,7,4>: Cost 2 ins <4,4,u,4>, lane 2 2107539458U, // <4,4,7,4>: Cost 2 ins <4,4,u,4>, lane 2
2107547650U, // <4,4,7,5>: Cost 2 ins <4,4,u,5>, lane 2 2107547650U, // <4,4,7,5>: Cost 2 ins <4,4,u,5>, lane 2
2131369984U, // <4,4,7,6>: Cost 2 ins <u,4,7,6>, lane 0 2131369984U, // <4,4,7,6>: Cost 2 ins <u,4,7,6>, lane 0
2040311013U, // <4,4,7,7>: Cost 2 vtrnr <4,4,6,7>, <4,4,6,7> 2040311013U, // <4,4,7,7>: Cost 2 vtrnr <4,4,6,7>, <4,4,6,7>
2107547650U, // <4,4,7,u>: Cost 2 ins <4,4,u,5>, lane 2 2107547650U, // <4,4,7,u>: Cost 2 ins <4,4,u,5>, lane 2
1974013260U, // <4,4,u,0>: Cost 2 vtrnl RHS, <4,6,0,2> 1974013260U, // <4,4,u,0>: Cost 2 vtrnl RHS, <4,6,0,2>
2109947905U, // <4,4,u,1>: Cost 2 ins <4,u,5,1>, lane 1 2107572229U, // <4,4,u,1>: Cost 2 ins <4,4,u,u>, lane 5
1705940782U, // <4,4,u,2>: Cost 2 vuzpl <4,6,4,6>, LHS 1705940782U, // <4,4,u,2>: Cost 2 vuzpl <4,6,4,6>, LHS
2107351043U, // <4,4,u,3>: Cost 2 ins <4,4,5,u>, lane 3 2107572229U, // <4,4,u,3>: Cost 2 ins <4,4,u,u>, lane 5
161926454U, // <4,4,u,4>: Cost 1 vdup0 RHS 161926454U, // <4,4,u,4>: Cost 1 vdup0 RHS
767896886U, // <4,4,u,5>: Cost 1 vzipl RHS, RHS 767896886U, // <4,4,u,5>: Cost 1 vzipl RHS, RHS
900271414U, // <4,4,u,6>: Cost 1 vtrnl RHS, RHS 900271414U, // <4,4,u,6>: Cost 1 vtrnl RHS, RHS
1036328961U, // <4,4,u,7>: Cost 1 ins RHS, lane 1 1036328961U, // <4,4,u,7>: Cost 1 ins RHS, lane 1
900271432U, // <4,4,u,u>: Cost 1 vtrnl RHS, RHS 900271432U, // <4,4,u,u>: Cost 1 vtrnl RHS, RHS
2108170242U, // <4,5,0,0>: Cost 2 ins <4,5,u,0>, lane 2 2108170242U, // <4,5,0,0>: Cost 2 ins <4,5,u,0>, lane 2
1557774438U, // <4,5,0,1>: Cost 2 vext2 <2,3,4,5>, LHS 1034493957U, // <4,5,0,1>: Cost 1 ins RHS, lane 5
1707294822U, // <4,5,0,2>: Cost 2 vuzpl <4,u,5,1>, LHS 1707294822U, // <4,5,0,2>: Cost 2 vuzpl <4,u,5,1>, LHS
2108194818U, // <4,5,0,3>: Cost 2 ins <4,5,u,3>, lane 2 2108194818U, // <4,5,0,3>: Cost 2 ins <4,5,u,3>, lane 2
2108203010U, // <4,5,0,4>: Cost 2 ins <4,5,u,4>, lane 2 2108203010U, // <4,5,0,4>: Cost 2 ins <4,5,u,4>, lane 2
2108211202U, // <4,5,0,5>: Cost 2 ins <4,5,u,5>, lane 2 2108211202U, // <4,5,0,5>: Cost 2 ins <4,5,u,5>, lane 2
2108219394U, // <4,5,0,6>: Cost 2 ins <4,5,u,6>, lane 2 2108219394U, // <4,5,0,6>: Cost 2 ins <4,5,u,6>, lane 2
1034485762U, // <4,5,0,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,0,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,5,0,u>: Cost 1 ins RHS, lane 2 1034493957U, // <4,5,0,u>: Cost 1 ins RHS, lane 5
2108170242U, // <4,5,1,0>: Cost 2 ins <4,5,u,0>, lane 2 2108170242U, // <4,5,1,0>: Cost 2 ins <4,5,u,0>, lane 2
2108178434U, // <4,5,1,1>: Cost 2 ins <4,5,u,1>, lane 2 2133540868U, // <4,5,1,1>: Cost 2 ins <u,u,1,1>, lane 4
2108186626U, // <4,5,1,2>: Cost 2 ins <4,5,u,2>, lane 2 2133549060U, // <4,5,1,2>: Cost 2 ins <u,u,1,2>, lane 4
1747599462U, // <4,5,1,3>: Cost 2 vuzpr <0,4,1,5>, LHS 1747599462U, // <4,5,1,3>: Cost 2 vuzpr <0,4,1,5>, LHS
2108203010U, // <4,5,1,4>: Cost 2 ins <4,5,u,4>, lane 2 2108203010U, // <4,5,1,4>: Cost 2 ins <4,5,u,4>, lane 2
2108211202U, // <4,5,1,5>: Cost 2 ins <4,5,u,5>, lane 2 2133573636U, // <4,5,1,5>: Cost 2 ins <u,u,1,5>, lane 4
2108219394U, // <4,5,1,6>: Cost 2 ins <4,5,u,6>, lane 2 2108219394U, // <4,5,1,6>: Cost 2 ins <4,5,u,6>, lane 2
1034485762U, // <4,5,1,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,1,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,5,1,u>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,1,u>: Cost 1 ins RHS, lane 2
2108170242U, // <4,5,2,0>: Cost 2 ins <4,5,u,0>, lane 2 2108170242U, // <4,5,2,0>: Cost 2 ins <4,5,u,0>, lane 2
2108178434U, // <4,5,2,1>: Cost 2 ins <4,5,u,1>, lane 2 2108178434U, // <4,5,2,1>: Cost 2 ins <4,5,u,1>, lane 2
2108186626U, // <4,5,2,2>: Cost 2 ins <4,5,u,2>, lane 2 2133622788U, // <4,5,2,2>: Cost 2 ins <u,u,2,2>, lane 4
1557776078U, // <4,5,2,3>: Cost 2 vext2 <2,3,4,5>, <2,3,4,5> 1059889156U, // <4,5,2,3>: Cost 1 ins LHS, lane 4
2108203010U, // <4,5,2,4>: Cost 2 ins <4,5,u,4>, lane 2 2108203010U, // <4,5,2,4>: Cost 2 ins <4,5,u,4>, lane 2
2108211202U, // <4,5,2,5>: Cost 2 ins <4,5,u,5>, lane 2 2108211202U, // <4,5,2,5>: Cost 2 ins <4,5,u,5>, lane 2
2108219394U, // <4,5,2,6>: Cost 2 ins <4,5,u,6>, lane 2 2133655556U, // <4,5,2,6>: Cost 2 ins <u,u,2,6>, lane 4
1034485762U, // <4,5,2,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,2,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,5,2,u>: Cost 1 ins RHS, lane 2 1059889156U, // <4,5,2,u>: Cost 1 ins LHS, lane 4
2108170242U, // <4,5,3,0>: Cost 2 ins <4,5,u,0>, lane 2 2133680132U, // <4,5,3,0>: Cost 2 ins <u,u,3,0>, lane 4
2108178434U, // <4,5,3,1>: Cost 2 ins <4,5,u,1>, lane 2 2108178434U, // <4,5,3,1>: Cost 2 ins <4,5,u,1>, lane 2
2108186626U, // <4,5,3,2>: Cost 2 ins <4,5,u,2>, lane 2 2133696516U, // <4,5,3,2>: Cost 2 ins <u,u,3,2>, lane 4
2108194818U, // <4,5,3,3>: Cost 2 ins <4,5,u,3>, lane 2 2133704708U, // <4,5,3,3>: Cost 2 ins <u,u,3,3>, lane 4
2108203010U, // <4,5,3,4>: Cost 2 ins <4,5,u,4>, lane 2 2133712900U, // <4,5,3,4>: Cost 2 ins <u,u,3,4>, lane 4
2108211202U, // <4,5,3,5>: Cost 2 ins <4,5,u,5>, lane 2 2108211202U, // <4,5,3,5>: Cost 2 ins <4,5,u,5>, lane 2
2108219394U, // <4,5,3,6>: Cost 2 ins <4,5,u,6>, lane 2 2108219394U, // <4,5,3,6>: Cost 2 ins <4,5,u,6>, lane 2
1034485762U, // <4,5,3,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,3,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,5,3,u>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,3,u>: Cost 1 ins RHS, lane 2
2108170242U, // <4,5,4,0>: Cost 2 ins <4,5,u,0>, lane 2 2108170242U, // <4,5,4,0>: Cost 2 ins <4,5,u,0>, lane 2
2108178434U, // <4,5,4,1>: Cost 2 ins <4,5,u,1>, lane 2 2108178434U, // <4,5,4,1>: Cost 2 ins <4,5,u,1>, lane 2
2108186626U, // <4,5,4,2>: Cost 2 ins <4,5,u,2>, lane 2 2108186626U, // <4,5,4,2>: Cost 2 ins <4,5,u,2>, lane 2
2108194818U, // <4,5,4,3>: Cost 2 ins <4,5,u,3>, lane 2 2108194818U, // <4,5,4,3>: Cost 2 ins <4,5,u,3>, lane 2
2109898753U, // <4,5,4,4>: Cost 2 ins <4,u,4,4>, lane 1 2109898753U, // <4,5,4,4>: Cost 2 ins <4,u,4,4>, lane 1
1747599698U, // <4,5,4,5>: Cost 2 vuzpr <0,4,1,5>, <0,4,1,5> 1034493957U, // <4,5,4,5>: Cost 1 ins RHS, lane 5
1707298102U, // <4,5,4,6>: Cost 2 vuzpl <4,u,5,1>, RHS 1707298102U, // <4,5,4,6>: Cost 2 vuzpl <4,u,5,1>, RHS
1034485762U, // <4,5,4,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,4,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,5,4,u>: Cost 1 ins RHS, lane 2 1034493957U, // <4,5,4,u>: Cost 1 ins RHS, lane 5
1503346790U, // <4,5,5,0>: Cost 2 vext1 <4,4,5,5>, LHS 1503346790U, // <4,5,5,0>: Cost 2 vext1 <4,4,5,5>, LHS
1839656656U, // <4,5,5,1>: Cost 2 vzipl RHS, <5,1,7,3> 1839656656U, // <4,5,5,1>: Cost 2 vzipl RHS, <5,1,7,3>
2108186626U, // <4,5,5,2>: Cost 2 ins <4,5,u,2>, lane 2 2108186626U, // <4,5,5,2>: Cost 2 ins <4,5,u,2>, lane 2
2108194818U, // <4,5,5,3>: Cost 2 ins <4,5,u,3>, lane 2 2108194818U, // <4,5,5,3>: Cost 2 ins <4,5,u,3>, lane 2
1839648710U, // <4,5,5,4>: Cost 2 vzipl RHS, <5,4,7,6> 1839648710U, // <4,5,5,4>: Cost 2 vzipl RHS, <5,4,7,6>
1839648772U, // <4,5,5,5>: Cost 2 vzipl RHS, <5,5,5,5> 1839648772U, // <4,5,5,5>: Cost 2 vzipl RHS, <5,5,5,5>
1839648866U, // <4,5,5,6>: Cost 2 vzipl RHS, <5,6,7,0> 1839648866U, // <4,5,5,6>: Cost 2 vzipl RHS, <5,6,7,0>
1034485762U, // <4,5,5,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,5,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,5,5,u>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,5,u>: Cost 1 ins RHS, lane 2
1034346499U, // <4,5,6,0>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,6,0>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,6,1>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,6,1>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,6,2>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,6,2>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,6,3>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,6,3>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,6,4>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,6,4>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,6,5>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,6,5>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,6,6>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,6,6>: Cost 1 ins RHS, lane 3
27705344U, // <4,5,6,7>: Cost 0 copy RHS 27705344U, // <4,5,6,7>: Cost 0 copy RHS
27705344U, // <4,5,6,u>: Cost 0 copy RHS 27705344U, // <4,5,6,u>: Cost 0 copy RHS
2108170242U, // <4,5,7,0>: Cost 2 ins <4,5,u,0>, lane 2 2133975044U, // <4,5,7,0>: Cost 2 ins <u,u,7,0>, lane 4
2108178434U, // <4,5,7,1>: Cost 2 ins <4,5,u,1>, lane 2 2108178434U, // <4,5,7,1>: Cost 2 ins <4,5,u,1>, lane 2
2108186626U, // <4,5,7,2>: Cost 2 ins <4,5,u,2>, lane 2 2108186626U, // <4,5,7,2>: Cost 2 ins <4,5,u,2>, lane 2
2108194818U, // <4,5,7,3>: Cost 2 ins <4,5,u,3>, lane 2 2133999620U, // <4,5,7,3>: Cost 2 ins <u,u,7,3>, lane 4
2108203010U, // <4,5,7,4>: Cost 2 ins <4,5,u,4>, lane 2 2134007812U, // <4,5,7,4>: Cost 2 ins <u,u,7,4>, lane 4
2108211202U, // <4,5,7,5>: Cost 2 ins <4,5,u,5>, lane 2 2108211202U, // <4,5,7,5>: Cost 2 ins <4,5,u,5>, lane 2
2108219394U, // <4,5,7,6>: Cost 2 ins <4,5,u,6>, lane 2 2134024196U, // <4,5,7,6>: Cost 2 ins <u,u,7,6>, lane 4
1034485762U, // <4,5,7,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,7,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,5,7,u>: Cost 1 ins RHS, lane 2 1034485762U, // <4,5,7,u>: Cost 1 ins RHS, lane 2
1034346499U, // <4,5,u,0>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,u,0>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,u,1>: Cost 1 ins RHS, lane 3 1034493957U, // <4,5,u,1>: Cost 1 ins RHS, lane 5
1034346499U, // <4,5,u,2>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,u,2>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,u,3>: Cost 1 ins RHS, lane 3 1059889156U, // <4,5,u,3>: Cost 1 ins LHS, lane 4
1034346499U, // <4,5,u,4>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,u,4>: Cost 1 ins RHS, lane 3
1034346499U, // <4,5,u,5>: Cost 1 ins RHS, lane 3 1034493957U, // <4,5,u,5>: Cost 1 ins RHS, lane 5
1034346499U, // <4,5,u,6>: Cost 1 ins RHS, lane 3 1034346499U, // <4,5,u,6>: Cost 1 ins RHS, lane 3
27705344U, // <4,5,u,7>: Cost 0 copy RHS 27705344U, // <4,5,u,7>: Cost 0 copy RHS
27705344U, // <4,5,u,u>: Cost 0 copy RHS 27705344U, // <4,5,u,u>: Cost 0 copy RHS
1705426944U, // <4,6,0,0>: Cost 2 vuzpl RHS, <0,0,0,0> 1705426944U, // <4,6,0,0>: Cost 2 vuzpl RHS, <0,0,0,0>
1545175142U, // <4,6,0,1>: Cost 2 vext2 <0,2,4,6>, LHS 1545175142U, // <4,6,0,1>: Cost 2 vext2 <0,2,4,6>, LHS
631685222U, // <4,6,0,2>: Cost 1 vuzpl RHS, LHS 631685222U, // <4,6,0,2>: Cost 1 vuzpl RHS, LHS
2108309507U, // <4,6,0,3>: Cost 2 ins <4,6,0,u>, lane 3 2108309507U, // <4,6,0,3>: Cost 2 ins <4,6,0,u>, lane 3
1705427148U, // <4,6,0,4>: Cost 2 vuzpl RHS, <0,2,4,6> 1705427148U, // <4,6,0,4>: Cost 2 vuzpl RHS, <0,2,4,6>
▲ Show 20 Lines • Show All 150 Lines • ▼ Show 20 Lines
2109587457U, // <4,7,u,2>: Cost 2 ins <4,u,0,2>, lane 1 2109587457U, // <4,7,u,2>: Cost 2 ins <4,u,0,2>, lane 1
2132893696U, // <4,7,u,3>: Cost 2 ins <u,7,1,3>, lane 0 2132893696U, // <4,7,u,3>: Cost 2 ins <u,7,1,3>, lane 0
1841640806U, // <4,7,u,4>: Cost 2 vzipl RHS, <7,4,5,6> 1841640806U, // <4,7,u,4>: Cost 2 vzipl RHS, <7,4,5,6>
1974015334U, // <4,7,u,5>: Cost 2 vtrnl RHS, <7,4,5,6> 1974015334U, // <4,7,u,5>: Cost 2 vtrnl RHS, <7,4,5,6>
2109915137U, // <4,7,u,6>: Cost 2 ins <4,u,4,6>, lane 1 2109915137U, // <4,7,u,6>: Cost 2 ins <4,u,4,6>, lane 1
1036328961U, // <4,7,u,7>: Cost 1 ins RHS, lane 1 1036328961U, // <4,7,u,7>: Cost 1 ins RHS, lane 1
1036328961U, // <4,7,u,u>: Cost 1 ins RHS, lane 1 1036328961U, // <4,7,u,u>: Cost 1 ins RHS, lane 1
1705574400U, // <4,u,0,0>: Cost 2 vuzpl RHS, <0,0,0,0> 1705574400U, // <4,u,0,0>: Cost 2 vuzpl RHS, <0,0,0,0>
1545191526U, // <4,u,0,1>: Cost 2 vext2 <0,2,4,u>, LHS 1034493957U, // <4,u,0,1>: Cost 1 ins RHS, lane 5
631832678U, // <4,u,0,2>: Cost 1 vuzpl RHS, LHS 631832678U, // <4,u,0,2>: Cost 1 vuzpl RHS, LHS
2108309507U, // <4,u,0,3>: Cost 2 ins <4,6,0,u>, lane 3 2108309507U, // <4,u,0,3>: Cost 2 ins <4,6,0,u>, lane 3
1705574604U, // <4,u,0,4>: Cost 2 vuzpl RHS, <0,2,4,6> 1705574604U, // <4,u,0,4>: Cost 2 vuzpl RHS, <0,2,4,6>
2107547650U, // <4,u,0,5>: Cost 2 ins <4,4,u,5>, lane 2 2107547650U, // <4,u,0,5>: Cost 2 ins <4,4,u,5>, lane 2
1974048922U, // <4,u,0,6>: Cost 2 vtrnl <4,6,0,2>, RHS 1974048922U, // <4,u,0,6>: Cost 2 vtrnl <4,6,0,2>, RHS
1034485762U, // <4,u,0,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,u,0,7>: Cost 1 ins RHS, lane 2
631832732U, // <4,u,0,u>: Cost 1 vuzpl RHS, LHS 631832732U, // <4,u,0,u>: Cost 1 vuzpl RHS, LHS
2108170242U, // <4,u,1,0>: Cost 2 ins <4,5,u,0>, lane 2 2108170242U, // <4,u,1,0>: Cost 2 ins <4,5,u,0>, lane 2
Show All 23 Lines
2107555842U, // <4,u,3,6>: Cost 2 ins <4,4,u,6>, lane 2 2107555842U, // <4,u,3,6>: Cost 2 ins <4,4,u,6>, lane 2
1034485762U, // <4,u,3,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,u,3,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,u,3,u>: Cost 1 ins RHS, lane 2 1034485762U, // <4,u,3,u>: Cost 1 ins RHS, lane 2
1705577804U, // <4,u,4,0>: Cost 2 vuzpl RHS, <4,6,0,2> 1705577804U, // <4,u,4,0>: Cost 2 vuzpl RHS, <4,6,0,2>
2104860674U, // <4,u,4,1>: Cost 2 ins <4,0,u,1>, lane 2 2104860674U, // <4,u,4,1>: Cost 2 ins <4,0,u,1>, lane 2
1974376238U, // <4,u,4,2>: Cost 2 vtrnl <4,6,4,6>, LHS 1974376238U, // <4,u,4,2>: Cost 2 vtrnl <4,6,4,6>, LHS
2108604419U, // <4,u,4,3>: Cost 2 ins <4,6,4,u>, lane 3 2108604419U, // <4,u,4,3>: Cost 2 ins <4,6,4,u>, lane 3
161926454U, // <4,u,4,4>: Cost 1 vdup0 RHS 161926454U, // <4,u,4,4>: Cost 1 vdup0 RHS
1545194806U, // <4,u,4,5>: Cost 2 vext2 <0,2,4,u>, RHS 1034493957U, // <4,u,4,5>: Cost 1 ins RHS, lane 5
631835958U, // <4,u,4,6>: Cost 1 vuzpl RHS, RHS 631835958U, // <4,u,4,6>: Cost 1 vuzpl RHS, RHS
1034485762U, // <4,u,4,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,u,4,7>: Cost 1 ins RHS, lane 2
631835976U, // <4,u,4,u>: Cost 1 vuzpl RHS, RHS 631835976U, // <4,u,4,u>: Cost 1 vuzpl RHS, RHS
1839650515U, // <4,u,5,0>: Cost 2 vzipl RHS, <u,0,1,2> 1839650515U, // <4,u,5,0>: Cost 2 vzipl RHS, <u,0,1,2>
765908782U, // <4,u,5,1>: Cost 1 vzipl RHS, LHS 765908782U, // <4,u,5,1>: Cost 1 vzipl RHS, LHS
1839650693U, // <4,u,5,2>: Cost 2 vzipl RHS, <u,2,3,0> 1839650693U, // <4,u,5,2>: Cost 2 vzipl RHS, <u,2,3,0>
2016035485U, // <4,u,5,3>: Cost 2 vtrnr <0,4,1,5>, LHS 2016035485U, // <4,u,5,3>: Cost 2 vtrnr <0,4,1,5>, LHS
1839650879U, // <4,u,5,4>: Cost 2 vzipl RHS, <u,4,5,6> 1839650879U, // <4,u,5,4>: Cost 2 vzipl RHS, <u,4,5,6>
765909146U, // <4,u,5,5>: Cost 1 vzipl RHS, RHS 765909146U, // <4,u,5,5>: Cost 1 vzipl RHS, RHS
1618172058U, // <4,u,5,6>: Cost 2 vext3 <1,2,3,4>, RHS 1618172058U, // <4,u,5,6>: Cost 2 vext3 <1,2,3,4>, RHS
1034485762U, // <4,u,5,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,u,5,7>: Cost 1 ins RHS, lane 2
765909349U, // <4,u,5,u>: Cost 1 vzipl RHS, LHS 765909349U, // <4,u,5,u>: Cost 1 vzipl RHS, LHS
1034346499U, // <4,u,6,0>: Cost 1 ins RHS, lane 3 1034346499U, // <4,u,6,0>: Cost 1 ins RHS, lane 3
1034346499U, // <4,u,6,1>: Cost 1 ins RHS, lane 3 1034346499U, // <4,u,6,1>: Cost 1 ins RHS, lane 3
900126510U, // <4,u,6,2>: Cost 1 vtrnl RHS, LHS 900126510U, // <4,u,6,2>: Cost 1 vtrnl RHS, LHS
1034346499U, // <4,u,6,3>: Cost 1 ins RHS, lane 3 1034346499U, // <4,u,6,3>: Cost 1 ins RHS, lane 3
1034346499U, // <4,u,6,4>: Cost 1 ins RHS, lane 3 1034346499U, // <4,u,6,4>: Cost 1 ins RHS, lane 3
1034346499U, // <4,u,6,5>: Cost 1 ins RHS, lane 3 1034346499U, // <4,u,6,5>: Cost 1 ins RHS, lane 3
900126874U, // <4,u,6,6>: Cost 1 vtrnl RHS, RHS 900126874U, // <4,u,6,6>: Cost 1 vtrnl RHS, RHS
27705344U, // <4,u,6,7>: Cost 0 copy RHS 27705344U, // <4,u,6,7>: Cost 0 copy RHS
27705344U, // <4,u,6,u>: Cost 0 copy RHS 27705344U, // <4,u,6,u>: Cost 0 copy RHS
2132647936U, // <4,u,7,0>: Cost 2 ins <u,6,7,0>, lane 0 2133975044U, // <4,u,7,0>: Cost 2 ins <u,u,7,0>, lane 4
1705579514U, // <4,u,7,1>: Cost 2 vuzpl RHS, <7,0,1,2> 1705579514U, // <4,u,7,1>: Cost 2 vuzpl RHS, <7,0,1,2>
2104868866U, // <4,u,7,2>: Cost 2 ins <4,0,u,2>, lane 2 2104868866U, // <4,u,7,2>: Cost 2 ins <4,0,u,2>, lane 2
2129354752U, // <4,u,7,3>: Cost 2 ins <u,1,7,3>, lane 0 2129354752U, // <4,u,7,3>: Cost 2 ins <u,1,7,3>, lane 0
2132680704U, // <4,u,7,4>: Cost 2 ins <u,6,7,4>, lane 0 2134007812U, // <4,u,7,4>: Cost 2 ins <u,u,7,4>, lane 4
1705579878U, // <4,u,7,5>: Cost 2 vuzpl RHS, <7,4,5,6> 1705579878U, // <4,u,7,5>: Cost 2 vuzpl RHS, <7,4,5,6>
2131369984U, // <4,u,7,6>: Cost 2 ins <u,4,7,6>, lane 0 2131369984U, // <4,u,7,6>: Cost 2 ins <u,4,7,6>, lane 0
1034485762U, // <4,u,7,7>: Cost 1 ins RHS, lane 2 1034485762U, // <4,u,7,7>: Cost 1 ins RHS, lane 2
1034485762U, // <4,u,7,u>: Cost 1 ins RHS, lane 2 1034485762U, // <4,u,7,u>: Cost 1 ins RHS, lane 2
1034346499U, // <4,u,u,0>: Cost 1 ins RHS, lane 3 1034346499U, // <4,u,u,0>: Cost 1 ins RHS, lane 3
767899438U, // <4,u,u,1>: Cost 1 vzipl RHS, LHS 767899438U, // <4,u,u,1>: Cost 1 vzipl RHS, LHS
631838510U, // <4,u,u,2>: Cost 1 vuzpl RHS, LHS 631838510U, // <4,u,u,2>: Cost 1 vuzpl RHS, LHS
1055244288U, // <4,u,u,3>: Cost 1 ins LHS, lane 0 1055244288U, // <4,u,u,3>: Cost 1 ins LHS, lane 0
161926454U, // <4,u,u,4>: Cost 1 vdup0 RHS 161926454U, // <4,u,u,4>: Cost 1 vdup0 RHS
767899802U, // <4,u,u,5>: Cost 1 vzipl RHS, RHS 767899802U, // <4,u,u,5>: Cost 1 vzipl RHS, RHS
631838874U, // <4,u,u,6>: Cost 1 vuzpl RHS, RHS 631838874U, // <4,u,u,6>: Cost 1 vuzpl RHS, RHS
27705344U, // <4,u,u,7>: Cost 0 copy RHS 27705344U, // <4,u,u,7>: Cost 0 copy RHS
27705344U, // <4,u,u,u>: Cost 0 copy RHS 27705344U, // <4,u,u,u>: Cost 0 copy RHS
2128150528U, // <5,0,0,0>: Cost 2 ins <u,0,0,0>, lane 0 2128150528U, // <5,0,0,0>: Cost 2 ins <u,0,0,0>, lane 0
2687123466U, // <5,0,0,1>: Cost 3 vext3 <0,4,1,5>, <0,0,1,1> 2687123466U, // <5,0,0,1>: Cost 3 vext3 <0,4,1,5>, <0,0,1,1>
2687123476U, // <5,0,0,2>: Cost 3 vext3 <0,4,1,5>, <0,0,2,2> 2687123476U, // <5,0,0,2>: Cost 3 vext3 <0,4,1,5>, <0,0,2,2>
2846220309U, // <5,0,0,3>: Cost 3 vuzpr <4,5,6,0>, <0,0,2,3> 2846220309U, // <5,0,0,3>: Cost 3 vuzpr <4,5,6,0>, <0,0,2,3>
2642166098U, // <5,0,0,4>: Cost 3 vext2 <4,1,5,0>, <0,4,1,5> 2642166098U, // <5,0,0,4>: Cost 3 vext2 <4,1,5,0>, <0,4,1,5>
2583318482U, // <5,0,0,5>: Cost 3 vext1 <5,5,0,0>, <5,5,0,0> 2583318482U, // <5,0,0,5>: Cost 3 vext1 <5,5,0,0>, <5,5,0,0>
3189334017U, // <5,0,0,6>: Cost 3 ins <5,u,0,6>, lane 1 3189334017U, // <5,0,0,6>: Cost 3 ins <5,u,0,6>, lane 1
2846223265U, // <5,0,0,7>: Cost 3 vuzpr <4,5,6,0>, <4,0,6,7> 2846223265U, // <5,0,0,7>: Cost 3 vuzpr <4,5,6,0>, <4,0,6,7>
2128150528U, // <5,0,0,u>: Cost 2 ins <u,0,0,0>, lane 0 2128150528U, // <5,0,0,u>: Cost 2 ins <u,0,0,0>, lane 0
2559434854U, // <5,0,1,0>: Cost 3 vext1 <1,5,0,1>, LHS 1503608934U, // <5,0,1,0>: Cost 2 vext1 <4,5,0,1>, LHS
1843003494U, // <5,0,1,1>: Cost 2 vzipl <5,1,7,3>, LHS 1843003494U, // <5,0,1,1>: Cost 2 vzipl <5,1,7,3>, LHS
1613381734U, // <5,0,1,2>: Cost 2 vext3 <0,4,1,5>, LHS 1613381734U, // <5,0,1,2>: Cost 2 vext3 <0,4,1,5>, LHS
2115641345U, // <5,0,1,3>: Cost 2 ins <5,u,1,3>, lane 1 2115641345U, // <5,0,1,3>: Cost 2 ins <5,u,1,3>, lane 1
2559438134U, // <5,0,1,4>: Cost 3 vext1 <1,5,0,1>, RHS 1611612282U, // <5,0,1,4>: Cost 2 vext3 <0,1,4,5>, <0,1,4,5>
2583326675U, // <5,0,1,5>: Cost 3 vext1 <5,5,0,1>, <5,5,0,1> 2583326675U, // <5,0,1,5>: Cost 3 vext1 <5,5,0,1>, <5,5,0,1>
3202015232U, // <5,0,1,6>: Cost 3 ins <u,0,1,6>, lane 0 3202015232U, // <5,0,1,6>: Cost 3 ins <u,0,1,6>, lane 0
3189415937U, // <5,0,1,7>: Cost 3 ins <5,u,1,7>, lane 1 3189415937U, // <5,0,1,7>: Cost 3 ins <5,u,1,7>, lane 1
1613381788U, // <5,0,1,u>: Cost 2 vext3 <0,4,1,5>, LHS 1613381788U, // <5,0,1,u>: Cost 2 vext3 <0,4,1,5>, LHS
2686017700U, // <5,0,2,0>: Cost 3 vext3 <0,2,4,5>, <0,2,0,2> 2686017700U, // <5,0,2,0>: Cost 3 vext3 <0,2,4,5>, <0,2,0,2>
2685796528U, // <5,0,2,1>: Cost 3 vext3 <0,2,1,5>, <0,2,1,5> 2685796528U, // <5,0,2,1>: Cost 3 vext3 <0,2,1,5>, <0,2,1,5>
2128314368U, // <5,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0 2128314368U, // <5,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0
2128322560U, // <5,0,2,3>: Cost 2 ins <u,0,2,3>, lane 0 2128322560U, // <5,0,2,3>: Cost 2 ins <u,0,2,3>, lane 0
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
2046853227U, // <5,1,5,u>: Cost 2 vtrnr <5,5,5,5>, LHS 2046853227U, // <5,1,5,u>: Cost 2 vtrnr <5,5,5,5>, LHS
2920039158U, // <5,1,6,0>: Cost 3 vzipl <5,6,7,0>, <1,0,3,2> 2920039158U, // <5,1,6,0>: Cost 3 vzipl <5,6,7,0>, <1,0,3,2>
2961834642U, // <5,1,6,1>: Cost 3 vzipr <1,4,5,6>, <0,u,1,1> 2961834642U, // <5,1,6,1>: Cost 3 vzipr <1,4,5,6>, <0,u,1,1>
2973780118U, // <5,1,6,2>: Cost 3 vzipr <3,4,5,6>, <3,0,1,2> 2973780118U, // <5,1,6,2>: Cost 3 vzipr <3,4,5,6>, <3,0,1,2>
2111512578U, // <5,1,6,3>: Cost 2 ins <5,1,u,3>, lane 2 2111512578U, // <5,1,6,3>: Cost 2 ins <5,1,u,3>, lane 2
2224227480U, // <5,1,6,4>: Cost 3 vrev <1,5,4,6> 2224227480U, // <5,1,6,4>: Cost 3 vrev <1,5,4,6>
2973778258U, // <5,1,6,5>: Cost 3 vzipr <3,4,5,6>, <0,4,1,5> 2973778258U, // <5,1,6,5>: Cost 3 vzipr <3,4,5,6>, <0,4,1,5>
2646823736U, // <5,1,6,6>: Cost 3 vext2 <4,u,5,1>, <6,6,6,6> 2646823736U, // <5,1,6,6>: Cost 3 vext2 <4,u,5,1>, <6,6,6,6>
2129313792U, // <5,1,6,7>: Cost 2 ins <u,1,6,7>, lane 0 2111553541U, // <5,1,6,7>: Cost 2 ins <5,1,u,u>, lane 5
2111512578U, // <5,1,6,u>: Cost 2 ins <5,1,u,3>, lane 2 2111512578U, // <5,1,6,u>: Cost 2 ins <5,1,u,3>, lane 2
2116059137U, // <5,1,7,0>: Cost 2 ins <5,u,7,0>, lane 1 2116059137U, // <5,1,7,0>: Cost 2 ins <5,u,7,0>, lane 1
2040972084U, // <5,1,7,1>: Cost 2 vtrnr RHS, <1,1,1,1> 2040972084U, // <5,1,7,1>: Cost 2 vtrnr RHS, <1,1,1,1>
2111479811U, // <5,1,7,2>: Cost 2 ins <5,1,7,u>, lane 3 2111479811U, // <5,1,7,2>: Cost 2 ins <5,1,7,u>, lane 3
967229542U, // <5,1,7,3>: Cost 1 vtrnr RHS, LHS 967229542U, // <5,1,7,3>: Cost 1 vtrnr RHS, LHS
2116091905U, // <5,1,7,4>: Cost 2 ins <5,u,7,4>, lane 1 2116091905U, // <5,1,7,4>: Cost 2 ins <5,u,7,4>, lane 1
2111479811U, // <5,1,7,5>: Cost 2 ins <5,1,7,u>, lane 3 2111479811U, // <5,1,7,5>: Cost 2 ins <5,1,7,u>, lane 3
2116108289U, // <5,1,7,6>: Cost 2 ins <5,u,7,6>, lane 1 2116108289U, // <5,1,7,6>: Cost 2 ins <5,u,7,6>, lane 1
▲ Show 20 Lines • Show All 166 Lines • ▼ Show 20 Lines
2961187574U, // <5,3,u,2>: Cost 3 vzipr <1,3,5,u>, <1,0,3,2> 2961187574U, // <5,3,u,2>: Cost 3 vzipr <1,3,5,u>, <1,0,3,2>
2040980440U, // <5,3,u,3>: Cost 2 vtrnr RHS, <1,3,1,3> 2040980440U, // <5,3,u,3>: Cost 2 vtrnr RHS, <1,3,1,3>
1485974838U, // <5,3,u,4>: Cost 2 vext1 <1,5,3,u>, RHS 1485974838U, // <5,3,u,4>: Cost 2 vext1 <1,5,3,u>, RHS
2040981198U, // <5,3,u,5>: Cost 2 vtrnr RHS, <2,3,4,5> 2040981198U, // <5,3,u,5>: Cost 2 vtrnr RHS, <2,3,4,5>
2116108289U, // <5,3,u,6>: Cost 2 ins <5,u,7,6>, lane 1 2116108289U, // <5,3,u,6>: Cost 2 ins <5,u,7,6>, lane 1
2040980480U, // <5,3,u,7>: Cost 2 vtrnr RHS, <1,3,5,7> 2040980480U, // <5,3,u,7>: Cost 2 vtrnr RHS, <1,3,5,7>
1485977390U, // <5,3,u,u>: Cost 2 vext1 <1,5,3,u>, LHS 1485977390U, // <5,3,u,u>: Cost 2 vext1 <1,5,3,u>, LHS
3189284865U, // <5,4,0,0>: Cost 3 ins <5,u,0,0>, lane 1 3189284865U, // <5,4,0,0>: Cost 3 ins <5,u,0,0>, lane 1
2636890214U, // <5,4,0,1>: Cost 3 vext2 <3,2,5,4>, LHS 2113544197U, // <5,4,0,1>: Cost 2 ins <5,4,u,u>, lane 5
2781626470U, // <5,4,0,2>: Cost 3 vuzpl <5,0,4,1>, LHS 2781626470U, // <5,4,0,2>: Cost 3 vuzpl <5,0,4,1>, LHS
3114656089U, // <5,4,0,3>: Cost 3 vtrnr <4,5,6,0>, <0,4,2,3> 2242022676U, // <5,4,0,3>: Cost 3 vrev <4,5,3,0>
2642198866U, // <5,4,0,4>: Cost 3 vext2 <4,1,5,4>, <0,4,1,5> 2642198866U, // <5,4,0,4>: Cost 3 vext2 <4,1,5,4>, <0,4,1,5>
2687126418U, // <5,4,0,5>: Cost 3 vext3 <0,4,1,5>, <4,0,5,1> 2687126418U, // <5,4,0,5>: Cost 3 vext3 <0,4,1,5>, <4,0,5,1>
2113527810U, // <5,4,0,6>: Cost 2 ins <5,4,u,6>, lane 2 2113527810U, // <5,4,0,6>: Cost 2 ins <5,4,u,6>, lane 2
3114659045U, // <5,4,0,7>: Cost 3 vtrnr <4,5,6,0>, <4,4,6,7> 3114659045U, // <5,4,0,7>: Cost 3 vtrnr <4,5,6,0>, <4,4,6,7>
2113527810U, // <5,4,0,u>: Cost 2 ins <5,4,u,6>, lane 2 2113544197U, // <5,4,0,u>: Cost 2 ins <5,4,u,u>, lane 5
2241809658U, // <5,4,1,0>: Cost 3 vrev <4,5,0,1> 1168067834U, // <5,4,1,0>: Cost 2 vrev <4,5,0,1>
3189366785U, // <5,4,1,1>: Cost 3 ins <5,u,1,1>, lane 1 3189366785U, // <5,4,1,1>: Cost 3 ins <5,u,1,1>, lane 1
3204636672U, // <5,4,1,2>: Cost 3 ins <u,4,1,2>, lane 0 3204636672U, // <5,4,1,2>: Cost 3 ins <u,4,1,2>, lane 0
2115641345U, // <5,4,1,3>: Cost 2 ins <5,u,1,3>, lane 1 2115641345U, // <5,4,1,3>: Cost 2 ins <5,u,1,3>, lane 1
2982366416U, // <5,4,1,4>: Cost 3 vzipr <4,u,5,1>, <4,4,4,4> 2982366416U, // <5,4,1,4>: Cost 3 vzipr <4,u,5,1>, <4,4,4,4>
1843006774U, // <5,4,1,5>: Cost 2 vzipl <5,1,7,3>, RHS 1843006774U, // <5,4,1,5>: Cost 2 vzipl <5,1,7,3>, RHS
1980763446U, // <5,4,1,6>: Cost 2 vtrnl <5,7,1,3>, RHS 1980763446U, // <5,4,1,6>: Cost 2 vtrnl <5,7,1,3>, RHS
3189415937U, // <5,4,1,7>: Cost 3 ins <5,u,1,7>, lane 1 3189415937U, // <5,4,1,7>: Cost 3 ins <5,u,1,7>, lane 1
1843007017U, // <5,4,1,u>: Cost 2 vzipl <5,1,7,3>, RHS 1843007017U, // <5,4,1,u>: Cost 2 vzipl <5,1,7,3>, RHS
3204694016U, // <5,4,2,0>: Cost 3 ins <u,4,2,0>, lane 0 3204694016U, // <5,4,2,0>: Cost 3 ins <u,4,2,0>, lane 0
3050597641U, // <5,4,2,1>: Cost 3 vtrnl <5,1,2,3>, <4,5,1,7> 2241891588U, // <5,4,2,1>: Cost 3 vrev <4,5,1,2>
3189448705U, // <5,4,2,2>: Cost 3 ins <5,u,2,2>, lane 1 3189448705U, // <5,4,2,2>: Cost 3 ins <5,u,2,2>, lane 1
2130976768U, // <5,4,2,3>: Cost 2 ins <u,4,2,3>, lane 0 2113544197U, // <5,4,2,3>: Cost 2 ins <5,4,u,u>, lane 5
3204726784U, // <5,4,2,4>: Cost 3 ins <u,4,2,4>, lane 0 3204726784U, // <5,4,2,4>: Cost 3 ins <u,4,2,4>, lane 0
2973746894U, // <5,4,2,5>: Cost 3 vzipr <3,4,5,2>, <2,3,4,5> 2973746894U, // <5,4,2,5>: Cost 3 vzipr <3,4,5,2>, <2,3,4,5>
2131001344U, // <5,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0 2131001344U, // <5,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0
3114675429U, // <5,4,2,7>: Cost 3 vtrnr <4,5,6,2>, <4,4,6,7> 3114675429U, // <5,4,2,7>: Cost 3 vtrnr <4,5,6,2>, <4,4,6,7>
2131001344U, // <5,4,2,u>: Cost 2 ins <u,4,2,6>, lane 0 2113544197U, // <5,4,2,u>: Cost 2 ins <5,4,u,u>, lane 5
3204767744U, // <5,4,3,0>: Cost 3 ins <u,4,3,0>, lane 0 3204767744U, // <5,4,3,0>: Cost 3 ins <u,4,3,0>, lane 0
2241899781U, // <5,4,3,1>: Cost 3 vrev <4,5,1,3> 2241899781U, // <5,4,3,1>: Cost 3 vrev <4,5,1,3>
2636892510U, // <5,4,3,2>: Cost 3 vext2 <3,2,5,4>, <3,2,5,4> 1168231694U, // <5,4,3,2>: Cost 2 vrev <4,5,2,3>
3189530625U, // <5,4,3,3>: Cost 3 ins <5,u,3,3>, lane 1 3189530625U, // <5,4,3,3>: Cost 3 ins <5,u,3,3>, lane 1
2638219776U, // <5,4,3,4>: Cost 3 vext2 <3,4,5,4>, <3,4,5,4> 2638219776U, // <5,4,3,4>: Cost 3 vext2 <3,4,5,4>, <3,4,5,4>
2978399950U, // <5,4,3,5>: Cost 3 vzipr <4,2,5,3>, <2,3,4,5> 2978399950U, // <5,4,3,5>: Cost 3 vzipr <4,2,5,3>, <2,3,4,5>
2113527810U, // <5,4,3,6>: Cost 2 ins <5,4,u,6>, lane 2 2113527810U, // <5,4,3,6>: Cost 2 ins <5,4,u,6>, lane 2
2840355840U, // <5,4,3,7>: Cost 3 vuzpr <3,5,7,4>, <1,3,5,7> 2840355840U, // <5,4,3,7>: Cost 3 vuzpr <3,5,7,4>, <1,3,5,7>
2113527810U, // <5,4,3,u>: Cost 2 ins <5,4,u,6>, lane 2 2113527810U, // <5,4,3,u>: Cost 2 ins <5,4,u,6>, lane 2
2918763410U, // <5,4,4,0>: Cost 3 vzipl <5,4,7,6>, <4,0,5,1> 2918763410U, // <5,4,4,0>: Cost 3 vzipl <5,4,7,6>, <4,0,5,1>
2642201574U, // <5,4,4,1>: Cost 3 vext2 <4,1,5,4>, <4,1,5,4> 2642201574U, // <5,4,4,1>: Cost 3 vext2 <4,1,5,4>, <4,1,5,4>
3186991107U, // <5,4,4,2>: Cost 3 ins <5,4,4,u>, lane 3 3186991107U, // <5,4,4,2>: Cost 3 ins <5,4,4,u>, lane 3
3186991107U, // <5,4,4,3>: Cost 3 ins <5,4,4,u>, lane 3 3186991107U, // <5,4,4,3>: Cost 3 ins <5,4,4,u>, lane 3
2131132416U, // <5,4,4,4>: Cost 2 ins <u,4,4,4>, lane 0 2131132416U, // <5,4,4,4>: Cost 2 ins <u,4,4,4>, lane 0
1845022006U, // <5,4,4,5>: Cost 2 vzipl <5,4,7,6>, RHS 1845022006U, // <5,4,4,5>: Cost 2 vzipl <5,4,7,6>, RHS
2113527810U, // <5,4,4,6>: Cost 2 ins <5,4,u,6>, lane 2 2113527810U, // <5,4,4,6>: Cost 2 ins <5,4,u,6>, lane 2
2646183372U, // <5,4,4,7>: Cost 3 vext2 <4,7,5,4>, <4,7,5,4> 2646183372U, // <5,4,4,7>: Cost 3 vext2 <4,7,5,4>, <4,7,5,4>
1845022249U, // <5,4,4,u>: Cost 2 vzipl <5,4,7,6>, RHS 1845022249U, // <5,4,4,u>: Cost 2 vzipl <5,4,7,6>, RHS
2559762534U, // <5,4,5,0>: Cost 3 vext1 <1,5,4,5>, LHS 1503936614U, // <5,4,5,0>: Cost 2 vext1 <4,5,4,5>, LHS
2559763607U, // <5,4,5,1>: Cost 3 vext1 <1,5,4,5>, <1,5,4,5> 2559763607U, // <5,4,5,1>: Cost 3 vext1 <1,5,4,5>, <1,5,4,5>
2698628366U, // <5,4,5,2>: Cost 3 vext3 <2,3,4,5>, <4,5,2,3> 2698628366U, // <5,4,5,2>: Cost 3 vext3 <2,3,4,5>, <4,5,2,3>
3189678081U, // <5,4,5,3>: Cost 3 ins <5,u,5,3>, lane 1 3189678081U, // <5,4,5,3>: Cost 3 ins <5,u,5,3>, lane 1
1772514611U, // <5,4,5,4>: Cost 2 vuzpr <4,5,6,4>, <4,5,6,4> 1168395554U, // <5,4,5,4>: Cost 2 vrev <4,5,4,5>
1845529910U, // <5,4,5,5>: Cost 2 vzipl <5,5,5,5>, RHS 1845529910U, // <5,4,5,5>: Cost 2 vzipl <5,5,5,5>, RHS
1613385014U, // <5,4,5,6>: Cost 2 vext3 <0,4,1,5>, RHS 1613385014U, // <5,4,5,6>: Cost 2 vext3 <0,4,1,5>, RHS
2115969025U, // <5,4,5,7>: Cost 2 ins <5,u,5,7>, lane 1 2115969025U, // <5,4,5,7>: Cost 2 ins <5,u,5,7>, lane 1
1613385032U, // <5,4,5,u>: Cost 2 vext3 <0,4,1,5>, RHS 1613385032U, // <5,4,5,u>: Cost 2 vext3 <0,4,1,5>, RHS
2559770726U, // <5,4,6,0>: Cost 3 vext1 <1,5,4,6>, LHS 2559770726U, // <5,4,6,0>: Cost 3 vext1 <1,5,4,6>, LHS
2559771800U, // <5,4,6,1>: Cost 3 vext1 <1,5,4,6>, <1,5,4,6> 2559771800U, // <5,4,6,1>: Cost 3 vext1 <1,5,4,6>, <1,5,4,6>
3189743617U, // <5,4,6,2>: Cost 3 ins <5,u,6,2>, lane 1 3189743617U, // <5,4,6,2>: Cost 3 ins <5,u,6,2>, lane 1
2571717194U, // <5,4,6,3>: Cost 3 vext1 <3,5,4,6>, <3,5,4,6> 2571717194U, // <5,4,6,3>: Cost 3 vext1 <3,5,4,6>, <3,5,4,6>
2559774006U, // <5,4,6,4>: Cost 3 vext1 <1,5,4,6>, RHS 2559774006U, // <5,4,6,4>: Cost 3 vext1 <1,5,4,6>, RHS
1846299958U, // <5,4,6,5>: Cost 2 vzipl <5,6,7,0>, RHS 1846299958U, // <5,4,6,5>: Cost 2 vzipl <5,6,7,0>, RHS
2131296256U, // <5,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0 2131296256U, // <5,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0
2131304448U, // <5,4,6,7>: Cost 2 ins <u,4,6,7>, lane 0 2113544197U, // <5,4,6,7>: Cost 2 ins <5,4,u,u>, lane 5
1846300201U, // <5,4,6,u>: Cost 2 vzipl <5,6,7,0>, RHS 1846300201U, // <5,4,6,u>: Cost 2 vzipl <5,6,7,0>, RHS
2116059137U, // <5,4,7,0>: Cost 2 ins <5,u,7,0>, lane 1 2116059137U, // <5,4,7,0>: Cost 2 ins <5,u,7,0>, lane 1
2113470467U, // <5,4,7,1>: Cost 2 ins <5,4,7,u>, lane 3 2113470467U, // <5,4,7,1>: Cost 2 ins <5,4,7,u>, lane 3
2113470467U, // <5,4,7,2>: Cost 2 ins <5,4,7,u>, lane 3 2113470467U, // <5,4,7,2>: Cost 2 ins <5,4,7,u>, lane 3
2116083713U, // <5,4,7,3>: Cost 2 ins <5,u,7,3>, lane 1 2116083713U, // <5,4,7,3>: Cost 2 ins <5,u,7,3>, lane 1
2040974544U, // <5,4,7,4>: Cost 2 vtrnr RHS, <4,4,4,4> 2040974544U, // <5,4,7,4>: Cost 2 vtrnr RHS, <4,4,4,4>
2040971602U, // <5,4,7,5>: Cost 2 vtrnr RHS, <0,4,1,5> 2040971602U, // <5,4,7,5>: Cost 2 vtrnr RHS, <0,4,1,5>
94817590U, // <5,4,7,6>: Cost 1 vrev RHS 94817590U, // <5,4,7,6>: Cost 1 vrev RHS
2116116481U, // <5,4,7,7>: Cost 2 ins <5,u,7,7>, lane 1 2116116481U, // <5,4,7,7>: Cost 2 ins <5,u,7,7>, lane 1
94965064U, // <5,4,7,u>: Cost 1 vrev RHS 94965064U, // <5,4,7,u>: Cost 1 vrev RHS
2116059137U, // <5,4,u,0>: Cost 2 ins <5,u,7,0>, lane 1 2116059137U, // <5,4,u,0>: Cost 2 ins <5,u,7,0>, lane 1
2113470467U, // <5,4,u,1>: Cost 2 ins <5,4,7,u>, lane 3 2113544197U, // <5,4,u,1>: Cost 2 ins <5,4,u,u>, lane 5
2113470467U, // <5,4,u,2>: Cost 2 ins <5,4,7,u>, lane 3 2113470467U, // <5,4,u,2>: Cost 2 ins <5,4,7,u>, lane 3
2115641345U, // <5,4,u,3>: Cost 2 ins <5,u,1,3>, lane 1 2115641345U, // <5,4,u,3>: Cost 2 ins <5,u,1,3>, lane 1
2040982736U, // <5,4,u,4>: Cost 2 vtrnr RHS, <4,4,4,4> 2040982736U, // <5,4,u,4>: Cost 2 vtrnr RHS, <4,4,4,4>
2040979794U, // <5,4,u,5>: Cost 2 vtrnr RHS, <0,4,1,5> 2040979794U, // <5,4,u,5>: Cost 2 vtrnr RHS, <0,4,1,5>
94825783U, // <5,4,u,6>: Cost 1 vrev RHS 94825783U, // <5,4,u,6>: Cost 1 vrev RHS
2115969025U, // <5,4,u,7>: Cost 2 ins <5,u,5,7>, lane 1 2115969025U, // <5,4,u,7>: Cost 2 ins <5,u,5,7>, lane 1
94973257U, // <5,4,u,u>: Cost 1 vrev RHS 94973257U, // <5,4,u,u>: Cost 1 vrev RHS
2040917295U, // <5,5,0,0>: Cost 2 vtrnr <4,5,6,0>, <4,5,6,0> 2040917295U, // <5,5,0,0>: Cost 2 vtrnr <4,5,6,0>, <4,5,6,0>
Show All 12 Lines
2715217591U, // <5,5,1,4>: Cost 3 vext3 <5,1,4,5>, <5,1,4,5> 2715217591U, // <5,5,1,4>: Cost 3 vext3 <5,1,4,5>, <5,1,4,5>
2114183170U, // <5,5,1,5>: Cost 2 ins <5,5,u,5>, lane 2 2114183170U, // <5,5,1,5>: Cost 2 ins <5,5,u,5>, lane 2
2982365698U, // <5,5,1,6>: Cost 3 vzipr <4,u,5,1>, <3,4,5,6> 2982365698U, // <5,5,1,6>: Cost 3 vzipr <4,u,5,1>, <3,4,5,6>
2114199554U, // <5,5,1,7>: Cost 2 ins <5,5,u,7>, lane 2 2114199554U, // <5,5,1,7>: Cost 2 ins <5,5,u,7>, lane 2
1778417771U, // <5,5,1,u>: Cost 2 vuzpr <5,5,5,5>, LHS 1778417771U, // <5,5,1,u>: Cost 2 vuzpr <5,5,5,5>, LHS
2785052326U, // <5,5,2,0>: Cost 3 vuzpl <5,5,5,5>, <2,3,0,1> 2785052326U, // <5,5,2,0>: Cost 3 vuzpl <5,5,5,5>, <2,3,0,1>
3205365760U, // <5,5,2,1>: Cost 3 ins <u,5,2,1>, lane 0 3205365760U, // <5,5,2,1>: Cost 3 ins <u,5,2,1>, lane 0
2040933681U, // <5,5,2,2>: Cost 2 vtrnr <4,5,6,2>, <4,5,6,2> 2040933681U, // <5,5,2,2>: Cost 2 vtrnr <4,5,6,2>, <4,5,6,2>
2131640320U, // <5,5,2,3>: Cost 2 ins <u,5,2,3>, lane 0 2114207749U, // <5,5,2,3>: Cost 2 ins <5,5,u,u>, lane 5
2785052366U, // <5,5,2,4>: Cost 3 vuzpl <5,5,5,5>, <2,3,4,5> 2785052366U, // <5,5,2,4>: Cost 3 vuzpl <5,5,5,5>, <2,3,4,5>
2114183170U, // <5,5,2,5>: Cost 2 ins <5,5,u,5>, lane 2 2114183170U, // <5,5,2,5>: Cost 2 ins <5,5,u,5>, lane 2
2646853562U, // <5,5,2,6>: Cost 3 vext2 <4,u,5,5>, <2,6,3,7> 2646853562U, // <5,5,2,6>: Cost 3 vext2 <4,u,5,5>, <2,6,3,7>
2114199554U, // <5,5,2,7>: Cost 2 ins <5,5,u,7>, lane 2 2114199554U, // <5,5,2,7>: Cost 2 ins <5,5,u,7>, lane 2
2114199554U, // <5,5,2,u>: Cost 2 ins <5,5,u,7>, lane 2 2114207749U, // <5,5,2,u>: Cost 2 ins <5,5,u,u>, lane 5
2646853782U, // <5,5,3,0>: Cost 3 vext2 <4,u,5,5>, <3,0,1,2> 2646853782U, // <5,5,3,0>: Cost 3 vext2 <4,u,5,5>, <3,0,1,2>
2785052822U, // <5,5,3,1>: Cost 3 vuzpl <5,5,5,5>, <3,0,1,2> 2785052822U, // <5,5,3,1>: Cost 3 vuzpl <5,5,5,5>, <3,0,1,2>
3187900418U, // <5,5,3,2>: Cost 3 ins <5,5,u,2>, lane 2 3187900418U, // <5,5,3,2>: Cost 3 ins <5,5,u,2>, lane 2
1880105089U, // <5,5,3,3>: Cost 2 vzipr <0,1,5,3>, <0,1,5,3> 1880105089U, // <5,5,3,3>: Cost 2 vzipr <0,1,5,3>, <0,1,5,3>
2646854146U, // <5,5,3,4>: Cost 3 vext2 <4,u,5,5>, <3,4,5,6> 2646854146U, // <5,5,3,4>: Cost 3 vext2 <4,u,5,5>, <3,4,5,6>
2114183170U, // <5,5,3,5>: Cost 2 ins <5,5,u,5>, lane 2 2114183170U, // <5,5,3,5>: Cost 2 ins <5,5,u,5>, lane 2
3205480448U, // <5,5,3,6>: Cost 3 ins <u,5,3,6>, lane 0 3205480448U, // <5,5,3,6>: Cost 3 ins <u,5,3,6>, lane 0
2131746816U, // <5,5,3,7>: Cost 2 ins <u,5,3,7>, lane 0 2131746816U, // <5,5,3,7>: Cost 2 ins <u,5,3,7>, lane 0
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
2114838530U, // <5,6,1,4>: Cost 2 ins <5,6,u,4>, lane 2 2114838530U, // <5,6,1,4>: Cost 2 ins <5,6,u,4>, lane 2
2638234768U, // <5,6,1,5>: Cost 3 vext2 <3,4,5,6>, <1,5,3,7> 2638234768U, // <5,6,1,5>: Cost 3 vext2 <3,4,5,6>, <1,5,3,7>
2982366436U, // <5,6,1,6>: Cost 3 vzipr <4,u,5,1>, <4,4,6,6> 2982366436U, // <5,6,1,6>: Cost 3 vzipr <4,u,5,1>, <4,4,6,6>
1908624694U, // <5,6,1,7>: Cost 2 vzipr <4,u,5,1>, RHS 1908624694U, // <5,6,1,7>: Cost 2 vzipr <4,u,5,1>, RHS
1908624695U, // <5,6,1,u>: Cost 2 vzipr <4,u,5,1>, RHS 1908624695U, // <5,6,1,u>: Cost 2 vzipr <4,u,5,1>, RHS
2114805762U, // <5,6,2,0>: Cost 2 ins <5,6,u,0>, lane 2 2114805762U, // <5,6,2,0>: Cost 2 ins <5,6,u,0>, lane 2
3188555778U, // <5,6,2,1>: Cost 3 ins <5,6,u,1>, lane 2 3188555778U, // <5,6,2,1>: Cost 3 ins <5,6,u,1>, lane 2
2638235240U, // <5,6,2,2>: Cost 3 vext2 <3,4,5,6>, <2,2,2,2> 2638235240U, // <5,6,2,2>: Cost 3 vext2 <3,4,5,6>, <2,2,2,2>
2132303872U, // <5,6,2,3>: Cost 2 ins <u,6,2,3>, lane 0 2114871301U, // <5,6,2,3>: Cost 2 ins <5,6,u,u>, lane 5
2114838530U, // <5,6,2,4>: Cost 2 ins <5,6,u,4>, lane 2 2114838530U, // <5,6,2,4>: Cost 2 ins <5,6,u,4>, lane 2
2638235496U, // <5,6,2,5>: Cost 3 vext2 <3,4,5,6>, <2,5,3,6> 2638235496U, // <5,6,2,5>: Cost 3 vext2 <3,4,5,6>, <2,5,3,6>
2638235578U, // <5,6,2,6>: Cost 3 vext2 <3,4,5,6>, <2,6,3,7> 2638235578U, // <5,6,2,6>: Cost 3 vext2 <3,4,5,6>, <2,6,3,7>
2964458806U, // <5,6,2,7>: Cost 3 vzipr <1,u,5,2>, RHS 2964458806U, // <5,6,2,7>: Cost 3 vzipr <1,u,5,2>, RHS
2114805762U, // <5,6,2,u>: Cost 2 ins <5,6,u,0>, lane 2 2114805762U, // <5,6,2,u>: Cost 2 ins <5,6,u,0>, lane 2
2114805762U, // <5,6,3,0>: Cost 2 ins <5,6,u,0>, lane 2 2114805762U, // <5,6,3,0>: Cost 2 ins <5,6,u,0>, lane 2
3206103040U, // <5,6,3,1>: Cost 3 ins <u,6,3,1>, lane 0 3206103040U, // <5,6,3,1>: Cost 3 ins <u,6,3,1>, lane 0
3206111232U, // <5,6,3,2>: Cost 3 ins <u,6,3,2>, lane 0 3206111232U, // <5,6,3,2>: Cost 3 ins <u,6,3,2>, lane 0
▲ Show 20 Lines • Show All 428 Lines • ▼ Show 20 Lines
1772719415U, // <6,2,5,u>: Cost 2 vuzpr <4,6,0,2>, RHS 1772719415U, // <6,2,5,u>: Cost 2 vuzpr <4,6,0,2>, RHS
2687207321U, // <6,2,6,0>: Cost 3 vext3 <0,4,2,6>, <2,6,0,1> 2687207321U, // <6,2,6,0>: Cost 3 vext3 <0,4,2,6>, <2,6,0,1>
3195707393U, // <6,2,6,1>: Cost 3 ins <6,u,6,1>, lane 1 3195707393U, // <6,2,6,1>: Cost 3 ins <6,u,6,1>, lane 1
1772719436U, // <6,2,6,2>: Cost 2 vuzpr <4,6,0,2>, <4,6,0,2> 1772719436U, // <6,2,6,2>: Cost 2 vuzpr <4,6,0,2>, <4,6,0,2>
1908736102U, // <6,2,6,3>: Cost 2 vzipr <4,u,6,6>, LHS 1908736102U, // <6,2,6,3>: Cost 2 vzipr <4,u,6,6>, LHS
2687207361U, // <6,2,6,4>: Cost 3 vext3 <0,4,2,6>, <2,6,4,5> 2687207361U, // <6,2,6,4>: Cost 3 vext3 <0,4,2,6>, <2,6,4,5>
3195740161U, // <6,2,6,5>: Cost 3 ins <6,u,6,5>, lane 1 3195740161U, // <6,2,6,5>: Cost 3 ins <6,u,6,5>, lane 1
2122006529U, // <6,2,6,6>: Cost 2 ins <6,u,6,6>, lane 1 2122006529U, // <6,2,6,6>: Cost 2 ins <6,u,6,6>, lane 1
2129977344U, // <6,2,6,7>: Cost 2 ins <u,2,6,7>, lane 0 2118189061U, // <6,2,6,7>: Cost 2 ins <6,2,u,u>, lane 5
1908736107U, // <6,2,6,u>: Cost 2 vzipr <4,u,6,6>, LHS 1908736107U, // <6,2,6,u>: Cost 2 vzipr <4,u,6,6>, LHS
2118115331U, // <6,2,7,0>: Cost 2 ins <6,2,7,u>, lane 3 2118115331U, // <6,2,7,0>: Cost 2 ins <6,2,7,u>, lane 3
2118115331U, // <6,2,7,1>: Cost 2 ins <6,2,7,u>, lane 3 2118115331U, // <6,2,7,1>: Cost 2 ins <6,2,7,u>, lane 3
1906753556U, // <6,2,7,2>: Cost 2 vzipr RHS, <0,0,2,2> 1906753556U, // <6,2,7,2>: Cost 2 vzipr RHS, <0,0,2,2>
833011814U, // <6,2,7,3>: Cost 1 vzipr RHS, LHS 833011814U, // <6,2,7,3>: Cost 1 vzipr RHS, LHS
2118115331U, // <6,2,7,4>: Cost 2 ins <6,2,7,u>, lane 3 2118115331U, // <6,2,7,4>: Cost 2 ins <6,2,7,u>, lane 3
2118115331U, // <6,2,7,5>: Cost 2 ins <6,2,7,u>, lane 3 2118115331U, // <6,2,7,5>: Cost 2 ins <6,2,7,u>, lane 3
1906753884U, // <6,2,7,6>: Cost 2 vzipr RHS, <0,4,2,6> 1906753884U, // <6,2,7,6>: Cost 2 vzipr RHS, <0,4,2,6>
▲ Show 20 Lines • Show All 267 Lines • ▼ Show 20 Lines
3194068995U, // <6,6,1,4>: Cost 3 ins <6,6,1,u>, lane 3 3194068995U, // <6,6,1,4>: Cost 3 ins <6,6,1,u>, lane 3
2646934672U, // <6,6,1,5>: Cost 3 vext2 <4,u,6,6>, <1,5,3,7> 2646934672U, // <6,6,1,5>: Cost 3 vext2 <4,u,6,6>, <1,5,3,7>
2120826882U, // <6,6,1,6>: Cost 2 ins <6,6,u,6>, lane 2 2120826882U, // <6,6,1,6>: Cost 2 ins <6,6,u,6>, lane 2
2120835074U, // <6,6,1,7>: Cost 2 ins <6,6,u,7>, lane 2 2120835074U, // <6,6,1,7>: Cost 2 ins <6,6,u,7>, lane 2
1773043819U, // <6,6,1,u>: Cost 2 vuzpr <4,6,4,6>, LHS 1773043819U, // <6,6,1,u>: Cost 2 vuzpr <4,6,4,6>, LHS
3114896750U, // <6,6,2,0>: Cost 3 vtrnr <4,6,0,2>, <4,6,4,0> 3114896750U, // <6,6,2,0>: Cost 3 vtrnr <4,6,0,2>, <4,6,4,0>
3195412481U, // <6,6,2,1>: Cost 3 ins <6,u,2,1>, lane 1 3195412481U, // <6,6,2,1>: Cost 3 ins <6,u,2,1>, lane 1
2041154892U, // <6,6,2,2>: Cost 2 vtrnr <4,6,0,2>, <4,6,0,2> 2041154892U, // <6,6,2,2>: Cost 2 vtrnr <4,6,0,2>, <4,6,0,2>
2132303872U, // <6,6,2,3>: Cost 2 ins <u,6,2,3>, lane 0 2120843269U, // <6,6,2,3>: Cost 2 ins <6,6,u,u>, lane 5
3114897510U, // <6,6,2,4>: Cost 3 vtrnr <4,6,0,2>, <5,6,7,4> 3114897510U, // <6,6,2,4>: Cost 3 vtrnr <4,6,0,2>, <5,6,7,4>
3195445249U, // <6,6,2,5>: Cost 3 ins <6,u,2,5>, lane 1 3195445249U, // <6,6,2,5>: Cost 3 ins <6,u,2,5>, lane 1
2120826882U, // <6,6,2,6>: Cost 2 ins <6,6,u,6>, lane 2 2120826882U, // <6,6,2,6>: Cost 2 ins <6,6,u,6>, lane 2
1908706614U, // <6,6,2,7>: Cost 2 vzipr <4,u,6,2>, RHS 1908706614U, // <6,6,2,7>: Cost 2 vzipr <4,u,6,2>, RHS
1908706615U, // <6,6,2,u>: Cost 2 vzipr <4,u,6,2>, RHS 1908706615U, // <6,6,2,u>: Cost 2 vzipr <4,u,6,2>, RHS
2646935702U, // <6,6,3,0>: Cost 3 vext2 <4,u,6,6>, <3,0,1,2> 2646935702U, // <6,6,3,0>: Cost 3 vext2 <4,u,6,6>, <3,0,1,2>
2846787238U, // <6,6,3,1>: Cost 3 vuzpr <4,6,4,6>, <2,3,0,1> 2846787238U, // <6,6,3,1>: Cost 3 vuzpr <4,6,4,6>, <2,3,0,1>
3206111232U, // <6,6,3,2>: Cost 3 ins <u,6,3,2>, lane 0 3206111232U, // <6,6,3,2>: Cost 3 ins <u,6,3,2>, lane 0
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
497468061U, // <6,7,0,u>: Cost 1 vext2 RHS, LHS 497468061U, // <6,7,0,u>: Cost 1 vext2 RHS, LHS
1571209974U, // <6,7,1,0>: Cost 2 vext2 RHS, <1,0,3,2> 1571209974U, // <6,7,1,0>: Cost 2 vext2 RHS, <1,0,3,2>
1571210036U, // <6,7,1,1>: Cost 2 vext2 RHS, <1,1,1,1> 1571210036U, // <6,7,1,1>: Cost 2 vext2 RHS, <1,1,1,1>
1571210134U, // <6,7,1,2>: Cost 2 vext2 RHS, <1,2,3,0> 1571210134U, // <6,7,1,2>: Cost 2 vext2 RHS, <1,2,3,0>
1761034342U, // <6,7,1,3>: Cost 2 vuzpr <2,6,3,7>, LHS 1761034342U, // <6,7,1,3>: Cost 2 vuzpr <2,6,3,7>, LHS
2644952098U, // <6,7,1,4>: Cost 3 vext2 RHS, <1,4,0,5> 2644952098U, // <6,7,1,4>: Cost 3 vext2 RHS, <1,4,0,5>
1571210384U, // <6,7,1,5>: Cost 2 vext2 RHS, <1,5,3,7> 1571210384U, // <6,7,1,5>: Cost 2 vext2 RHS, <1,5,3,7>
2644952271U, // <6,7,1,6>: Cost 3 vext2 RHS, <1,6,1,7> 2644952271U, // <6,7,1,6>: Cost 3 vext2 RHS, <1,6,1,7>
2578535418U, // <6,7,1,7>: Cost 3 vext1 <4,6,7,1>, <7,0,1,2> 2121498626U, // <6,7,1,7>: Cost 2 ins <6,7,u,7>, lane 2
1761034347U, // <6,7,1,u>: Cost 2 vuzpr <2,6,3,7>, LHS 1761034347U, // <6,7,1,u>: Cost 2 vuzpr <2,6,3,7>, LHS
2834776982U, // <6,7,2,0>: Cost 3 vuzpr <2,6,3,7>, <1,2,3,0> 2121064451U, // <6,7,2,0>: Cost 2 ins <6,7,2,u>, lane 3
2121449474U, // <6,7,2,1>: Cost 2 ins <6,7,u,1>, lane 2 2121449474U, // <6,7,2,1>: Cost 2 ins <6,7,u,1>, lane 2
1571210856U, // <6,7,2,2>: Cost 2 vext2 RHS, <2,2,2,2> 1571210856U, // <6,7,2,2>: Cost 2 vext2 RHS, <2,2,2,2>
1571210918U, // <6,7,2,3>: Cost 2 vext2 RHS, <2,3,0,1> 1059889156U, // <6,7,2,3>: Cost 1 ins LHS, lane 4
2834776986U, // <6,7,2,4>: Cost 3 vuzpr <2,6,3,7>, <1,2,3,4> 2121064451U, // <6,7,2,4>: Cost 2 ins <6,7,2,u>, lane 3
2121482242U, // <6,7,2,5>: Cost 2 ins <6,7,u,5>, lane 2 2121482242U, // <6,7,2,5>: Cost 2 ins <6,7,u,5>, lane 2
1571211194U, // <6,7,2,6>: Cost 2 vext2 RHS, <2,6,3,7> 1571211194U, // <6,7,2,6>: Cost 2 vext2 RHS, <2,6,3,7>
3114897576U, // <6,7,2,7>: Cost 3 vtrnr <4,6,0,2>, <5,7,5,7> 2121498626U, // <6,7,2,7>: Cost 2 ins <6,7,u,7>, lane 2
1571211323U, // <6,7,2,u>: Cost 2 vext2 RHS, <2,u,0,1> 1059889156U, // <6,7,2,u>: Cost 1 ins LHS, lane 4
1571211414U, // <6,7,3,0>: Cost 2 vext2 RHS, <3,0,1,2> 1571211414U, // <6,7,3,0>: Cost 2 vext2 RHS, <3,0,1,2>
2121449474U, // <6,7,3,1>: Cost 2 ins <6,7,u,1>, lane 2 2121449474U, // <6,7,3,1>: Cost 2 ins <6,7,u,1>, lane 2
2834780746U, // <6,7,3,2>: Cost 3 vuzpr <2,6,3,7>, <6,3,7,2> 2133696516U, // <6,7,3,2>: Cost 2 ins <u,u,3,2>, lane 4
1571211676U, // <6,7,3,3>: Cost 2 vext2 RHS, <3,3,3,3> 1571211676U, // <6,7,3,3>: Cost 2 vext2 RHS, <3,3,3,3>
1571211778U, // <6,7,3,4>: Cost 2 vext2 RHS, <3,4,5,6> 1571211778U, // <6,7,3,4>: Cost 2 vext2 RHS, <3,4,5,6>
2121482242U, // <6,7,3,5>: Cost 2 ins <6,7,u,5>, lane 2 2121482242U, // <6,7,3,5>: Cost 2 ins <6,7,u,5>, lane 2
2834777789U, // <6,7,3,6>: Cost 3 vuzpr <2,6,3,7>, <2,3,2,6> 2834777789U, // <6,7,3,6>: Cost 3 vuzpr <2,6,3,7>, <2,3,2,6>
2834777088U, // <6,7,3,7>: Cost 3 vuzpr <2,6,3,7>, <1,3,5,7> 2133737476U, // <6,7,3,7>: Cost 2 ins <u,u,3,7>, lane 4
1571212062U, // <6,7,3,u>: Cost 2 vext2 RHS, <3,u,1,2> 1571212062U, // <6,7,3,u>: Cost 2 vext2 RHS, <3,u,1,2>
1573202834U, // <6,7,4,0>: Cost 2 vext2 RHS, <4,0,5,1> 1573202834U, // <6,7,4,0>: Cost 2 vext2 RHS, <4,0,5,1>
2121449474U, // <6,7,4,1>: Cost 2 ins <6,7,u,1>, lane 2 2121449474U, // <6,7,4,1>: Cost 2 ins <6,7,u,1>, lane 2
2121211907U, // <6,7,4,2>: Cost 2 ins <6,7,4,u>, lane 3 2121211907U, // <6,7,4,2>: Cost 2 ins <6,7,4,u>, lane 3
2121211907U, // <6,7,4,3>: Cost 2 ins <6,7,4,u>, lane 3 2121211907U, // <6,7,4,3>: Cost 2 ins <6,7,4,u>, lane 3
1571212496U, // <6,7,4,4>: Cost 2 vext2 RHS, <4,4,4,4> 1571212496U, // <6,7,4,4>: Cost 2 vext2 RHS, <4,4,4,4>
497470774U, // <6,7,4,5>: Cost 1 vext2 RHS, RHS 497470774U, // <6,7,4,5>: Cost 1 vext2 RHS, RHS
1573203276U, // <6,7,4,6>: Cost 2 vext2 RHS, <4,6,0,2> 1573203276U, // <6,7,4,6>: Cost 2 vext2 RHS, <4,6,0,2>
2121211907U, // <6,7,4,7>: Cost 2 ins <6,7,4,u>, lane 3 2121211907U, // <6,7,4,7>: Cost 2 ins <6,7,4,u>, lane 3
497471017U, // <6,7,4,u>: Cost 1 vext2 RHS, RHS 497471017U, // <6,7,4,u>: Cost 1 vext2 RHS, RHS
2644954696U, // <6,7,5,0>: Cost 3 vext2 RHS, <5,0,1,2> 2644954696U, // <6,7,5,0>: Cost 3 vext2 RHS, <5,0,1,2>
1573203664U, // <6,7,5,1>: Cost 2 vext2 RHS, <5,1,7,3> 1573203664U, // <6,7,5,1>: Cost 2 vext2 RHS, <5,1,7,3>
2644954878U, // <6,7,5,2>: Cost 3 vext2 RHS, <5,2,3,4> 2644954878U, // <6,7,5,2>: Cost 3 vext2 RHS, <5,2,3,4>
2644954991U, // <6,7,5,3>: Cost 3 vext2 RHS, <5,3,7,0> 2121465858U, // <6,7,5,3>: Cost 2 ins <6,7,u,3>, lane 2
1571213254U, // <6,7,5,4>: Cost 2 vext2 RHS, <5,4,7,6> 1571213254U, // <6,7,5,4>: Cost 2 vext2 RHS, <5,4,7,6>
1571213316U, // <6,7,5,5>: Cost 2 vext2 RHS, <5,5,5,5> 1571213316U, // <6,7,5,5>: Cost 2 vext2 RHS, <5,5,5,5>
1571213410U, // <6,7,5,6>: Cost 2 vext2 RHS, <5,6,7,0> 1571213410U, // <6,7,5,6>: Cost 2 vext2 RHS, <5,6,7,0>
1761037622U, // <6,7,5,7>: Cost 2 vuzpr <2,6,3,7>, RHS 1761037622U, // <6,7,5,7>: Cost 2 vuzpr <2,6,3,7>, RHS
1761037623U, // <6,7,5,u>: Cost 2 vuzpr <2,6,3,7>, RHS 1761037623U, // <6,7,5,u>: Cost 2 vuzpr <2,6,3,7>, RHS
2644955425U, // <6,7,6,0>: Cost 3 vext2 RHS, <6,0,1,2> 2121359363U, // <6,7,6,0>: Cost 2 ins <6,7,6,u>, lane 3
2121449474U, // <6,7,6,1>: Cost 2 ins <6,7,u,1>, lane 2 2121449474U, // <6,7,6,1>: Cost 2 ins <6,7,u,1>, lane 2
1573204474U, // <6,7,6,2>: Cost 2 vext2 RHS, <6,2,7,3> 1573204474U, // <6,7,6,2>: Cost 2 vext2 RHS, <6,2,7,3>
2644955698U, // <6,7,6,3>: Cost 3 vext2 RHS, <6,3,4,5> 2121465858U, // <6,7,6,3>: Cost 2 ins <6,7,u,3>, lane 2
2644955789U, // <6,7,6,4>: Cost 3 vext2 RHS, <6,4,5,6> 2121359363U, // <6,7,6,4>: Cost 2 ins <6,7,6,u>, lane 3
2121482242U, // <6,7,6,5>: Cost 2 ins <6,7,u,5>, lane 2 2121482242U, // <6,7,6,5>: Cost 2 ins <6,7,u,5>, lane 2
1571214136U, // <6,7,6,6>: Cost 2 vext2 RHS, <6,6,6,6> 1571214136U, // <6,7,6,6>: Cost 2 vext2 RHS, <6,6,6,6>
1761036218U, // <6,7,6,7>: Cost 2 vuzpr <2,6,3,7>, <2,6,3,7> 1060216836U, // <6,7,6,7>: Cost 1 ins RHS, lane 4
1573204895U, // <6,7,6,u>: Cost 2 vext2 RHS, <6,u,0,1> 1060216836U, // <6,7,6,u>: Cost 1 ins RHS, lane 4
1906757730U, // <6,7,7,0>: Cost 2 vzipr RHS, <5,6,7,0> 1906757730U, // <6,7,7,0>: Cost 2 vzipr RHS, <5,6,7,0>
2121449474U, // <6,7,7,1>: Cost 2 ins <6,7,u,1>, lane 2 2121449474U, // <6,7,7,1>: Cost 2 ins <6,7,u,1>, lane 2
2644956362U, // <6,7,7,2>: Cost 3 vext2 RHS, <7,2,6,3> 2644956362U, // <6,7,7,2>: Cost 3 vext2 RHS, <7,2,6,3>
1906758138U, // <6,7,7,3>: Cost 2 vzipr RHS, <6,2,7,3> 1906758138U, // <6,7,7,3>: Cost 2 vzipr RHS, <6,2,7,3>
1906757734U, // <6,7,7,4>: Cost 2 vzipr RHS, <5,6,7,4> 1906757734U, // <6,7,7,4>: Cost 2 vzipr RHS, <5,6,7,4>
2121482242U, // <6,7,7,5>: Cost 2 ins <6,7,u,5>, lane 2 2121482242U, // <6,7,7,5>: Cost 2 ins <6,7,u,5>, lane 2
1906757574U, // <6,7,7,6>: Cost 2 vzipr RHS, <5,4,7,6> 1906757574U, // <6,7,7,6>: Cost 2 vzipr RHS, <5,4,7,6>
1571214956U, // <6,7,7,7>: Cost 2 vext2 RHS, <7,7,7,7> 1571214956U, // <6,7,7,7>: Cost 2 vext2 RHS, <7,7,7,7>
1906757738U, // <6,7,7,u>: Cost 2 vzipr RHS, <5,6,7,u> 1906757738U, // <6,7,7,u>: Cost 2 vzipr RHS, <5,6,7,u>
1571215059U, // <6,7,u,0>: Cost 2 vext2 RHS, <u,0,1,2> 1571215059U, // <6,7,u,0>: Cost 2 vext2 RHS, <u,0,1,2>
497473326U, // <6,7,u,1>: Cost 1 vext2 RHS, LHS 497473326U, // <6,7,u,1>: Cost 1 vext2 RHS, LHS
1571215237U, // <6,7,u,2>: Cost 2 vext2 RHS, <u,2,3,0> 1571215237U, // <6,7,u,2>: Cost 2 vext2 RHS, <u,2,3,0>
1761034909U, // <6,7,u,3>: Cost 2 vuzpr <2,6,3,7>, LHS 1059889156U, // <6,7,u,3>: Cost 1 ins LHS, lane 4
1571215423U, // <6,7,u,4>: Cost 2 vext2 RHS, <u,4,5,6> 1571215423U, // <6,7,u,4>: Cost 2 vext2 RHS, <u,4,5,6>
497473690U, // <6,7,u,5>: Cost 1 vext2 RHS, RHS 497473690U, // <6,7,u,5>: Cost 1 vext2 RHS, RHS
1571215568U, // <6,7,u,6>: Cost 2 vext2 RHS, <u,6,3,7> 1571215568U, // <6,7,u,6>: Cost 2 vext2 RHS, <u,6,3,7>
1761037865U, // <6,7,u,7>: Cost 2 vuzpr <2,6,3,7>, RHS 1060216836U, // <6,7,u,7>: Cost 1 ins RHS, lane 4
497473893U, // <6,7,u,u>: Cost 1 vext2 RHS, LHS 497473893U, // <6,7,u,u>: Cost 1 vext2 RHS, LHS
1571217408U, // <6,u,0,0>: Cost 2 vext2 RHS, <0,0,0,0> 1571217408U, // <6,u,0,0>: Cost 2 vext2 RHS, <0,0,0,0>
497475686U, // <6,u,0,1>: Cost 1 vext2 RHS, LHS 497475686U, // <6,u,0,1>: Cost 1 vext2 RHS, LHS
1571217572U, // <6,u,0,2>: Cost 2 vext2 RHS, <0,2,0,2> 1571217572U, // <6,u,0,2>: Cost 2 vext2 RHS, <0,2,0,2>
2047623837U, // <6,u,0,3>: Cost 2 vtrnr <5,6,7,0>, LHS 2047623837U, // <6,u,0,3>: Cost 2 vtrnr <5,6,7,0>, LHS
1571217746U, // <6,u,0,4>: Cost 2 vext2 RHS, <0,4,1,5> 1571217746U, // <6,u,0,4>: Cost 2 vext2 RHS, <0,4,1,5>
1510830187U, // <6,u,0,5>: Cost 2 vext1 <5,6,u,0>, <5,6,u,0> 1510830187U, // <6,u,0,5>: Cost 2 vext1 <5,6,u,0>, <5,6,u,0>
1986648218U, // <6,u,0,6>: Cost 2 vtrnl <6,7,0,1>, RHS 1986648218U, // <6,u,0,6>: Cost 2 vtrnl <6,7,0,1>, RHS
▲ Show 20 Lines • Show All 87 Lines • ▼ Show 20 Lines
1516883254U, // <7,0,1,4>: Cost 2 vext1 <6,7,0,1>, RHS 1516883254U, // <7,0,1,4>: Cost 2 vext1 <6,7,0,1>, RHS
2122317827U, // <7,0,1,5>: Cost 2 ins <7,0,1,u>, lane 3 2122317827U, // <7,0,1,5>: Cost 2 ins <7,0,1,u>, lane 3
1516884814U, // <7,0,1,6>: Cost 2 vext1 <6,7,0,1>, <6,7,0,1> 1516884814U, // <7,0,1,6>: Cost 2 vext1 <6,7,0,1>, <6,7,0,1>
2122317827U, // <7,0,1,7>: Cost 2 ins <7,0,1,u>, lane 3 2122317827U, // <7,0,1,7>: Cost 2 ins <7,0,1,u>, lane 3
564576412U, // <7,0,1,u>: Cost 1 vext3 RHS, LHS 564576412U, // <7,0,1,u>: Cost 1 vext3 RHS, LHS
1638318244U, // <7,0,2,0>: Cost 2 vext3 RHS, <0,2,0,2> 1638318244U, // <7,0,2,0>: Cost 2 vext3 RHS, <0,2,0,2>
2692743344U, // <7,0,2,1>: Cost 3 vext3 <1,3,5,7>, <0,2,1,5> 2692743344U, // <7,0,2,1>: Cost 3 vext3 <1,3,5,7>, <0,2,1,5>
2128314368U, // <7,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0 2128314368U, // <7,0,2,2>: Cost 2 ins <u,0,2,2>, lane 0
2128322560U, // <7,0,2,3>: Cost 2 ins <u,0,2,3>, lane 0 2122833925U, // <7,0,2,3>: Cost 2 ins <7,0,u,u>, lane 5
1638318284U, // <7,0,2,4>: Cost 2 vext3 RHS, <0,2,4,6> 1638318284U, // <7,0,2,4>: Cost 2 vext3 RHS, <0,2,4,6>
2712060118U, // <7,0,2,5>: Cost 3 vext3 RHS, <0,2,5,7> 2712060118U, // <7,0,2,5>: Cost 3 vext3 RHS, <0,2,5,7>
2712060126U, // <7,0,2,6>: Cost 3 vext3 RHS, <0,2,6,6> 2712060126U, // <7,0,2,6>: Cost 3 vext3 RHS, <0,2,6,6>
3201433601U, // <7,0,2,7>: Cost 3 ins <7,u,2,7>, lane 1 3201433601U, // <7,0,2,7>: Cost 3 ins <7,u,2,7>, lane 1
1638318316U, // <7,0,2,u>: Cost 2 vext3 RHS, <0,2,u,2> 1638318316U, // <7,0,2,u>: Cost 2 vext3 RHS, <0,2,u,2>
2983854080U, // <7,0,3,0>: Cost 3 vzipr <5,1,7,3>, <0,0,0,0> 2983854080U, // <7,0,3,0>: Cost 3 vzipr <5,1,7,3>, <0,0,0,0>
2712060156U, // <7,0,3,1>: Cost 3 vext3 RHS, <0,3,1,0> 2712060156U, // <7,0,3,1>: Cost 3 vext3 RHS, <0,3,1,0>
2128388096U, // <7,0,3,2>: Cost 2 ins <u,0,3,2>, lane 0 2128388096U, // <7,0,3,2>: Cost 2 ins <u,0,3,2>, lane 0
Show All 23 Lines
1579192580U, // <7,0,5,u>: Cost 2 vext2 <5,u,7,0>, <5,u,7,0> 1579192580U, // <7,0,5,u>: Cost 2 vext2 <5,u,7,0>, <5,u,7,0>
2985869312U, // <7,0,6,0>: Cost 3 vzipr <5,4,7,6>, <0,0,0,0> 2985869312U, // <7,0,6,0>: Cost 3 vzipr <5,4,7,6>, <0,0,0,0>
2712060406U, // <7,0,6,1>: Cost 3 vext3 RHS, <0,6,1,7> 2712060406U, // <7,0,6,1>: Cost 3 vext3 RHS, <0,6,1,7>
2128609280U, // <7,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <7,0,6,2>: Cost 2 ins <u,0,6,2>, lane 0
2655588936U, // <7,0,6,3>: Cost 3 vext2 <6,3,7,0>, <6,3,7,0> 2655588936U, // <7,0,6,3>: Cost 3 vext2 <6,3,7,0>, <6,3,7,0>
3202367488U, // <7,0,6,4>: Cost 3 ins <u,0,6,4>, lane 0 3202367488U, // <7,0,6,4>: Cost 3 ins <u,0,6,4>, lane 0
2651607730U, // <7,0,6,5>: Cost 3 vext2 <5,6,7,0>, <6,5,0,7> 2651607730U, // <7,0,6,5>: Cost 3 vext2 <5,6,7,0>, <6,5,0,7>
2651607864U, // <7,0,6,6>: Cost 3 vext2 <5,6,7,0>, <6,6,6,6> 2651607864U, // <7,0,6,6>: Cost 3 vext2 <5,6,7,0>, <6,6,6,6>
2128650240U, // <7,0,6,7>: Cost 2 ins <u,0,6,7>, lane 0 2122833925U, // <7,0,6,7>: Cost 2 ins <7,0,u,u>, lane 5
2128609280U, // <7,0,6,u>: Cost 2 ins <u,0,6,2>, lane 0 2128609280U, // <7,0,6,u>: Cost 2 ins <u,0,6,2>, lane 0
2847477192U, // <7,0,7,0>: Cost 3 vuzpr <4,7,5,0>, <4,7,5,0> 2847477192U, // <7,0,7,0>: Cost 3 vuzpr <4,7,5,0>, <4,7,5,0>
1858961510U, // <7,0,7,1>: Cost 2 vzipl <7,7,7,7>, LHS 1858961510U, // <7,0,7,1>: Cost 2 vzipl <7,7,7,7>, LHS
1993179238U, // <7,0,7,2>: Cost 2 vtrnl <7,7,7,7>, LHS 1993179238U, // <7,0,7,2>: Cost 2 vtrnl <7,7,7,7>, LHS
3201769473U, // <7,0,7,3>: Cost 3 ins <7,u,7,3>, lane 1 3201769473U, // <7,0,7,3>: Cost 3 ins <7,u,7,3>, lane 1
2651608422U, // <7,0,7,4>: Cost 3 vext2 <5,6,7,0>, <7,4,5,6> 2651608422U, // <7,0,7,4>: Cost 3 vext2 <5,6,7,0>, <7,4,5,6>
2651608513U, // <7,0,7,5>: Cost 3 vext2 <5,6,7,0>, <7,5,6,7> 2651608513U, // <7,0,7,5>: Cost 3 vext2 <5,6,7,0>, <7,5,6,7>
2663552532U, // <7,0,7,6>: Cost 3 vext2 <7,6,7,0>, <7,6,7,0> 2663552532U, // <7,0,7,6>: Cost 3 vext2 <7,6,7,0>, <7,6,7,0>
2128060417U, // <7,0,7,7>: Cost 2 ins <7,u,7,7>, lane 1 2128060417U, // <7,0,7,7>: Cost 2 ins <7,u,7,7>, lane 1
1858962077U, // <7,0,7,u>: Cost 2 vzipl <7,7,7,7>, LHS 1858962077U, // <7,0,7,u>: Cost 2 vzipl <7,7,7,7>, LHS
1638318730U, // <7,0,u,0>: Cost 2 vext3 RHS, <0,u,0,2> 1638318730U, // <7,0,u,0>: Cost 2 vext3 RHS, <0,u,0,2>
1638318738U, // <7,0,u,1>: Cost 2 vext3 RHS, <0,u,1,1> 1638318738U, // <7,0,u,1>: Cost 2 vext3 RHS, <0,u,1,1>
564576925U, // <7,0,u,2>: Cost 1 vext3 RHS, LHS 564576925U, // <7,0,u,2>: Cost 1 vext3 RHS, LHS
2122317827U, // <7,0,u,3>: Cost 2 ins <7,0,1,u>, lane 3 2122317827U, // <7,0,u,3>: Cost 2 ins <7,0,1,u>, lane 3
1638318770U, // <7,0,u,4>: Cost 2 vext3 RHS, <0,u,4,6> 1638318770U, // <7,0,u,4>: Cost 2 vext3 RHS, <0,u,4,6>
1577867418U, // <7,0,u,5>: Cost 2 vext2 <5,6,7,0>, RHS 1577867418U, // <7,0,u,5>: Cost 2 vext2 <5,6,7,0>, RHS
1516942165U, // <7,0,u,6>: Cost 2 vext1 <6,7,0,u>, <6,7,0,u> 1516942165U, // <7,0,u,6>: Cost 2 vext1 <6,7,0,u>, <6,7,0,u>
2122317827U, // <7,0,u,7>: Cost 2 ins <7,0,1,u>, lane 3 2122317827U, // <7,0,u,7>: Cost 2 ins <7,0,1,u>, lane 3
564576979U, // <7,0,u,u>: Cost 1 vext3 RHS, LHS 564576979U, // <7,0,u,u>: Cost 1 vext3 RHS, LHS
2712060634U, // <7,1,0,0>: Cost 3 vext3 RHS, <1,0,0,1> 2712060634U, // <7,1,0,0>: Cost 3 vext3 RHS, <1,0,0,1>
2639003750U, // <7,1,0,1>: Cost 3 vext2 <3,5,7,1>, LHS 2128822272U, // <7,1,0,1>: Cost 2 ins <u,1,0,1>, lane 0
1719615590U, // <7,1,0,2>: Cost 2 vuzpl <7,0,1,2>, LHS 1719615590U, // <7,1,0,2>: Cost 2 vuzpl <7,0,1,2>, LHS
1638318838U, // <7,1,0,3>: Cost 2 vext3 RHS, <1,0,3,2> 1638318838U, // <7,1,0,3>: Cost 2 vext3 RHS, <1,0,3,2>
2859062268U, // <7,1,0,4>: Cost 3 vuzpr <6,7,0,1>, <7,0,1,4> 2859062268U, // <7,1,0,4>: Cost 3 vuzpr <6,7,0,1>, <7,0,1,4>
2712060679U, // <7,1,0,5>: Cost 3 vext3 RHS, <1,0,5,1> 2712060679U, // <7,1,0,5>: Cost 3 vext3 RHS, <1,0,5,1>
2859061568U, // <7,1,0,6>: Cost 3 vuzpr <6,7,0,1>, <6,0,4,6> 2859061568U, // <7,1,0,6>: Cost 3 vuzpr <6,7,0,1>, <6,0,4,6>
3201286145U, // <7,1,0,7>: Cost 3 ins <7,u,0,7>, lane 1 3201286145U, // <7,1,0,7>: Cost 3 ins <7,u,0,7>, lane 1
1638318883U, // <7,1,0,u>: Cost 2 vext3 RHS, <1,0,u,2> 1638318883U, // <7,1,0,u>: Cost 2 vext3 RHS, <1,0,u,2>
2712060714U, // <7,1,1,0>: Cost 3 vext3 RHS, <1,1,0,0> 2712060714U, // <7,1,1,0>: Cost 3 vext3 RHS, <1,1,0,0>
Show All 23 Lines
2692817929U, // <7,1,3,6>: Cost 3 vext3 <1,3,6,7>, <1,3,6,7> 2692817929U, // <7,1,3,6>: Cost 3 vext3 <1,3,6,7>, <1,3,6,7>
2983859604U, // <7,1,3,7>: Cost 3 vzipr <5,1,7,3>, <7,5,1,7> 2983859604U, // <7,1,3,7>: Cost 3 vzipr <5,1,7,3>, <7,5,1,7>
1619223579U, // <7,1,3,u>: Cost 2 vext3 <1,3,u,7>, <1,3,u,7> 1619223579U, // <7,1,3,u>: Cost 2 vext3 <1,3,u,7>, <1,3,u,7>
2712060962U, // <7,1,4,0>: Cost 3 vext3 RHS, <1,4,0,5> 2712060962U, // <7,1,4,0>: Cost 3 vext3 RHS, <1,4,0,5>
2712060971U, // <7,1,4,1>: Cost 3 vext3 RHS, <1,4,1,5> 2712060971U, // <7,1,4,1>: Cost 3 vext3 RHS, <1,4,1,5>
2712060980U, // <7,1,4,2>: Cost 3 vext3 RHS, <1,4,2,5> 2712060980U, // <7,1,4,2>: Cost 3 vext3 RHS, <1,4,2,5>
2129133568U, // <7,1,4,3>: Cost 2 ins <u,1,4,3>, lane 0 2129133568U, // <7,1,4,3>: Cost 2 ins <u,1,4,3>, lane 0
2859060432U, // <7,1,4,4>: Cost 3 vuzpr <6,7,0,1>, <4,4,4,4> 2859060432U, // <7,1,4,4>: Cost 3 vuzpr <6,7,0,1>, <4,4,4,4>
2639007030U, // <7,1,4,5>: Cost 3 vext2 <3,5,7,1>, RHS 2129149952U, // <7,1,4,5>: Cost 2 ins <u,1,4,5>, lane 0
1719618870U, // <7,1,4,6>: Cost 2 vuzpl <7,0,1,2>, RHS 1719618870U, // <7,1,4,6>: Cost 2 vuzpl <7,0,1,2>, RHS
2793360778U, // <7,1,4,7>: Cost 3 vuzpl <7,0,1,2>, <4,6,7,1> 2793360778U, // <7,1,4,7>: Cost 3 vuzpl <7,0,1,2>, <4,6,7,1>
1719618888U, // <7,1,4,u>: Cost 2 vuzpl <7,0,1,2>, RHS 1719618888U, // <7,1,4,u>: Cost 2 vuzpl <7,0,1,2>, RHS
2572812390U, // <7,1,5,0>: Cost 3 vext1 <3,7,1,5>, LHS 2572812390U, // <7,1,5,0>: Cost 3 vext1 <3,7,1,5>, LHS
2693776510U, // <7,1,5,1>: Cost 3 vext3 <1,5,1,7>, <1,5,1,7> 2693776510U, // <7,1,5,1>: Cost 3 vext3 <1,5,1,7>, <1,5,1,7>
3202940928U, // <7,1,5,2>: Cost 3 ins <u,1,5,2>, lane 0 3202940928U, // <7,1,5,2>: Cost 3 ins <u,1,5,2>, lane 0
1620182160U, // <7,1,5,3>: Cost 2 vext3 <1,5,3,7>, <1,5,3,7> 1620182160U, // <7,1,5,3>: Cost 2 vext3 <1,5,3,7>, <1,5,3,7>
2572815670U, // <7,1,5,4>: Cost 3 vext1 <3,7,1,5>, RHS 2572815670U, // <7,1,5,4>: Cost 3 vext1 <3,7,1,5>, RHS
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
1638319730U, // <7,2,2,3>: Cost 2 vext3 RHS, <2,2,3,3> 1638319730U, // <7,2,2,3>: Cost 2 vext3 RHS, <2,2,3,3>
2712061564U, // <7,2,2,4>: Cost 3 vext3 RHS, <2,2,4,4> 2712061564U, // <7,2,2,4>: Cost 3 vext3 RHS, <2,2,4,4>
2698053256U, // <7,2,2,5>: Cost 3 vext3 <2,2,5,7>, <2,2,5,7> 2698053256U, // <7,2,2,5>: Cost 3 vext3 <2,2,5,7>, <2,2,5,7>
2712061581U, // <7,2,2,6>: Cost 3 vext3 RHS, <2,2,6,3> 2712061581U, // <7,2,2,6>: Cost 3 vext3 RHS, <2,2,6,3>
3201433601U, // <7,2,2,7>: Cost 3 ins <7,u,2,7>, lane 1 3201433601U, // <7,2,2,7>: Cost 3 ins <7,u,2,7>, lane 1
1638319775U, // <7,2,2,u>: Cost 2 vext3 RHS, <2,2,u,3> 1638319775U, // <7,2,2,u>: Cost 2 vext3 RHS, <2,2,u,3>
1638319782U, // <7,2,3,0>: Cost 2 vext3 RHS, <2,3,0,1> 1638319782U, // <7,2,3,0>: Cost 2 vext3 RHS, <2,3,0,1>
2693924531U, // <7,2,3,1>: Cost 3 vext3 <1,5,3,7>, <2,3,1,5> 2693924531U, // <7,2,3,1>: Cost 3 vext3 <1,5,3,7>, <2,3,1,5>
2700560061U, // <7,2,3,2>: Cost 3 vext3 <2,6,3,7>, <2,3,2,6> 1638319802U, // <7,2,3,2>: Cost 2 vext3 RHS, <2,3,2,3>
1910112358U, // <7,2,3,3>: Cost 2 vzipr <5,1,7,3>, LHS 1910112358U, // <7,2,3,3>: Cost 2 vzipr <5,1,7,3>, LHS
1638319822U, // <7,2,3,4>: Cost 2 vext3 RHS, <2,3,4,5> 1638319822U, // <7,2,3,4>: Cost 2 vext3 RHS, <2,3,4,5>
2698716889U, // <7,2,3,5>: Cost 3 vext3 <2,3,5,7>, <2,3,5,7> 2698716889U, // <7,2,3,5>: Cost 3 vext3 <2,3,5,7>, <2,3,5,7>
2983854428U, // <7,2,3,6>: Cost 3 vzipr <5,1,7,3>, <0,4,2,6> 1625048802U, // <7,2,3,6>: Cost 2 vext3 <2,3,6,7>, <2,3,6,7>
2990495214U, // <7,2,3,7>: Cost 3 vzipr <6,2,7,3>, <7,6,2,7> 2990495214U, // <7,2,3,7>: Cost 3 vzipr <6,2,7,3>, <7,6,2,7>
1638319854U, // <7,2,3,u>: Cost 2 vext3 RHS, <2,3,u,1> 1638319854U, // <7,2,3,u>: Cost 2 vext3 RHS, <2,3,u,1>
2712061688U, // <7,2,4,0>: Cost 3 vext3 RHS, <2,4,0,2> 2712061688U, // <7,2,4,0>: Cost 3 vext3 RHS, <2,4,0,2>
2712061698U, // <7,2,4,1>: Cost 3 vext3 RHS, <2,4,1,3> 2712061698U, // <7,2,4,1>: Cost 3 vext3 RHS, <2,4,1,3>
2712061708U, // <7,2,4,2>: Cost 3 vext3 RHS, <2,4,2,4> 2712061708U, // <7,2,4,2>: Cost 3 vext3 RHS, <2,4,2,4>
1913438310U, // <7,2,4,3>: Cost 2 vzipr <5,6,7,4>, LHS 1913438310U, // <7,2,4,3>: Cost 2 vzipr <5,6,7,4>, LHS
2712061728U, // <7,2,4,4>: Cost 3 vext3 RHS, <2,4,4,6> 2712061728U, // <7,2,4,4>: Cost 3 vext3 RHS, <2,4,4,6>
2699380522U, // <7,2,4,5>: Cost 3 vext3 <2,4,5,7>, <2,4,5,7> 2699380522U, // <7,2,4,5>: Cost 3 vext3 <2,4,5,7>, <2,4,5,7>
▲ Show 20 Lines • Show All 133 Lines • ▼ Show 20 Lines
3127495888U, // <7,4,1,4>: Cost 3 vtrnr <6,7,0,1>, <4,4,4,4> 3127495888U, // <7,4,1,4>: Cost 3 vtrnr <6,7,0,1>, <4,4,4,4>
2130919424U, // <7,4,1,5>: Cost 2 ins <u,4,1,5>, lane 0 2130919424U, // <7,4,1,5>: Cost 2 ins <u,4,1,5>, lane 0
1988054326U, // <7,4,1,6>: Cost 2 vtrnl <7,0,1,2>, RHS 1988054326U, // <7,4,1,6>: Cost 2 vtrnl <7,0,1,2>, RHS
3061796234U, // <7,4,1,7>: Cost 3 vtrnl <7,0,1,2>, <4,6,7,1> 3061796234U, // <7,4,1,7>: Cost 3 vtrnl <7,0,1,2>, <4,6,7,1>
1988054344U, // <7,4,1,u>: Cost 2 vtrnl <7,0,1,2>, RHS 1988054344U, // <7,4,1,u>: Cost 2 vtrnl <7,0,1,2>, RHS
3204694016U, // <7,4,2,0>: Cost 3 ins <u,4,2,0>, lane 0 3204694016U, // <7,4,2,0>: Cost 3 ins <u,4,2,0>, lane 0
3199172610U, // <7,4,2,1>: Cost 3 ins <7,4,u,1>, lane 2 3199172610U, // <7,4,2,1>: Cost 3 ins <7,4,u,1>, lane 2
2651637352U, // <7,4,2,2>: Cost 3 vext2 <5,6,7,4>, <2,2,2,2> 2651637352U, // <7,4,2,2>: Cost 3 vext2 <5,6,7,4>, <2,2,2,2>
2130976768U, // <7,4,2,3>: Cost 2 ins <u,4,2,3>, lane 0 2125488133U, // <7,4,2,3>: Cost 2 ins <7,4,u,u>, lane 5
2853258138U, // <7,4,2,4>: Cost 3 vuzpr <5,7,2,4>, <1,2,3,4> 2853258138U, // <7,4,2,4>: Cost 3 vuzpr <5,7,2,4>, <1,2,3,4>
2712063030U, // <7,4,2,5>: Cost 3 vext3 RHS, <4,2,5,3> 2712063030U, // <7,4,2,5>: Cost 3 vext3 RHS, <4,2,5,3>
2131001344U, // <7,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0 2131001344U, // <7,4,2,6>: Cost 2 ins <u,4,2,6>, lane 0
3201433601U, // <7,4,2,7>: Cost 3 ins <7,u,2,7>, lane 1 3201433601U, // <7,4,2,7>: Cost 3 ins <7,u,2,7>, lane 1
2131001344U, // <7,4,2,u>: Cost 2 ins <u,4,2,6>, lane 0 2125488133U, // <7,4,2,u>: Cost 2 ins <7,4,u,u>, lane 5
2651637910U, // <7,4,3,0>: Cost 3 vext2 <5,6,7,4>, <3,0,1,2> 2651637910U, // <7,4,3,0>: Cost 3 vext2 <5,6,7,4>, <3,0,1,2>
3201458177U, // <7,4,3,1>: Cost 3 ins <7,u,3,1>, lane 1 3201458177U, // <7,4,3,1>: Cost 3 ins <7,u,3,1>, lane 1
3204784128U, // <7,4,3,2>: Cost 3 ins <u,4,3,2>, lane 0 3204784128U, // <7,4,3,2>: Cost 3 ins <u,4,3,2>, lane 0
2651638172U, // <7,4,3,3>: Cost 3 vext2 <5,6,7,4>, <3,3,3,3> 2651638172U, // <7,4,3,3>: Cost 3 vext2 <5,6,7,4>, <3,3,3,3>
2983857360U, // <7,4,3,4>: Cost 3 vzipr <5,1,7,3>, <4,4,4,4> 2983857360U, // <7,4,3,4>: Cost 3 vzipr <5,1,7,3>, <4,4,4,4>
2639030883U, // <7,4,3,5>: Cost 3 vext2 <3,5,7,4>, <3,5,7,4> 2639030883U, // <7,4,3,5>: Cost 3 vext2 <3,5,7,4>, <3,5,7,4>
2125471746U, // <7,4,3,6>: Cost 2 ins <7,4,u,6>, lane 2 2125471746U, // <7,4,3,6>: Cost 2 ins <7,4,u,6>, lane 2
3201507329U, // <7,4,3,7>: Cost 3 ins <7,u,3,7>, lane 1 3201507329U, // <7,4,3,7>: Cost 3 ins <7,u,3,7>, lane 1
Show All 18 Lines
564579656U, // <7,4,5,u>: Cost 1 vext3 RHS, RHS 564579656U, // <7,4,5,u>: Cost 1 vext3 RHS, RHS
1638468940U, // <7,4,6,0>: Cost 2 vext3 RHS, <4,6,0,2> 1638468940U, // <7,4,6,0>: Cost 2 vext3 RHS, <4,6,0,2>
2712063318U, // <7,4,6,1>: Cost 3 vext3 RHS, <4,6,1,3> 2712063318U, // <7,4,6,1>: Cost 3 vext3 RHS, <4,6,1,3>
2712210780U, // <7,4,6,2>: Cost 3 vext3 RHS, <4,6,2,0> 2712210780U, // <7,4,6,2>: Cost 3 vext3 RHS, <4,6,2,0>
2712210790U, // <7,4,6,3>: Cost 3 vext3 RHS, <4,6,3,1> 2712210790U, // <7,4,6,3>: Cost 3 vext3 RHS, <4,6,3,1>
1638468980U, // <7,4,6,4>: Cost 2 vext3 RHS, <4,6,4,6> 1638468980U, // <7,4,6,4>: Cost 2 vext3 RHS, <4,6,4,6>
2712063358U, // <7,4,6,5>: Cost 3 vext3 RHS, <4,6,5,7> 2712063358U, // <7,4,6,5>: Cost 3 vext3 RHS, <4,6,5,7>
2131296256U, // <7,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0 2131296256U, // <7,4,6,6>: Cost 2 ins <u,4,6,6>, lane 0
2131304448U, // <7,4,6,7>: Cost 2 ins <u,4,6,7>, lane 0 2125488133U, // <7,4,6,7>: Cost 2 ins <7,4,u,u>, lane 5
1638469012U, // <7,4,6,u>: Cost 2 vext3 RHS, <4,6,u,2> 1638469012U, // <7,4,6,u>: Cost 2 vext3 RHS, <4,6,u,2>
2651640826U, // <7,4,7,0>: Cost 3 vext2 <5,6,7,4>, <7,0,1,2> 2651640826U, // <7,4,7,0>: Cost 3 vext2 <5,6,7,4>, <7,0,1,2>
2794279930U, // <7,4,7,1>: Cost 3 vuzpl <7,1,4,6>, <7,0,1,2> 2794279930U, // <7,4,7,1>: Cost 3 vuzpl <7,1,4,6>, <7,0,1,2>
3201761281U, // <7,4,7,2>: Cost 3 ins <7,u,7,2>, lane 1 3201761281U, // <7,4,7,2>: Cost 3 ins <7,u,7,2>, lane 1
3201769473U, // <7,4,7,3>: Cost 3 ins <7,u,7,3>, lane 1 3201769473U, // <7,4,7,3>: Cost 3 ins <7,u,7,3>, lane 1
2847509964U, // <7,4,7,4>: Cost 3 vuzpr <4,7,5,4>, <4,7,5,4> 2847509964U, // <7,4,7,4>: Cost 3 vuzpr <4,7,5,4>, <4,7,5,4>
1858964790U, // <7,4,7,5>: Cost 2 vzipl <7,7,7,7>, RHS 1858964790U, // <7,4,7,5>: Cost 2 vzipl <7,7,7,7>, RHS
1993182518U, // <7,4,7,6>: Cost 2 vtrnl <7,7,7,7>, RHS 1993182518U, // <7,4,7,6>: Cost 2 vtrnl <7,7,7,7>, RHS
2128060417U, // <7,4,7,7>: Cost 2 ins <7,u,7,7>, lane 1 2128060417U, // <7,4,7,7>: Cost 2 ins <7,u,7,7>, lane 1
1858965033U, // <7,4,7,u>: Cost 2 vzipl <7,7,7,7>, RHS 1858965033U, // <7,4,7,u>: Cost 2 vzipl <7,7,7,7>, RHS
1640312302U, // <7,4,u,0>: Cost 2 vext3 RHS, <4,u,0,2> 1640312302U, // <7,4,u,0>: Cost 2 vext3 RHS, <4,u,0,2>
1577899822U, // <7,4,u,1>: Cost 2 vext2 <5,6,7,4>, LHS 1577899822U, // <7,4,u,1>: Cost 2 vext2 <5,6,7,4>, LHS
2127577089U, // <7,4,u,2>: Cost 2 ins <7,u,1,2>, lane 1 2127577089U, // <7,4,u,2>: Cost 2 ins <7,u,1,2>, lane 1
2125266947U, // <7,4,u,3>: Cost 2 ins <7,4,5,u>, lane 3 2125488133U, // <7,4,u,3>: Cost 2 ins <7,4,u,u>, lane 5
1640312342U, // <7,4,u,4>: Cost 2 vext3 RHS, <4,u,4,6> 1640312342U, // <7,4,u,4>: Cost 2 vext3 RHS, <4,u,4,6>
1638469146U, // <7,4,u,5>: Cost 2 vext3 RHS, <4,u,5,1> 1638469146U, // <7,4,u,5>: Cost 2 vext3 RHS, <4,u,5,1>
564579881U, // <7,4,u,6>: Cost 1 vext3 RHS, RHS 564579881U, // <7,4,u,6>: Cost 1 vext3 RHS, RHS
2125266947U, // <7,4,u,7>: Cost 2 ins <7,4,5,u>, lane 3 2125266947U, // <7,4,u,7>: Cost 2 ins <7,4,5,u>, lane 3
564579899U, // <7,4,u,u>: Cost 1 vext3 RHS, RHS 564579899U, // <7,4,u,u>: Cost 1 vext3 RHS, RHS
2579038310U, // <7,5,0,0>: Cost 3 vext1 <4,7,5,0>, LHS 2579038310U, // <7,5,0,0>: Cost 3 vext1 <4,7,5,0>, LHS
2636382310U, // <7,5,0,1>: Cost 3 vext2 <3,1,7,5>, LHS 2131476480U, // <7,5,0,1>: Cost 2 ins <u,5,0,1>, lane 0
1722597478U, // <7,5,0,2>: Cost 2 vuzpl <7,4,5,6>, LHS 1722597478U, // <7,5,0,2>: Cost 2 vuzpl <7,4,5,6>, LHS
3201253377U, // <7,5,0,3>: Cost 3 ins <7,u,0,3>, lane 1 3201253377U, // <7,5,0,3>: Cost 3 ins <7,u,0,3>, lane 1
2712063586U, // <7,5,0,4>: Cost 3 vext3 RHS, <5,0,4,1> 2712063586U, // <7,5,0,4>: Cost 3 vext3 RHS, <5,0,4,1>
2987150554U, // <7,5,0,5>: Cost 3 vzipr <5,6,7,0>, <4,4,5,5> 2987150554U, // <7,5,0,5>: Cost 3 vzipr <5,6,7,0>, <4,4,5,5>
2987149826U, // <7,5,0,6>: Cost 3 vzipr <5,6,7,0>, <3,4,5,6> 2987149826U, // <7,5,0,6>: Cost 3 vzipr <5,6,7,0>, <3,4,5,6>
2131525632U, // <7,5,0,7>: Cost 2 ins <u,5,0,7>, lane 0 2131525632U, // <7,5,0,7>: Cost 2 ins <u,5,0,7>, lane 0
1722597532U, // <7,5,0,u>: Cost 2 vuzpl <7,4,5,6>, LHS 1722597532U, // <7,5,0,u>: Cost 2 vuzpl <7,4,5,6>, LHS
2714054287U, // <7,5,1,0>: Cost 3 vext3 RHS, <5,1,0,1> 2714054287U, // <7,5,1,0>: Cost 3 vext3 RHS, <5,1,0,1>
Show All 23 Lines
2983856642U, // <7,5,3,6>: Cost 3 vzipr <5,1,7,3>, <3,4,5,6> 2983856642U, // <7,5,3,6>: Cost 3 vzipr <5,1,7,3>, <3,4,5,6>
2047872310U, // <7,5,3,7>: Cost 2 vtrnr <5,7,1,3>, RHS 2047872310U, // <7,5,3,7>: Cost 2 vtrnr <5,7,1,3>, RHS
2047872311U, // <7,5,3,u>: Cost 2 vtrnr <5,7,1,3>, RHS 2047872311U, // <7,5,3,u>: Cost 2 vtrnr <5,7,1,3>, RHS
2579071078U, // <7,5,4,0>: Cost 3 vext1 <4,7,5,4>, LHS 2579071078U, // <7,5,4,0>: Cost 3 vext1 <4,7,5,4>, LHS
2987182994U, // <7,5,4,1>: Cost 3 vzipr <5,6,7,4>, <4,0,5,1> 2987182994U, // <7,5,4,1>: Cost 3 vzipr <5,6,7,4>, <4,0,5,1>
2249281674U, // <7,5,4,2>: Cost 3 vrev <5,7,2,4> 2249281674U, // <7,5,4,2>: Cost 3 vrev <5,7,2,4>
3201548289U, // <7,5,4,3>: Cost 3 ins <7,u,4,3>, lane 1 3201548289U, // <7,5,4,3>: Cost 3 ins <7,u,4,3>, lane 1
2579074508U, // <7,5,4,4>: Cost 3 vext1 <4,7,5,4>, <4,7,5,4> 2579074508U, // <7,5,4,4>: Cost 3 vext1 <4,7,5,4>, <4,7,5,4>
2636385590U, // <7,5,4,5>: Cost 3 vext2 <3,1,7,5>, RHS 2131804160U, // <7,5,4,5>: Cost 2 ins <u,5,4,5>, lane 0
1722600758U, // <7,5,4,6>: Cost 2 vuzpl <7,4,5,6>, RHS 1722600758U, // <7,5,4,6>: Cost 2 vuzpl <7,4,5,6>, RHS
1638322118U, // <7,5,4,7>: Cost 2 vext3 RHS, <5,4,7,6> 1638322118U, // <7,5,4,7>: Cost 2 vext3 RHS, <5,4,7,6>
1638469583U, // <7,5,4,u>: Cost 2 vext3 RHS, <5,4,u,6> 1638469583U, // <7,5,4,u>: Cost 2 vext3 RHS, <5,4,u,6>
2714054611U, // <7,5,5,0>: Cost 3 vext3 RHS, <5,5,0,1> 2714054611U, // <7,5,5,0>: Cost 3 vext3 RHS, <5,5,0,1>
2714054620U, // <7,5,5,1>: Cost 3 vext3 RHS, <5,5,1,1> 2714054620U, // <7,5,5,1>: Cost 3 vext3 RHS, <5,5,1,1>
3201613825U, // <7,5,5,2>: Cost 3 ins <7,u,5,2>, lane 1 3201613825U, // <7,5,5,2>: Cost 3 ins <7,u,5,2>, lane 1
2649657204U, // <7,5,5,3>: Cost 3 vext2 <5,3,7,5>, <5,3,7,5> 2649657204U, // <7,5,5,3>: Cost 3 vext2 <5,3,7,5>, <5,3,7,5>
2714054651U, // <7,5,5,4>: Cost 3 vext3 RHS, <5,5,4,5> 2714054651U, // <7,5,5,4>: Cost 3 vext3 RHS, <5,5,4,5>
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
2132303872U, // <7,6,2,3>: Cost 2 ins <u,6,2,3>, lane 0 2132303872U, // <7,6,2,3>: Cost 2 ins <u,6,2,3>, lane 0
2714055137U, // <7,6,2,4>: Cost 3 vext3 RHS, <6,2,4,5> 2714055137U, // <7,6,2,4>: Cost 3 vext3 RHS, <6,2,4,5>
2714055148U, // <7,6,2,5>: Cost 3 vext3 RHS, <6,2,5,7> 2714055148U, // <7,6,2,5>: Cost 3 vext3 RHS, <6,2,5,7>
2714055152U, // <7,6,2,6>: Cost 3 vext3 RHS, <6,2,6,2> 2714055152U, // <7,6,2,6>: Cost 3 vext3 RHS, <6,2,6,2>
1638470138U, // <7,6,2,7>: Cost 2 vext3 RHS, <6,2,7,3> 1638470138U, // <7,6,2,7>: Cost 2 vext3 RHS, <6,2,7,3>
1638470147U, // <7,6,2,u>: Cost 2 vext3 RHS, <6,2,u,3> 1638470147U, // <7,6,2,u>: Cost 2 vext3 RHS, <6,2,u,3>
2650327190U, // <7,6,3,0>: Cost 3 vext2 <5,4,7,6>, <3,0,1,2> 2650327190U, // <7,6,3,0>: Cost 3 vext2 <5,4,7,6>, <3,0,1,2>
3121614200U, // <7,6,3,1>: Cost 3 vtrnr <5,7,1,3>, <4,6,5,1> 3121614200U, // <7,6,3,1>: Cost 3 vtrnr <5,7,1,3>, <4,6,5,1>
2983857052U, // <7,6,3,2>: Cost 3 vzipr <5,1,7,3>, <4,0,6,2> 1181504354U, // <7,6,3,2>: Cost 2 vrev <6,7,2,3>
2650327452U, // <7,6,3,3>: Cost 3 vext2 <5,4,7,6>, <3,3,3,3> 2650327452U, // <7,6,3,3>: Cost 3 vext2 <5,4,7,6>, <3,3,3,3>
2712064562U, // <7,6,3,4>: Cost 3 vext3 RHS, <6,3,4,5> 2712064562U, // <7,6,3,4>: Cost 3 vext3 RHS, <6,3,4,5>
3206135808U, // <7,6,3,5>: Cost 3 ins <u,6,3,5>, lane 0 3206135808U, // <7,6,3,5>: Cost 3 ins <u,6,3,5>, lane 0
2983857380U, // <7,6,3,6>: Cost 3 vzipr <5,1,7,3>, <4,4,6,6> 2983857380U, // <7,6,3,6>: Cost 3 vzipr <5,1,7,3>, <4,4,6,6>
1910115638U, // <7,6,3,7>: Cost 2 vzipr <5,1,7,3>, RHS 1910115638U, // <7,6,3,7>: Cost 2 vzipr <5,1,7,3>, RHS
1910115639U, // <7,6,3,u>: Cost 2 vzipr <5,1,7,3>, RHS 1910115639U, // <7,6,3,u>: Cost 2 vzipr <5,1,7,3>, RHS
2650327954U, // <7,6,4,0>: Cost 3 vext2 <5,4,7,6>, <4,0,5,1> 2650327954U, // <7,6,4,0>: Cost 3 vext2 <5,4,7,6>, <4,0,5,1>
2735952486U, // <7,6,4,1>: Cost 3 vext3 RHS, <6,4,1,3> 2735952486U, // <7,6,4,1>: Cost 3 vext3 RHS, <6,4,1,3>
Show All 19 Lines
3201695745U, // <7,6,6,3>: Cost 3 ins <7,u,6,3>, lane 1 3201695745U, // <7,6,6,3>: Cost 3 ins <7,u,6,3>, lane 1
2714055461U, // <7,6,6,4>: Cost 3 vext3 RHS, <6,6,4,5> 2714055461U, // <7,6,6,4>: Cost 3 vext3 RHS, <6,6,4,5>
2714055472U, // <7,6,6,5>: Cost 3 vext3 RHS, <6,6,5,7> 2714055472U, // <7,6,6,5>: Cost 3 vext3 RHS, <6,6,5,7>
1638323000U, // <7,6,6,6>: Cost 2 vext3 RHS, <6,6,6,6> 1638323000U, // <7,6,6,6>: Cost 2 vext3 RHS, <6,6,6,6>
1638470466U, // <7,6,6,7>: Cost 2 vext3 RHS, <6,6,7,7> 1638470466U, // <7,6,6,7>: Cost 2 vext3 RHS, <6,6,7,7>
1638470475U, // <7,6,6,u>: Cost 2 vext3 RHS, <6,6,u,7> 1638470475U, // <7,6,6,u>: Cost 2 vext3 RHS, <6,6,u,7>
1638323022U, // <7,6,7,0>: Cost 2 vext3 RHS, <6,7,0,1> 1638323022U, // <7,6,7,0>: Cost 2 vext3 RHS, <6,7,0,1>
2712064854U, // <7,6,7,1>: Cost 3 vext3 RHS, <6,7,1,0> 2712064854U, // <7,6,7,1>: Cost 3 vext3 RHS, <6,7,1,0>
2712064865U, // <7,6,7,2>: Cost 3 vext3 RHS, <6,7,2,2> 1638323042U, // <7,6,7,2>: Cost 2 vext3 RHS, <6,7,2,3>
2712064872U, // <7,6,7,3>: Cost 3 vext3 RHS, <6,7,3,0> 2712064872U, // <7,6,7,3>: Cost 3 vext3 RHS, <6,7,3,0>
1638323062U, // <7,6,7,4>: Cost 2 vext3 RHS, <6,7,4,5> 1638323062U, // <7,6,7,4>: Cost 2 vext3 RHS, <6,7,4,5>
2712064894U, // <7,6,7,5>: Cost 3 vext3 RHS, <6,7,5,4> 2712064894U, // <7,6,7,5>: Cost 3 vext3 RHS, <6,7,5,4>
1723348417U, // <7,6,7,6>: Cost 2 vuzpl <7,5,6,7>, <7,5,6,7> 1638323082U, // <7,6,7,6>: Cost 2 vext3 RHS, <6,7,6,7>
1912802614U, // <7,6,7,7>: Cost 2 vzipr <5,5,7,7>, RHS 1912802614U, // <7,6,7,7>: Cost 2 vzipr <5,5,7,7>, RHS
1638323094U, // <7,6,7,u>: Cost 2 vext3 RHS, <6,7,u,1> 1638323094U, // <7,6,7,u>: Cost 2 vext3 RHS, <6,7,u,1>
1638470559U, // <7,6,u,0>: Cost 2 vext3 RHS, <6,u,0,1> 1638470559U, // <7,6,u,0>: Cost 2 vext3 RHS, <6,u,0,1>
1576589102U, // <7,6,u,1>: Cost 2 vext2 <5,4,7,6>, LHS 1576589102U, // <7,6,u,1>: Cost 2 vext2 <5,4,7,6>, LHS
2132148224U, // <7,6,u,2>: Cost 2 ins <u,6,0,2>, lane 0 2132148224U, // <7,6,u,2>: Cost 2 ins <u,6,0,2>, lane 0
2132303872U, // <7,6,u,3>: Cost 2 ins <u,6,2,3>, lane 0 2132303872U, // <7,6,u,3>: Cost 2 ins <u,6,2,3>, lane 0
1638470599U, // <7,6,u,4>: Cost 2 vext3 RHS, <6,u,4,5> 1638470599U, // <7,6,u,4>: Cost 2 vext3 RHS, <6,u,4,5>
1576589466U, // <7,6,u,5>: Cost 2 vext2 <5,4,7,6>, RHS 1576589466U, // <7,6,u,5>: Cost 2 vext2 <5,4,7,6>, RHS
▲ Show 20 Lines • Show All 239 Lines • ▼ Show 20 Lines
537748125U, // <u,0,u,2>: Cost 1 vext3 LHS, LHS 537748125U, // <u,0,u,2>: Cost 1 vext3 LHS, LHS
1012113409U, // <u,0,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <u,0,u,3>: Cost 1 ins LHS, lane 1
1611932338U, // <u,0,u,4>: Cost 2 vext3 LHS, <0,u,4,6> 1611932338U, // <u,0,u,4>: Cost 2 vext3 LHS, <0,u,4,6>
1551399066U, // <u,0,u,5>: Cost 2 vext2 <1,2,u,0>, RHS 1551399066U, // <u,0,u,5>: Cost 2 vext2 <1,2,u,0>, RHS
1517605798U, // <u,0,u,6>: Cost 2 vext1 <6,u,0,u>, <6,u,0,u> 1517605798U, // <u,0,u,6>: Cost 2 vext1 <6,u,0,u>, <6,u,0,u>
1036328961U, // <u,0,u,7>: Cost 1 ins RHS, lane 1 1036328961U, // <u,0,u,7>: Cost 1 ins RHS, lane 1
537748179U, // <u,0,u,u>: Cost 1 vext3 LHS, LHS 537748179U, // <u,0,u,u>: Cost 1 vext3 LHS, LHS
1818149622U, // <u,1,0,0>: Cost 2 vzipl <1,0,3,2>, <1,0,3,2> 1818149622U, // <u,1,0,0>: Cost 2 vzipl <1,0,3,2>, <1,0,3,2>
1549410406U, // <u,1,0,1>: Cost 2 vext2 <0,u,u,1>, LHS 1007951877U, // <u,1,0,1>: Cost 1 ins LHS, lane 5
1725587558U, // <u,1,0,2>: Cost 2 vuzpl <u,0,1,2>, LHS 1725587558U, // <u,1,0,2>: Cost 2 vuzpl <u,0,1,2>, LHS
1007910914U, // <u,1,0,3>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,0,3>: Cost 1 ins LHS, lane 2
2081660930U, // <u,1,0,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <u,1,0,4>: Cost 2 ins <0,1,u,4>, lane 2
2081669122U, // <u,1,0,5>: Cost 2 ins <0,1,u,5>, lane 2 2081669122U, // <u,1,0,5>: Cost 2 ins <0,1,u,5>, lane 2
2081677314U, // <u,1,0,6>: Cost 2 ins <0,1,u,6>, lane 2 2081677314U, // <u,1,0,6>: Cost 2 ins <0,1,u,6>, lane 2
2081685506U, // <u,1,0,7>: Cost 2 ins <0,1,u,7>, lane 2 2081685506U, // <u,1,0,7>: Cost 2 ins <0,1,u,7>, lane 2
1007910914U, // <u,1,0,u>: Cost 1 ins LHS, lane 2 1007951877U, // <u,1,0,u>: Cost 1 ins LHS, lane 5
1481786002U, // <u,1,1,0>: Cost 2 vext1 <0,u,1,1>, <0,u,1,1> 1481786002U, // <u,1,1,0>: Cost 2 vext1 <0,u,1,1>, <0,u,1,1>
202162278U, // <u,1,1,1>: Cost 1 vdup1 LHS 202162278U, // <u,1,1,1>: Cost 1 vdup1 LHS
1860551574U, // <u,1,1,2>: Cost 2 vzipl LHS, <1,2,3,0> 1860551574U, // <u,1,1,2>: Cost 2 vzipl LHS, <1,2,3,0>
1007910914U, // <u,1,1,3>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,1,3>: Cost 1 ins LHS, lane 2
1481788726U, // <u,1,1,4>: Cost 2 vext1 <0,u,1,1>, RHS 1481788726U, // <u,1,1,4>: Cost 2 vext1 <0,u,1,1>, RHS
1860551824U, // <u,1,1,5>: Cost 2 vzipl LHS, <1,5,3,7> 1860551824U, // <u,1,1,5>: Cost 2 vzipl LHS, <1,5,3,7>
2081677314U, // <u,1,1,6>: Cost 2 ins <0,1,u,6>, lane 2 2081677314U, // <u,1,1,6>: Cost 2 ins <0,1,u,6>, lane 2
2081685506U, // <u,1,1,7>: Cost 2 ins <0,1,u,7>, lane 2 2081685506U, // <u,1,1,7>: Cost 2 ins <0,1,u,7>, lane 2
Show All 9 Lines
835584U, // <u,1,2,u>: Cost 0 copy LHS 835584U, // <u,1,2,u>: Cost 0 copy LHS
1487773798U, // <u,1,3,0>: Cost 2 vext1 <1,u,1,3>, LHS 1487773798U, // <u,1,3,0>: Cost 2 vext1 <1,u,1,3>, LHS
1611490264U, // <u,1,3,1>: Cost 2 vext3 LHS, <1,3,1,3> 1611490264U, // <u,1,3,1>: Cost 2 vext3 LHS, <1,3,1,3>
1880328342U, // <u,1,3,2>: Cost 2 vzipr LHS, <3,0,1,2> 1880328342U, // <u,1,3,2>: Cost 2 vzipr LHS, <3,0,1,2>
945004646U, // <u,1,3,3>: Cost 1 vtrnr LHS, LHS 945004646U, // <u,1,3,3>: Cost 1 vtrnr LHS, LHS
1487777078U, // <u,1,3,4>: Cost 2 vext1 <1,u,1,3>, RHS 1487777078U, // <u,1,3,4>: Cost 2 vext1 <1,u,1,3>, RHS
1611490304U, // <u,1,3,5>: Cost 2 vext3 LHS, <1,3,5,7> 1611490304U, // <u,1,3,5>: Cost 2 vext3 LHS, <1,3,5,7>
2087297027U, // <u,1,3,6>: Cost 2 ins <1,1,3,u>, lane 3 2087297027U, // <u,1,3,6>: Cost 2 ins <1,1,3,u>, lane 3
2091933697U, // <u,1,3,7>: Cost 2 ins <1,u,3,7>, lane 1 2133737476U, // <u,1,3,7>: Cost 2 ins <u,u,3,7>, lane 4
945004651U, // <u,1,3,u>: Cost 1 vtrnr LHS, LHS 945004651U, // <u,1,3,u>: Cost 1 vtrnr LHS, LHS
1567992749U, // <u,1,4,0>: Cost 2 vext2 <4,0,u,1>, <4,0,u,1> 1567992749U, // <u,1,4,0>: Cost 2 vext2 <4,0,u,1>, <4,0,u,1>
2081636354U, // <u,1,4,1>: Cost 2 ins <0,1,u,1>, lane 2 2081636354U, // <u,1,4,1>: Cost 2 ins <0,1,u,1>, lane 2
2081644546U, // <u,1,4,2>: Cost 2 ins <0,1,u,2>, lane 2 2081644546U, // <u,1,4,2>: Cost 2 ins <0,1,u,2>, lane 2
1007910914U, // <u,1,4,3>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,4,3>: Cost 1 ins LHS, lane 2
2081660930U, // <u,1,4,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <u,1,4,4>: Cost 2 ins <0,1,u,4>, lane 2
1549413686U, // <u,1,4,5>: Cost 2 vext2 <0,u,u,1>, RHS 1007951877U, // <u,1,4,5>: Cost 1 ins LHS, lane 5
1725590838U, // <u,1,4,6>: Cost 2 vuzpl <u,0,1,2>, RHS 1725590838U, // <u,1,4,6>: Cost 2 vuzpl <u,0,1,2>, RHS
2081685506U, // <u,1,4,7>: Cost 2 ins <0,1,u,7>, lane 2 2081685506U, // <u,1,4,7>: Cost 2 ins <0,1,u,7>, lane 2
1007910914U, // <u,1,4,u>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,4,u>: Cost 1 ins LHS, lane 2
1481818774U, // <u,1,5,0>: Cost 2 vext1 <0,u,1,5>, <0,u,1,5> 1481818774U, // <u,1,5,0>: Cost 2 vext1 <0,u,1,5>, <0,u,1,5>
1863533364U, // <u,1,5,1>: Cost 2 vzipl RHS, <1,1,1,1> 1863533364U, // <u,1,5,1>: Cost 2 vzipl RHS, <1,1,1,1>
1863533462U, // <u,1,5,2>: Cost 2 vzipl RHS, <1,2,3,0> 1863533462U, // <u,1,5,2>: Cost 2 vzipl RHS, <1,2,3,0>
1007910914U, // <u,1,5,3>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,5,3>: Cost 1 ins LHS, lane 2
1481821494U, // <u,1,5,4>: Cost 2 vext1 <0,u,1,5>, RHS 1481821494U, // <u,1,5,4>: Cost 2 vext1 <0,u,1,5>, RHS
1863533712U, // <u,1,5,5>: Cost 2 vzipl RHS, <1,5,3,7> 1863533712U, // <u,1,5,5>: Cost 2 vzipl RHS, <1,5,3,7>
2104016897U, // <u,1,5,6>: Cost 2 ins <3,u,5,6>, lane 1 2133876740U, // <u,1,5,6>: Cost 2 ins <u,u,5,6>, lane 4
1750224182U, // <u,1,5,7>: Cost 2 vuzpr <0,u,1,1>, RHS 1750224182U, // <u,1,5,7>: Cost 2 vuzpr <0,u,1,1>, RHS
1007910914U, // <u,1,5,u>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,5,u>: Cost 1 ins LHS, lane 2
2081628162U, // <u,1,6,0>: Cost 2 ins <0,1,u,0>, lane 2 2081628162U, // <u,1,6,0>: Cost 2 ins <0,1,u,0>, lane 2
1997751092U, // <u,1,6,1>: Cost 2 vtrnl RHS, <1,1,1,1> 1997751092U, // <u,1,6,1>: Cost 2 vtrnl RHS, <1,1,1,1>
2110029825U, // <u,1,6,2>: Cost 2 ins <4,u,6,2>, lane 1 2133917700U, // <u,1,6,2>: Cost 2 ins <u,u,6,2>, lane 4
1007910914U, // <u,1,6,3>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,6,3>: Cost 1 ins LHS, lane 2
2081660930U, // <u,1,6,4>: Cost 2 ins <0,1,u,4>, lane 2 2081660930U, // <u,1,6,4>: Cost 2 ins <0,1,u,4>, lane 2
1997751296U, // <u,1,6,5>: Cost 2 vtrnl RHS, <1,3,5,7> 1997751296U, // <u,1,6,5>: Cost 2 vtrnl RHS, <1,3,5,7>
2110062593U, // <u,1,6,6>: Cost 2 ins <4,u,6,6>, lane 1 2133950468U, // <u,1,6,6>: Cost 2 ins <u,u,6,6>, lane 4
1036328961U, // <u,1,6,7>: Cost 1 ins RHS, lane 1 1060216836U, // <u,1,6,7>: Cost 1 ins RHS, lane 4
1007910914U, // <u,1,6,u>: Cost 1 ins LHS, lane 2 1007910914U, // <u,1,6,u>: Cost 1 ins LHS, lane 2
2116059137U, // <u,1,7,0>: Cost 2 ins <5,u,7,0>, lane 1 2133975044U, // <u,1,7,0>: Cost 2 ins <u,u,7,0>, lane 4
1906901002U, // <u,1,7,1>: Cost 2 vzipr RHS, <0,0,1,1> 1906901002U, // <u,1,7,1>: Cost 2 vzipr RHS, <0,0,1,1>
1906903190U, // <u,1,7,2>: Cost 2 vzipr RHS, <3,0,1,2> 1906903190U, // <u,1,7,2>: Cost 2 vzipr RHS, <3,0,1,2>
969220198U, // <u,1,7,3>: Cost 1 vtrnr RHS, LHS 969220198U, // <u,1,7,3>: Cost 1 vtrnr RHS, LHS
2116091905U, // <u,1,7,4>: Cost 2 ins <5,u,7,4>, lane 1 2134007812U, // <u,1,7,4>: Cost 2 ins <u,u,7,4>, lane 4
1152558485U, // <u,1,7,5>: Cost 2 vrev <1,u,5,7> 1152558485U, // <u,1,7,5>: Cost 2 vrev <1,u,5,7>
2116108289U, // <u,1,7,6>: Cost 2 ins <5,u,7,6>, lane 1 2134024196U, // <u,1,7,6>: Cost 2 ins <u,u,7,6>, lane 4
2116116481U, // <u,1,7,7>: Cost 2 ins <5,u,7,7>, lane 1 2134032388U, // <u,1,7,7>: Cost 2 ins <u,u,7,7>, lane 4
969220203U, // <u,1,7,u>: Cost 1 vtrnr RHS, LHS 969220203U, // <u,1,7,u>: Cost 1 vtrnr RHS, LHS
1007509507U, // <u,1,u,0>: Cost 1 ins LHS, lane 3 1007509507U, // <u,1,u,0>: Cost 1 ins LHS, lane 3
1007509507U, // <u,1,u,1>: Cost 1 ins LHS, lane 3 1007951877U, // <u,1,u,1>: Cost 1 ins LHS, lane 5
1007509507U, // <u,1,u,2>: Cost 1 ins LHS, lane 3 1007509507U, // <u,1,u,2>: Cost 1 ins LHS, lane 3
835584U, // <u,1,u,3>: Cost 0 copy LHS 835584U, // <u,1,u,3>: Cost 0 copy LHS
1007509507U, // <u,1,u,4>: Cost 1 ins LHS, lane 3 1007509507U, // <u,1,u,4>: Cost 1 ins LHS, lane 3
1007509507U, // <u,1,u,5>: Cost 1 ins LHS, lane 3 1007509507U, // <u,1,u,5>: Cost 1 ins LHS, lane 3
1007509507U, // <u,1,u,6>: Cost 1 ins LHS, lane 3 1007509507U, // <u,1,u,6>: Cost 1 ins LHS, lane 3
1007509507U, // <u,1,u,7>: Cost 1 ins LHS, lane 3 1007509507U, // <u,1,u,7>: Cost 1 ins LHS, lane 3
835584U, // <u,1,u,u>: Cost 0 copy LHS 835584U, // <u,1,u,u>: Cost 0 copy LHS
1726332928U, // <u,2,0,0>: Cost 2 vuzpl LHS, <0,0,0,0> 1726332928U, // <u,2,0,0>: Cost 2 vuzpl LHS, <0,0,0,0>
▲ Show 20 Lines • Show All 133 Lines • ▼ Show 20 Lines
676572471U, // <u,3,5,u>: Cost 1 vuzpr LHS, RHS 676572471U, // <u,3,5,u>: Cost 1 vuzpr LHS, RHS
1798090850U, // <u,3,6,0>: Cost 2 vuzpr LHS, <5,6,7,0> 1798090850U, // <u,3,6,0>: Cost 2 vuzpr LHS, <5,6,7,0>
1997752470U, // <u,3,6,1>: Cost 2 vtrnl RHS, <3,0,1,2> 1997752470U, // <u,3,6,1>: Cost 2 vtrnl RHS, <3,0,1,2>
1581281795U, // <u,3,6,2>: Cost 2 vext2 <6,2,u,3>, <6,2,u,3> 1581281795U, // <u,3,6,2>: Cost 2 vext2 <6,2,u,3>, <6,2,u,3>
1997752732U, // <u,3,6,3>: Cost 2 vtrnl RHS, <3,3,3,3> 1997752732U, // <u,3,6,3>: Cost 2 vtrnl RHS, <3,3,3,3>
1798090854U, // <u,3,6,4>: Cost 2 vuzpr LHS, <5,6,7,4> 1798090854U, // <u,3,6,4>: Cost 2 vuzpr LHS, <5,6,7,4>
1164495686U, // <u,3,6,5>: Cost 2 vrev <3,u,5,6> 1164495686U, // <u,3,6,5>: Cost 2 vrev <3,u,5,6>
1592562488U, // <u,3,6,6>: Cost 2 vext2 LHS, <6,6,6,6> 1592562488U, // <u,3,6,6>: Cost 2 vext2 LHS, <6,6,6,6>
1036328961U, // <u,3,6,7>: Cost 1 ins RHS, lane 1 1060216836U, // <u,3,6,7>: Cost 1 ins RHS, lane 4
1036328961U, // <u,3,6,u>: Cost 1 ins RHS, lane 1 1060216836U, // <u,3,6,u>: Cost 1 ins RHS, lane 4
1487954022U, // <u,3,7,0>: Cost 2 vext1 <1,u,3,7>, LHS 1487954022U, // <u,3,7,0>: Cost 2 vext1 <1,u,3,7>, LHS
1487955331U, // <u,3,7,1>: Cost 2 vext1 <1,u,3,7>, <1,u,3,7> 1487955331U, // <u,3,7,1>: Cost 2 vext1 <1,u,3,7>, <1,u,3,7>
1493928028U, // <u,3,7,2>: Cost 2 vext1 <2,u,3,7>, <2,u,3,7> 1493928028U, // <u,3,7,2>: Cost 2 vext1 <2,u,3,7>, <2,u,3,7>
1906901832U, // <u,3,7,3>: Cost 2 vzipr RHS, <1,1,3,3> 1906901832U, // <u,3,7,3>: Cost 2 vzipr RHS, <1,1,3,3>
1487957302U, // <u,3,7,4>: Cost 2 vext1 <1,u,3,7>, RHS 1487957302U, // <u,3,7,4>: Cost 2 vext1 <1,u,3,7>, RHS
2042963662U, // <u,3,7,5>: Cost 2 vtrnr RHS, <2,3,4,5> 2042963662U, // <u,3,7,5>: Cost 2 vtrnr RHS, <2,3,4,5>
2116108289U, // <u,3,7,6>: Cost 2 ins <5,u,7,6>, lane 1 2134024196U, // <u,3,7,6>: Cost 2 ins <u,u,7,6>, lane 4
1906902160U, // <u,3,7,7>: Cost 2 vzipr RHS, <1,5,3,7> 1906902160U, // <u,3,7,7>: Cost 2 vzipr RHS, <1,5,3,7>
1487959854U, // <u,3,7,u>: Cost 2 vext1 <1,u,3,7>, LHS 1487959854U, // <u,3,7,u>: Cost 2 vext1 <1,u,3,7>, LHS
1544787667U, // <u,3,u,0>: Cost 2 vext2 LHS, <u,0,1,2> 1544787667U, // <u,3,u,0>: Cost 2 vext2 LHS, <u,0,1,2>
471045934U, // <u,3,u,1>: Cost 1 vext2 LHS, LHS 471045934U, // <u,3,u,1>: Cost 1 vext2 LHS, LHS
1880367862U, // <u,3,u,2>: Cost 2 vzipr LHS, <1,0,3,2> 1880367862U, // <u,3,u,2>: Cost 2 vzipr LHS, <1,0,3,2>
676569757U, // <u,3,u,3>: Cost 1 vuzpr LHS, LHS 676569757U, // <u,3,u,3>: Cost 1 vuzpr LHS, LHS
1544788031U, // <u,3,u,4>: Cost 2 vext2 LHS, <u,4,5,6> 1544788031U, // <u,3,u,4>: Cost 2 vext2 LHS, <u,4,5,6>
471046298U, // <u,3,u,5>: Cost 1 vext2 LHS, RHS 471046298U, // <u,3,u,5>: Cost 1 vext2 LHS, RHS
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1494009958U, // <u,4,u,2>: Cost 2 vext1 <2,u,4,u>, <2,u,4,u> 1494009958U, // <u,4,u,2>: Cost 2 vext1 <2,u,4,u>, <2,u,4,u>
1012113409U, // <u,4,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <u,4,u,3>: Cost 1 ins LHS, lane 1
161926454U, // <u,4,u,4>: Cost 1 vdup0 RHS 161926454U, // <u,4,u,4>: Cost 1 vdup0 RHS
791457078U, // <u,4,u,5>: Cost 1 vzipl LHS, RHS 791457078U, // <u,4,u,5>: Cost 1 vzipl LHS, RHS
537751081U, // <u,4,u,6>: Cost 1 vext3 LHS, RHS 537751081U, // <u,4,u,6>: Cost 1 vext3 LHS, RHS
1036328961U, // <u,4,u,7>: Cost 1 ins RHS, lane 1 1036328961U, // <u,4,u,7>: Cost 1 ins RHS, lane 1
537751099U, // <u,4,u,u>: Cost 1 vext3 LHS, RHS 537751099U, // <u,4,u,u>: Cost 1 vext3 LHS, RHS
2085683201U, // <u,5,0,0>: Cost 2 ins <0,u,0,0>, lane 1 2085683201U, // <u,5,0,0>: Cost 2 ins <0,u,0,0>, lane 1
1549443174U, // <u,5,0,1>: Cost 2 vext2 <0,u,u,5>, LHS 1034493957U, // <u,5,0,1>: Cost 1 ins RHS, lane 5
1727914086U, // <u,5,0,2>: Cost 2 vuzpl <u,3,5,7>, LHS 1727914086U, // <u,5,0,2>: Cost 2 vuzpl <u,3,5,7>, LHS
2085707777U, // <u,5,0,3>: Cost 2 ins <0,u,0,3>, lane 1 2085707777U, // <u,5,0,3>: Cost 2 ins <0,u,0,3>, lane 1
1546273106U, // <u,5,0,4>: Cost 2 vext2 <0,4,1,5>, <0,4,1,5> 1546273106U, // <u,5,0,4>: Cost 2 vext2 <0,4,1,5>, <0,4,1,5>
1678778497U, // <u,5,0,5>: Cost 2 vuzpl <0,1,5,3>, <0,1,5,3> 1678778497U, // <u,5,0,5>: Cost 2 vuzpl <0,1,5,3>, <0,1,5,3>
2108219394U, // <u,5,0,6>: Cost 2 ins <4,5,u,6>, lane 2 2108219394U, // <u,5,0,6>: Cost 2 ins <4,5,u,6>, lane 2
1034485762U, // <u,5,0,7>: Cost 1 ins RHS, lane 2 1034485762U, // <u,5,0,7>: Cost 1 ins RHS, lane 2
1034485762U, // <u,5,0,u>: Cost 1 ins RHS, lane 2 1034493957U, // <u,5,0,u>: Cost 1 ins RHS, lane 5
1505968230U, // <u,5,1,0>: Cost 2 vext1 <4,u,5,1>, LHS 1505968230U, // <u,5,1,0>: Cost 2 vext1 <4,u,5,1>, LHS
1860554448U, // <u,5,1,1>: Cost 2 vzipl LHS, <5,1,7,3> 1860554448U, // <u,5,1,1>: Cost 2 vzipl LHS, <5,1,7,3>
2103689217U, // <u,5,1,2>: Cost 2 ins <3,u,1,2>, lane 1 2103689217U, // <u,5,1,2>: Cost 2 ins <3,u,1,2>, lane 1
1750253670U, // <u,5,1,3>: Cost 2 vuzpr <0,u,1,5>, LHS 1750253670U, // <u,5,1,3>: Cost 2 vuzpr <0,u,1,5>, LHS
1505971738U, // <u,5,1,4>: Cost 2 vext1 <4,u,5,1>, <4,u,5,1> 1505971738U, // <u,5,1,4>: Cost 2 vext1 <4,u,5,1>, <4,u,5,1>
1860554756U, // <u,5,1,5>: Cost 2 vzipl LHS, <5,5,5,5> 1860554756U, // <u,5,1,5>: Cost 2 vzipl LHS, <5,5,5,5>
1860554850U, // <u,5,1,6>: Cost 2 vzipl LHS, <5,6,7,0> 1860554850U, // <u,5,1,6>: Cost 2 vzipl LHS, <5,6,7,0>
1034485762U, // <u,5,1,7>: Cost 1 ins RHS, lane 2 1034485762U, // <u,5,1,7>: Cost 1 ins RHS, lane 2
Show All 16 Lines
1880328706U, // <u,5,3,6>: Cost 2 vzipr LHS, <3,4,5,6> 1880328706U, // <u,5,3,6>: Cost 2 vzipr LHS, <3,4,5,6>
945007926U, // <u,5,3,7>: Cost 1 vtrnr LHS, RHS 945007926U, // <u,5,3,7>: Cost 1 vtrnr LHS, RHS
945007927U, // <u,5,3,u>: Cost 1 vtrnr LHS, RHS 945007927U, // <u,5,3,u>: Cost 1 vtrnr LHS, RHS
2108170242U, // <u,5,4,0>: Cost 2 ins <4,5,u,0>, lane 2 2108170242U, // <u,5,4,0>: Cost 2 ins <4,5,u,0>, lane 2
2108178434U, // <u,5,4,1>: Cost 2 ins <4,5,u,1>, lane 2 2108178434U, // <u,5,4,1>: Cost 2 ins <4,5,u,1>, lane 2
2108186626U, // <u,5,4,2>: Cost 2 ins <4,5,u,2>, lane 2 2108186626U, // <u,5,4,2>: Cost 2 ins <4,5,u,2>, lane 2
2086002689U, // <u,5,4,3>: Cost 2 ins <0,u,4,3>, lane 1 2086002689U, // <u,5,4,3>: Cost 2 ins <0,u,4,3>, lane 1
1845022662U, // <u,5,4,4>: Cost 2 vzipl <5,4,7,6>, <5,4,7,6> 1845022662U, // <u,5,4,4>: Cost 2 vzipl <5,4,7,6>, <5,4,7,6>
1549446454U, // <u,5,4,5>: Cost 2 vext2 <0,u,u,5>, RHS 1034493957U, // <u,5,4,5>: Cost 1 ins RHS, lane 5
1727917366U, // <u,5,4,6>: Cost 2 vuzpl <u,3,5,7>, RHS 1727917366U, // <u,5,4,6>: Cost 2 vuzpl <u,3,5,7>, RHS
1034485762U, // <u,5,4,7>: Cost 1 ins RHS, lane 2 1034485762U, // <u,5,4,7>: Cost 1 ins RHS, lane 2
1034485762U, // <u,5,4,u>: Cost 1 ins RHS, lane 2 1034493957U, // <u,5,4,u>: Cost 1 ins RHS, lane 5
1506000998U, // <u,5,5,0>: Cost 2 vext1 <4,u,5,5>, LHS 1506000998U, // <u,5,5,0>: Cost 2 vext1 <4,u,5,5>, LHS
1863536336U, // <u,5,5,1>: Cost 2 vzipl RHS, <5,1,7,3> 1863536336U, // <u,5,5,1>: Cost 2 vzipl RHS, <5,1,7,3>
2108186626U, // <u,5,5,2>: Cost 2 ins <4,5,u,2>, lane 2 2108186626U, // <u,5,5,2>: Cost 2 ins <4,5,u,2>, lane 2
2086076417U, // <u,5,5,3>: Cost 2 ins <0,u,5,3>, lane 1 2086076417U, // <u,5,5,3>: Cost 2 ins <0,u,5,3>, lane 1
1506004510U, // <u,5,5,4>: Cost 2 vext1 <4,u,5,5>, <4,u,5,5> 1506004510U, // <u,5,5,4>: Cost 2 vext1 <4,u,5,5>, <4,u,5,5>
229035318U, // <u,5,5,5>: Cost 1 vdup1 RHS 229035318U, // <u,5,5,5>: Cost 1 vdup1 RHS
1863536738U, // <u,5,5,6>: Cost 2 vzipl RHS, <5,6,7,0> 1863536738U, // <u,5,5,6>: Cost 2 vzipl RHS, <5,6,7,0>
1034485762U, // <u,5,5,7>: Cost 1 ins RHS, lane 2 1034485762U, // <u,5,5,7>: Cost 1 ins RHS, lane 2
1034485762U, // <u,5,5,u>: Cost 1 ins RHS, lane 2 1034485762U, // <u,5,5,u>: Cost 1 ins RHS, lane 2
1034346499U, // <u,5,6,0>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,6,0>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,6,1>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,6,1>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,6,2>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,6,2>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,6,3>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,6,3>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,6,4>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,6,4>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,6,5>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,6,5>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,6,6>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,6,6>: Cost 1 ins RHS, lane 3
27705344U, // <u,5,6,7>: Cost 0 copy RHS 27705344U, // <u,5,6,7>: Cost 0 copy RHS
27705344U, // <u,5,6,u>: Cost 0 copy RHS 27705344U, // <u,5,6,u>: Cost 0 copy RHS
1488101478U, // <u,5,7,0>: Cost 2 vext1 <1,u,5,7>, LHS 1488101478U, // <u,5,7,0>: Cost 2 vext1 <1,u,5,7>, LHS
1488102805U, // <u,5,7,1>: Cost 2 vext1 <1,u,5,7>, <1,u,5,7> 1488102805U, // <u,5,7,1>: Cost 2 vext1 <1,u,5,7>, <1,u,5,7>
2114134019U, // <u,5,7,2>: Cost 2 ins <5,5,7,u>, lane 3 2114134019U, // <u,5,7,2>: Cost 2 ins <5,5,7,u>, lane 3
2116083713U, // <u,5,7,3>: Cost 2 ins <5,u,7,3>, lane 1 2133999620U, // <u,5,7,3>: Cost 2 ins <u,u,7,3>, lane 4
1488104758U, // <u,5,7,4>: Cost 2 vext1 <1,u,5,7>, RHS 1488104758U, // <u,5,7,4>: Cost 2 vext1 <1,u,5,7>, RHS
1638330536U, // <u,5,7,5>: Cost 2 vext3 RHS, <5,7,5,7> 1638330536U, // <u,5,7,5>: Cost 2 vext3 RHS, <5,7,5,7>
1906903554U, // <u,5,7,6>: Cost 2 vzipr RHS, <3,4,5,6> 1906903554U, // <u,5,7,6>: Cost 2 vzipr RHS, <3,4,5,6>
969223478U, // <u,5,7,7>: Cost 1 vtrnr RHS, RHS 969223478U, // <u,5,7,7>: Cost 1 vtrnr RHS, RHS
969223479U, // <u,5,7,u>: Cost 1 vtrnr RHS, RHS 969223479U, // <u,5,7,u>: Cost 1 vtrnr RHS, RHS
1034346499U, // <u,5,u,0>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,u,0>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,u,1>: Cost 1 ins RHS, lane 3 1034493957U, // <u,5,u,1>: Cost 1 ins RHS, lane 5
1034346499U, // <u,5,u,2>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,u,2>: Cost 1 ins RHS, lane 3
1012113409U, // <u,5,u,3>: Cost 1 ins LHS, lane 1 1012113409U, // <u,5,u,3>: Cost 1 ins LHS, lane 1
1034346499U, // <u,5,u,4>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,u,4>: Cost 1 ins RHS, lane 3
1034346499U, // <u,5,u,5>: Cost 1 ins RHS, lane 3 1034493957U, // <u,5,u,5>: Cost 1 ins RHS, lane 5
1034346499U, // <u,5,u,6>: Cost 1 ins RHS, lane 3 1034346499U, // <u,5,u,6>: Cost 1 ins RHS, lane 3
27705344U, // <u,5,u,7>: Cost 0 copy RHS 27705344U, // <u,5,u,7>: Cost 0 copy RHS
27705344U, // <u,5,u,u>: Cost 0 copy RHS 27705344U, // <u,5,u,u>: Cost 0 copy RHS
1729314816U, // <u,6,0,0>: Cost 2 vuzpl RHS, <0,0,0,0> 1729314816U, // <u,6,0,0>: Cost 2 vuzpl RHS, <0,0,0,0>
1545470054U, // <u,6,0,1>: Cost 2 vext2 <0,2,u,6>, LHS 1545470054U, // <u,6,0,1>: Cost 2 vext2 <0,2,u,6>, LHS
655573094U, // <u,6,0,2>: Cost 1 vuzpl RHS, LHS 655573094U, // <u,6,0,2>: Cost 1 vuzpl RHS, LHS
2108309507U, // <u,6,0,3>: Cost 2 ins <4,6,0,u>, lane 3 2108309507U, // <u,6,0,3>: Cost 2 ins <4,6,0,u>, lane 3
1546797458U, // <u,6,0,4>: Cost 2 vext2 <0,4,u,6>, <0,4,u,6> 1546797458U, // <u,6,0,4>: Cost 2 vext2 <0,4,u,6>, <0,4,u,6>
▲ Show 20 Lines • Show All 273 Lines • Show Last 20 Lines

llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_2_2 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_2_2 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_2_3 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_2_3 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i8_2_05 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 9, i32 3, i32 4, i32 5, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i8_2_05 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 9, i32 3, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 90 for instruction: %v16i8_4_0 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 90 for instruction: %v16i8_4_0 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_4_1 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_4_1 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_4_2 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_4_2 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_4_3 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_4_3 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
; CHECK-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v16i8_4_05 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v16i8_4_05 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16_2_0 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_2_0 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16_2_1 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> <i32 4, i32 5, i32 0, i32 1> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_2_1 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
; CHECK-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v8i16_2_0 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v8i16_2_0 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_2_1 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_2_1 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_2_2 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_2_2 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_2_3 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_2_3 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i16_2_05 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 9, i32 3, i32 4, i32 5, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i16_2_05 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 9, i32 3, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %v16i16_4_0 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %v16i16_4_0 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_4_1 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_4_1 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_4_2 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_4_2 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_4_3 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_4_3 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
; CHECK-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v16i16_4_05 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v16i16_4_05 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_2_0 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_2_0 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_2_1 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> <i32 4, i32 5, i32 0, i32 1> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_2_1 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_2_0 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_2_0 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_2_1 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_2_1 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_2_2 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_2_2 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_2_3 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_2_3 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i32_2_05 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 8, i32 9, i32 3, i32 4, i32 5, i32 6, i32 7> ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i32_2_05 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> <i32 0, i32 8, i32 9, i32 3, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_0 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v16i32_4_0 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_4_1 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_4_1 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_4_2 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_4_2 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_4_3 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_4_3 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
▲ Show 20 Lines • Show All 89 Lines • Show Last 20 Lines

llvm/test/CodeGen/AArch64/arm64-dup.ll

Show First 20 Lines • Show All 398 Lines • ▼ Show 20 Linesentry:
ret <4 x i16> %sub ret <4 x i16> %sub
} }
; Also test the DUP path in the PerfectShuffle generator. ; Also test the DUP path in the PerfectShuffle generator.
define <4 x i16> @test_perfectshuffle_dupext_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind { define <4 x i16> @test_perfectshuffle_dupext_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind {
; CHECK-LABEL: test_perfectshuffle_dupext_v4i16: ; CHECK-LABEL: test_perfectshuffle_dupext_v4i16:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 ; CHECK-NEXT: trn1.4h v0, v0, v0
; CHECK-NEXT: dup.4h v0, v0[0] ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT: ext.8b v0, v0, v1, #4 ; CHECK-NEXT: mov.s v0[1], v1[0]
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%r = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5> %r = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5>
ret <4 x i16> %r ret <4 x i16> %r
} }
define <4 x half> @test_perfectshuffle_dupext_v4f16(<4 x half> %a, <4 x half> %b) nounwind { define <4 x half> @test_perfectshuffle_dupext_v4f16(<4 x half> %a, <4 x half> %b) nounwind {
; CHECK-LABEL: test_perfectshuffle_dupext_v4f16: ; CHECK-LABEL: test_perfectshuffle_dupext_v4f16:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 ; CHECK-NEXT: trn1.4h v0, v0, v0
; CHECK-NEXT: dup.4h v0, v0[0] ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT: ext.8b v0, v0, v1, #4 ; CHECK-NEXT: mov.s v0[1], v1[0]
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%r = shufflevector <4 x half> %a, <4 x half> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5> %r = shufflevector <4 x half> %a, <4 x half> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5>
ret <4 x half> %r ret <4 x half> %r
} }
define <4 x i32> @test_perfectshuffle_dupext_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { define <4 x i32> @test_perfectshuffle_dupext_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
; CHECK-LABEL: test_perfectshuffle_dupext_v4i32: ; CHECK-LABEL: test_perfectshuffle_dupext_v4i32:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: dup.4s v0, v0[0] ; CHECK-NEXT: trn1.4s v0, v0, v0
; CHECK-NEXT: ext.16b v0, v0, v1, #8 ; CHECK-NEXT: mov.d v0[1], v1[0]
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5> %r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5>
ret <4 x i32> %r ret <4 x i32> %r
} }
define <4 x float> @test_perfectshuffle_dupext_v4f32(<4 x float> %a, <4 x float> %b) nounwind { define <4 x float> @test_perfectshuffle_dupext_v4f32(<4 x float> %a, <4 x float> %b) nounwind {
; CHECK-LABEL: test_perfectshuffle_dupext_v4f32: ; CHECK-LABEL: test_perfectshuffle_dupext_v4f32:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: dup.4s v0, v0[0] ; CHECK-NEXT: trn1.4s v0, v0, v0
; CHECK-NEXT: ext.16b v0, v0, v1, #8 ; CHECK-NEXT: mov.d v0[1], v1[0]
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%r = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5> %r = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 4, i32 5>
ret <4 x float> %r ret <4 x float> %r
} }
define void @disguised_dup(<4 x float> %x, <4 x float>* %p1, <4 x float>* %p2) { define void @disguised_dup(<4 x float> %x, <4 x float>* %p1, <4 x float>* %p2) {
; CHECK-LABEL: disguised_dup: ; CHECK-LABEL: disguised_dup:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
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llvm/test/CodeGen/AArch64/reduce-shuffle.ll

Show All 30 Lines
; CHECK-NEXT: ld1 { v4.s }[1], [x12] ; CHECK-NEXT: ld1 { v4.s }[1], [x12]
; CHECK-NEXT: ld1 { v7.s }[1], [x2], #4 ; CHECK-NEXT: ld1 { v7.s }[1], [x2], #4
; CHECK-NEXT: usubl2 v1.4s, v1.8h, v5.8h ; CHECK-NEXT: usubl2 v1.4s, v1.8h, v5.8h
; CHECK-NEXT: ushll v5.8h, v7.8b, #0 ; CHECK-NEXT: ushll v5.8h, v7.8b, #0
; CHECK-NEXT: ushll v4.8h, v4.8b, #0 ; CHECK-NEXT: ushll v4.8h, v4.8b, #0
; CHECK-NEXT: ld1 { v6.s }[1], [x2] ; CHECK-NEXT: ld1 { v6.s }[1], [x2]
; CHECK-NEXT: ushll v0.8h, v0.8b, #0 ; CHECK-NEXT: ushll v0.8h, v0.8b, #0
; CHECK-NEXT: usubl v7.4s, v3.4h, v5.4h ; CHECK-NEXT: usubl v7.4s, v3.4h, v5.4h
; CHECK-NEXT: usubl2 v5.4s, v3.8h, v5.8h ; CHECK-NEXT: usubl2 v3.4s, v3.8h, v5.8h
; CHECK-NEXT: usubl2 v3.4s, v2.8h, v4.8h ; CHECK-NEXT: usubl2 v5.4s, v2.8h, v4.8h
; CHECK-NEXT: usubl v2.4s, v2.4h, v4.4h ; CHECK-NEXT: usubl v2.4s, v2.4h, v4.4h
; CHECK-NEXT: ushll v4.8h, v6.8b, #0 ; CHECK-NEXT: ushll v4.8h, v6.8b, #0
; CHECK-NEXT: shl v3.4s, v3.4s, #16 ; CHECK-NEXT: shl v5.4s, v5.4s, #16
; CHECK-NEXT: usubl2 v6.4s, v0.8h, v4.8h ; CHECK-NEXT: usubl2 v6.4s, v0.8h, v4.8h
; CHECK-NEXT: shl v2.4s, v2.4s, #16 ; CHECK-NEXT: shl v2.4s, v2.4s, #16
; CHECK-NEXT: usubl v0.4s, v0.4h, v4.4h ; CHECK-NEXT: usubl v0.4s, v0.4h, v4.4h
; CHECK-NEXT: add v1.4s, v5.4s, v1.4s
; CHECK-NEXT: shl v4.4s, v6.4s, #16
; CHECK-NEXT: shl v0.4s, v0.4s, #16
; CHECK-NEXT: add v2.4s, v2.4s, v16.4s ; CHECK-NEXT: add v2.4s, v2.4s, v16.4s
; CHECK-NEXT: shl v6.4s, v6.4s, #16 ; CHECK-NEXT: add v3.4s, v4.4s, v3.4s
; CHECK-NEXT: shl v4.4s, v0.4s, #16 ; CHECK-NEXT: add v0.4s, v0.4s, v7.4s
; CHECK-NEXT: add v19.4s, v6.4s, v5.4s ; CHECK-NEXT: uzp2 v6.4s, v2.4s, v1.4s
; CHECK-NEXT: add v6.4s, v4.4s, v7.4s ; CHECK-NEXT: ext v17.16b, v2.16b, v2.16b, #12
; CHECK-NEXT: add v17.4s, v3.4s, v1.4s ; CHECK-NEXT: zip1 v4.4s, v0.4s, v3.4s
; CHECK-NEXT: ext v18.16b, v2.16b, v2.16b, #12 ; CHECK-NEXT: mov v16.16b, v2.16b
; CHECK-NEXT: zip1 v7.4s, v6.4s, v19.4s ; CHECK-NEXT: mov v19.16b, v1.16b
; CHECK-NEXT: uzp2 v16.4s, v2.4s, v17.4s ; CHECK-NEXT: zip2 v5.4s, v1.4s, v2.4s
; CHECK-NEXT: mov v1.16b, v2.16b ; CHECK-NEXT: zip2 v18.4s, v2.4s, v1.4s
; CHECK-NEXT: mov v4.16b, v17.16b ; CHECK-NEXT: mov v16.s[0], v1.s[1]
; CHECK-NEXT: mov v20.16b, v6.16b ; CHECK-NEXT: uzp2 v6.4s, v6.4s, v2.4s
; CHECK-NEXT: zip2 v0.4s, v17.4s, v2.4s ; CHECK-NEXT: zip2 v7.4s, v0.4s, v3.4s
; CHECK-NEXT: zip2 v3.4s, v2.4s, v17.4s ; CHECK-NEXT: ext v1.16b, v1.16b, v17.16b, #12
; CHECK-NEXT: mov v1.s[0], v17.s[1] ; CHECK-NEXT: ext v17.16b, v0.16b, v4.16b, #8
; CHECK-NEXT: ext v5.16b, v17.16b, v18.16b, #12 ; CHECK-NEXT: mov v19.s[1], v2.s[0]
; CHECK-NEXT: zip2 v17.4s, v6.4s, v19.4s ; CHECK-NEXT: mov v0.s[3], v3.s[2]
; CHECK-NEXT: mov v4.s[1], v2.s[0] ; CHECK-NEXT: mov v6.d[1], v7.d[1]
; CHECK-NEXT: ext v18.16b, v6.16b, v7.16b, #8 ; CHECK-NEXT: mov v16.d[1], v4.d[1]
; CHECK-NEXT: mov v20.s[3], v19.s[2] ; CHECK-NEXT: mov v19.d[1], v17.d[1]
; CHECK-NEXT: uzp2 v6.4s, v16.4s, v2.4s ; CHECK-NEXT: mov v18.d[1], v0.d[1]
; CHECK-NEXT: mov v1.d[1], v7.d[1] ; CHECK-NEXT: mov v1.d[1], v7.d[1]
; CHECK-NEXT: mov v4.d[1], v18.d[1] ; CHECK-NEXT: mov v5.d[1], v0.d[1]
; CHECK-NEXT: mov v5.d[1], v17.d[1] ; CHECK-NEXT: add v0.4s, v16.4s, v19.4s
; CHECK-NEXT: mov v0.d[1], v20.d[1] ; CHECK-NEXT: add v4.4s, v6.4s, v18.4s
; CHECK-NEXT: mov v6.d[1], v17.d[1] ; CHECK-NEXT: rev64 v3.4s, v0.4s
; CHECK-NEXT: mov v3.d[1], v20.d[1] ; CHECK-NEXT: sub v1.4s, v5.4s, v1.4s
; CHECK-NEXT: add v2.4s, v1.4s, v4.4s ; CHECK-NEXT: rev64 v5.4s, v4.4s
; CHECK-NEXT: sub v1.4s, v4.4s, v1.4s ; CHECK-NEXT: sub v2.4s, v19.4s, v16.4s
; CHECK-NEXT: mov v3.d[1], v0.d[1]
; CHECK-NEXT: add v6.4s, v1.4s, v2.4s
; CHECK-NEXT: sub v1.4s, v2.4s, v1.4s
; CHECK-NEXT: mov v5.d[1], v4.d[1]
; CHECK-NEXT: rev64 v2.4s, v1.4s
; CHECK-NEXT: rev64 v7.4s, v6.4s
; CHECK-NEXT: add v3.4s, v4.4s, v3.4s
; CHECK-NEXT: sub v0.4s, v0.4s, v5.4s ; CHECK-NEXT: sub v0.4s, v0.4s, v5.4s
; CHECK-NEXT: add v4.4s, v1.4s, v2.4s
; CHECK-NEXT: add v16.4s, v6.4s, v7.4s
; CHECK-NEXT: sub v1.4s, v1.4s, v2.4s
; CHECK-NEXT: sub v2.4s, v6.4s, v7.4s
; CHECK-NEXT: rev64 v6.4s, v3.4s
; CHECK-NEXT: rev64 v17.4s, v0.4s
; CHECK-NEXT: ext v7.16b, v4.16b, v1.16b, #4
; CHECK-NEXT: ext v5.16b, v16.16b, v2.16b, #4
; CHECK-NEXT: add v18.4s, v3.4s, v6.4s
; CHECK-NEXT: add v19.4s, v0.4s, v17.4s
; CHECK-NEXT: sub v0.4s, v0.4s, v17.4s
; CHECK-NEXT: sub v3.4s, v3.4s, v6.4s
; CHECK-NEXT: rev64 v6.4s, v7.4s
; CHECK-NEXT: rev64 v7.4s, v18.4s
; CHECK-NEXT: ext v17.16b, v18.16b, v18.16b, #4
; CHECK-NEXT: ext v18.16b, v19.16b, v0.16b, #4
; CHECK-NEXT: rev64 v5.4s, v5.4s
; CHECK-NEXT: mov v16.s[3], v2.s[3]
; CHECK-NEXT: mov v4.s[3], v1.s[3]
; CHECK-NEXT: rev64 v18.4s, v18.4s
; CHECK-NEXT: mov v19.s[3], v0.s[3]
; CHECK-NEXT: ext v5.16b, v2.16b, v5.16b, #12
; CHECK-NEXT: ext v6.16b, v1.16b, v6.16b, #12
; CHECK-NEXT: trn2 v7.4s, v7.4s, v3.4s
; CHECK-NEXT: trn2 v3.4s, v3.4s, v17.4s
; CHECK-NEXT: ext v18.16b, v0.16b, v18.16b, #12
; CHECK-NEXT: sub v17.4s, v16.4s, v5.4s
; CHECK-NEXT: sub v20.4s, v4.4s, v6.4s
; CHECK-NEXT: ext v3.16b, v3.16b, v3.16b, #4
; CHECK-NEXT: mov v16.s[0], v2.s[0]
; CHECK-NEXT: sub v2.4s, v19.4s, v18.4s
; CHECK-NEXT: mov v4.s[0], v1.s[0]
; CHECK-NEXT: mov v19.s[0], v0.s[0]
; CHECK-NEXT: add v1.4s, v7.4s, v3.4s
; CHECK-NEXT: sub v0.4s, v7.4s, v3.4s
; CHECK-NEXT: add v3.4s, v4.4s, v6.4s
; CHECK-NEXT: add v4.4s, v16.4s, v5.4s
; CHECK-NEXT: add v5.4s, v19.4s, v18.4s
; CHECK-NEXT: mov v4.d[1], v17.d[1]
; CHECK-NEXT: mov v3.d[1], v20.d[1]
; CHECK-NEXT: mov v1.d[1], v0.d[1]
; CHECK-NEXT: mov v5.d[1], v2.d[1]
; CHECK-NEXT: movi v0.8h, #1
; CHECK-NEXT: movi v17.2d, #0x00ffff0000ffff
; CHECK-NEXT: ushr v2.4s, v1.4s, #15
; CHECK-NEXT: ushr v6.4s, v4.4s, #15
; CHECK-NEXT: ushr v7.4s, v5.4s, #15
; CHECK-NEXT: ushr v16.4s, v3.4s, #15
; CHECK-NEXT: and v6.16b, v6.16b, v0.16b
; CHECK-NEXT: and v16.16b, v16.16b, v0.16b
; CHECK-NEXT: and v7.16b, v7.16b, v0.16b
; CHECK-NEXT: and v0.16b, v2.16b, v0.16b
; CHECK-NEXT: mul v2.4s, v6.4s, v17.4s
; CHECK-NEXT: mul v6.4s, v16.4s, v17.4s
; CHECK-NEXT: mul v0.4s, v0.4s, v17.4s
; CHECK-NEXT: mul v7.4s, v7.4s, v17.4s
; CHECK-NEXT: add v4.4s, v2.4s, v4.4s
; CHECK-NEXT: add v3.4s, v6.4s, v3.4s ; CHECK-NEXT: add v3.4s, v6.4s, v3.4s
; CHECK-NEXT: sub v5.4s, v1.4s, v0.4s ; CHECK-NEXT: add v1.4s, v0.4s, v1.4s
; CHECK-NEXT: add v5.4s, v7.4s, v5.4s
; CHECK-NEXT: eor v0.16b, v1.16b, v0.16b
; CHECK-NEXT: eor v1.16b, v5.16b, v7.16b
; CHECK-NEXT: eor v3.16b, v3.16b, v6.16b
; CHECK-NEXT: eor v2.16b, v4.16b, v2.16b
; CHECK-NEXT: add v2.4s, v2.4s, v3.4s
; CHECK-NEXT: add v0.4s, v0.4s, v1.4s ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
; CHECK-NEXT: mov v16.16b, v2.16b
; CHECK-NEXT: mov v4.16b, v3.16b
; CHECK-NEXT: mov v16.s[0], v2.s[1]
; CHECK-NEXT: rev64 v1.4s, v5.4s
; CHECK-NEXT: rev64 v6.4s, v0.4s
; CHECK-NEXT: mov v4.s[0], v3.s[1]
; CHECK-NEXT: mov v16.s[1], v2.s[0]
; CHECK-NEXT: add v17.4s, v5.4s, v1.4s
; CHECK-NEXT: add v18.4s, v0.4s, v6.4s
; CHECK-NEXT: sub v1.4s, v5.4s, v1.4s
; CHECK-NEXT: sub v0.4s, v0.4s, v6.4s
; CHECK-NEXT: mov v4.s[1], v3.s[0]
; CHECK-NEXT: ext v5.16b, v18.16b, v0.16b, #4
; CHECK-NEXT: ext v6.16b, v17.16b, v1.16b, #4
; CHECK-NEXT: add v3.4s, v3.4s, v16.4s
; CHECK-NEXT: sub v2.4s, v2.4s, v4.4s
; CHECK-NEXT: rev64 v16.4s, v3.4s
; CHECK-NEXT: rev64 v4.4s, v5.4s
; CHECK-NEXT: rev64 v5.4s, v6.4s
; CHECK-NEXT: rev64 v6.4s, v2.4s
; CHECK-NEXT: add v19.4s, v3.4s, v16.4s
; CHECK-NEXT: sub v3.4s, v3.4s, v16.4s
; CHECK-NEXT: rev64 v16.4s, v19.4s
; CHECK-NEXT: add v20.4s, v2.4s, v6.4s
; CHECK-NEXT: sub v2.4s, v2.4s, v6.4s
; CHECK-NEXT: ext v6.16b, v19.16b, v19.16b, #4
; CHECK-NEXT: ext v19.16b, v20.16b, v2.16b, #4
; CHECK-NEXT: mov v17.s[3], v1.s[3]
; CHECK-NEXT: ext v5.16b, v1.16b, v5.16b, #12
; CHECK-NEXT: mov v18.s[3], v0.s[3]
; CHECK-NEXT: rev64 v19.4s, v19.4s
; CHECK-NEXT: ext v4.16b, v0.16b, v4.16b, #12
; CHECK-NEXT: mov v20.s[3], v2.s[3]
; CHECK-NEXT: sub v22.4s, v17.4s, v5.4s
; CHECK-NEXT: trn2 v16.4s, v16.4s, v3.4s
; CHECK-NEXT: trn2 v3.4s, v3.4s, v6.4s
; CHECK-NEXT: mov v17.s[0], v1.s[0]
; CHECK-NEXT: ext v1.16b, v2.16b, v19.16b, #12
; CHECK-NEXT: sub v21.4s, v18.4s, v4.4s
; CHECK-NEXT: mov v18.s[0], v0.s[0]
; CHECK-NEXT: ext v0.16b, v3.16b, v3.16b, #4
; CHECK-NEXT: add v3.4s, v17.4s, v5.4s
; CHECK-NEXT: sub v5.4s, v20.4s, v1.4s
; CHECK-NEXT: mov v20.s[0], v2.s[0]
; CHECK-NEXT: add v4.4s, v18.4s, v4.4s
; CHECK-NEXT: add v6.4s, v16.4s, v0.4s
; CHECK-NEXT: mov v4.d[1], v21.d[1]
; CHECK-NEXT: sub v0.4s, v16.4s, v0.4s
; CHECK-NEXT: add v1.4s, v20.4s, v1.4s
; CHECK-NEXT: movi v7.8h, #1
; CHECK-NEXT: mov v3.d[1], v22.d[1]
; CHECK-NEXT: mov v1.d[1], v5.d[1]
; CHECK-NEXT: mov v6.d[1], v0.d[1]
; CHECK-NEXT: ushr v2.4s, v4.4s, #15
; CHECK-NEXT: ushr v5.4s, v3.4s, #15
; CHECK-NEXT: and v0.16b, v2.16b, v7.16b
; CHECK-NEXT: ushr v17.4s, v1.4s, #15
; CHECK-NEXT: movi v2.2d, #0x00ffff0000ffff
; CHECK-NEXT: ushr v16.4s, v6.4s, #15
; CHECK-NEXT: and v5.16b, v5.16b, v7.16b
; CHECK-NEXT: and v17.16b, v17.16b, v7.16b
; CHECK-NEXT: and v7.16b, v16.16b, v7.16b
; CHECK-NEXT: mul v0.4s, v0.4s, v2.4s
; CHECK-NEXT: mul v5.4s, v5.4s, v2.4s
; CHECK-NEXT: mul v7.4s, v7.4s, v2.4s
; CHECK-NEXT: mul v2.4s, v17.4s, v2.4s
; CHECK-NEXT: add v4.4s, v0.4s, v4.4s
; CHECK-NEXT: add v3.4s, v5.4s, v3.4s
; CHECK-NEXT: add v6.4s, v7.4s, v6.4s
; CHECK-NEXT: add v1.4s, v2.4s, v1.4s
; CHECK-NEXT: eor v6.16b, v6.16b, v7.16b
; CHECK-NEXT: eor v1.16b, v1.16b, v2.16b
; CHECK-NEXT: eor v2.16b, v3.16b, v5.16b
; CHECK-NEXT: eor v0.16b, v4.16b, v0.16b
; CHECK-NEXT: add v0.4s, v0.4s, v2.4s ; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
; CHECK-NEXT: add v1.4s, v6.4s, v1.4s
; CHECK-NEXT: add v0.4s, v1.4s, v0.4s
; CHECK-NEXT: addv s0, v0.4s ; CHECK-NEXT: addv s0, v0.4s
; CHECK-NEXT: fmov w8, s0 ; CHECK-NEXT: fmov w8, s0
; CHECK-NEXT: lsr w9, w8, #16 ; CHECK-NEXT: lsr w9, w8, #16
; CHECK-NEXT: add w8, w9, w8, uxth ; CHECK-NEXT: add w8, w9, w8, uxth
; CHECK-NEXT: lsr w0, w8, #1 ; CHECK-NEXT: lsr w0, w8, #1
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%idx.ext = sext i32 %i1 to i64 %idx.ext = sext i32 %i1 to i64
▲ Show 20 Lines • Show All 131 Lines • ▼ Show 20 Lines
; CHECK-NEXT: usubl v0.4s, v0.4h, v4.4h ; CHECK-NEXT: usubl v0.4s, v0.4h, v4.4h
; CHECK-NEXT: add v1.4s, v5.4s, v1.4s ; CHECK-NEXT: add v1.4s, v5.4s, v1.4s
; CHECK-NEXT: shl v4.4s, v6.4s, #16 ; CHECK-NEXT: shl v4.4s, v6.4s, #16
; CHECK-NEXT: shl v0.4s, v0.4s, #16 ; CHECK-NEXT: shl v0.4s, v0.4s, #16
; CHECK-NEXT: add v2.4s, v2.4s, v16.4s ; CHECK-NEXT: add v2.4s, v2.4s, v16.4s
; CHECK-NEXT: add v3.4s, v4.4s, v3.4s ; CHECK-NEXT: add v3.4s, v4.4s, v3.4s
; CHECK-NEXT: add v0.4s, v0.4s, v7.4s ; CHECK-NEXT: add v0.4s, v0.4s, v7.4s
; CHECK-NEXT: uzp2 v6.4s, v2.4s, v1.4s ; CHECK-NEXT: uzp2 v6.4s, v2.4s, v1.4s
; CHECK-NEXT: zip1 v7.4s, v0.4s, v3.4s ; CHECK-NEXT: ext v17.16b, v2.16b, v2.16b, #12
; CHECK-NEXT: zip1 v4.4s, v0.4s, v3.4s
; CHECK-NEXT: mov v16.16b, v2.16b ; CHECK-NEXT: mov v16.16b, v2.16b
; CHECK-NEXT: mov v4.16b, v1.16b ; CHECK-NEXT: mov v19.16b, v0.16b
; CHECK-NEXT: zip2 v17.4s, v2.4s, v1.4s ; CHECK-NEXT: zip2 v5.4s, v1.4s, v2.4s
; CHECK-NEXT: zip2 v18.4s, v2.4s, v1.4s
; CHECK-NEXT: mov v16.s[0], v1.s[1] ; CHECK-NEXT: mov v16.s[0], v1.s[1]
; CHECK-NEXT: uzp2 v6.4s, v6.4s, v2.4s ; CHECK-NEXT: uzp2 v6.4s, v6.4s, v2.4s
; CHECK-NEXT: zip2 v18.4s, v0.4s, v3.4s ; CHECK-NEXT: ext v7.16b, v1.16b, v17.16b, #12
; CHECK-NEXT: mov v4.s[1], v2.s[0] ; CHECK-NEXT: zip2 v17.4s, v0.4s, v3.4s
; CHECK-NEXT: ext v19.16b, v0.16b, v7.16b, #8 ; CHECK-NEXT: ext v0.16b, v0.16b, v4.16b, #8
; CHECK-NEXT: mov v0.s[3], v3.s[2] ; CHECK-NEXT: mov v1.s[1], v2.s[0]
; CHECK-NEXT: zip2 v5.4s, v1.4s, v2.4s ; CHECK-NEXT: mov v19.s[3], v3.s[2]
; CHECK-NEXT: ext v2.16b, v2.16b, v2.16b, #12 ; CHECK-NEXT: mov v6.d[1], v17.d[1]
; CHECK-NEXT: mov v16.d[1], v7.d[1] ; CHECK-NEXT: mov v16.d[1], v4.d[1]
; CHECK-NEXT: mov v4.d[1], v19.d[1] ; CHECK-NEXT: mov v1.d[1], v0.d[1]
; CHECK-NEXT: mov v6.d[1], v18.d[1] ; CHECK-NEXT: mov v18.d[1], v19.d[1]
; CHECK-NEXT: mov v17.d[1], v0.d[1] ; CHECK-NEXT: mov v7.d[1], v17.d[1]
; CHECK-NEXT: ext v1.16b, v1.16b, v2.16b, #12 ; CHECK-NEXT: mov v5.d[1], v19.d[1]
; CHECK-NEXT: add v2.4s, v16.4s, v4.4s ; CHECK-NEXT: add v0.4s, v16.4s, v1.4s
; CHECK-NEXT: mov v5.d[1], v0.d[1] ; CHECK-NEXT: add v3.4s, v6.4s, v18.4s
; CHECK-NEXT: add v6.4s, v6.4s, v17.4s ; CHECK-NEXT: rev64 v2.4s, v0.4s
; CHECK-NEXT: mov v3.16b, v2.16b ; CHECK-NEXT: sub v4.4s, v5.4s, v7.4s
; CHECK-NEXT: mov v0.16b, v6.16b ; CHECK-NEXT: rev64 v5.4s, v3.4s
; CHECK-NEXT: mov v3.s[0], v2.s[1] ; CHECK-NEXT: sub v1.4s, v1.4s, v16.4s
; CHECK-NEXT: mov v0.s[0], v6.s[1] ; CHECK-NEXT: mov v2.d[1], v0.d[1]
; CHECK-NEXT: mov v1.d[1], v18.d[1] ; CHECK-NEXT: add v6.4s, v4.4s, v1.4s
; CHECK-NEXT: sub v4.4s, v4.4s, v16.4s ; CHECK-NEXT: mov v5.d[1], v3.d[1]
; CHECK-NEXT: mov v3.s[1], v2.s[0] ; CHECK-NEXT: sub v1.4s, v1.4s, v4.4s
; CHECK-NEXT: mov v0.s[1], v6.s[0] ; CHECK-NEXT: add v2.4s, v3.4s, v2.4s
; CHECK-NEXT: sub v1.4s, v5.4s, v1.4s ; CHECK-NEXT: sub v0.4s, v0.4s, v5.4s
; CHECK-NEXT: add v5.4s, v1.4s, v4.4s ; CHECK-NEXT: zip1 v4.4s, v2.4s, v6.4s
; CHECK-NEXT: add v3.4s, v6.4s, v3.4s ; CHECK-NEXT: uzp2 v5.4s, v2.4s, v6.4s
; CHECK-NEXT: sub v1.4s, v4.4s, v1.4s
; CHECK-NEXT: sub v0.4s, v2.4s, v0.4s
; CHECK-NEXT: zip1 v6.4s, v3.4s, v5.4s
; CHECK-NEXT: uzp2 v2.4s, v3.4s, v5.4s
; CHECK-NEXT: zip1 v7.4s, v0.4s, v1.4s ; CHECK-NEXT: zip1 v7.4s, v0.4s, v1.4s
; CHECK-NEXT: mov v16.16b, v3.16b ; CHECK-NEXT: mov v16.16b, v2.16b
; CHECK-NEXT: zip2 v4.4s, v3.4s, v5.4s ; CHECK-NEXT: zip2 v3.4s, v2.4s, v6.4s
; CHECK-NEXT: mov v16.s[1], v5.s[1] ; CHECK-NEXT: mov v16.s[1], v6.s[1]
; CHECK-NEXT: mov v5.16b, v0.16b ; CHECK-NEXT: mov v6.16b, v0.16b
; CHECK-NEXT: trn2 v6.4s, v3.4s, v6.4s ; CHECK-NEXT: trn2 v4.4s, v2.4s, v4.4s
; CHECK-NEXT: zip2 v17.4s, v0.4s, v1.4s ; CHECK-NEXT: zip2 v17.4s, v0.4s, v1.4s
; CHECK-NEXT: ext v0.16b, v0.16b, v7.16b, #8 ; CHECK-NEXT: ext v0.16b, v0.16b, v7.16b, #8
; CHECK-NEXT: uzp2 v2.4s, v2.4s, v3.4s ; CHECK-NEXT: uzp2 v2.4s, v5.4s, v2.4s
; CHECK-NEXT: mov v5.s[3], v1.s[2] ; CHECK-NEXT: mov v6.s[3], v1.s[2]
; CHECK-NEXT: mov v16.d[1], v7.d[1] ; CHECK-NEXT: mov v16.d[1], v7.d[1]
; CHECK-NEXT: mov v6.d[1], v0.d[1] ; CHECK-NEXT: mov v4.d[1], v0.d[1]
; CHECK-NEXT: mov v2.d[1], v17.d[1] ; CHECK-NEXT: mov v2.d[1], v17.d[1]
; CHECK-NEXT: mov v4.d[1], v5.d[1] ; CHECK-NEXT: mov v3.d[1], v6.d[1]
; CHECK-NEXT: movi v0.8h, #1 ; CHECK-NEXT: movi v0.8h, #1
; CHECK-NEXT: add v1.4s, v16.4s, v6.4s ; CHECK-NEXT: add v1.4s, v16.4s, v4.4s
; CHECK-NEXT: sub v3.4s, v6.4s, v16.4s ; CHECK-NEXT: sub v4.4s, v4.4s, v16.4s
; CHECK-NEXT: add v6.4s, v4.4s, v2.4s ; CHECK-NEXT: add v6.4s, v3.4s, v2.4s
; CHECK-NEXT: sub v2.4s, v2.4s, v4.4s ; CHECK-NEXT: sub v2.4s, v2.4s, v3.4s
; CHECK-NEXT: zip2 v4.4s, v3.4s, v1.4s
; CHECK-NEXT: zip2 v7.4s, v2.4s, v6.4s
; CHECK-NEXT: ext v5.16b, v1.16b, v1.16b, #4 ; CHECK-NEXT: ext v5.16b, v1.16b, v1.16b, #4
; CHECK-NEXT: zip2 v3.4s, v4.4s, v1.4s
; CHECK-NEXT: zip2 v7.4s, v2.4s, v6.4s
; CHECK-NEXT: ext v17.16b, v6.16b, v6.16b, #4 ; CHECK-NEXT: ext v17.16b, v6.16b, v6.16b, #4
; CHECK-NEXT: zip1 v16.4s, v1.4s, v3.4s ; CHECK-NEXT: zip1 v16.4s, v1.4s, v4.4s
; CHECK-NEXT: zip2 v1.4s, v1.4s, v3.4s ; CHECK-NEXT: zip2 v1.4s, v1.4s, v4.4s
; CHECK-NEXT: add v4.4s, v4.4s, v7.4s ; CHECK-NEXT: add v3.4s, v3.4s, v7.4s
; CHECK-NEXT: zip2 v7.4s, v6.4s, v2.4s ; CHECK-NEXT: zip2 v7.4s, v6.4s, v2.4s
; CHECK-NEXT: ext v3.16b, v5.16b, v3.16b, #8
; CHECK-NEXT: zip1 v6.4s, v6.4s, v2.4s ; CHECK-NEXT: zip1 v6.4s, v6.4s, v2.4s
; CHECK-NEXT: ext v4.16b, v5.16b, v4.16b, #8
; CHECK-NEXT: ext v2.16b, v17.16b, v2.16b, #8 ; CHECK-NEXT: ext v2.16b, v17.16b, v2.16b, #8
; CHECK-NEXT: sub v1.4s, v7.4s, v1.4s ; CHECK-NEXT: sub v1.4s, v7.4s, v1.4s
; CHECK-NEXT: movi v7.2d, #0x00ffff0000ffff ; CHECK-NEXT: sub v6.4s, v6.4s, v16.4s
; CHECK-NEXT: ext v3.16b, v3.16b, v5.16b, #4 ; CHECK-NEXT: ext v4.16b, v4.16b, v5.16b, #4
; CHECK-NEXT: ushr v5.4s, v4.4s, #15
; CHECK-NEXT: ext v2.16b, v2.16b, v17.16b, #4 ; CHECK-NEXT: ext v2.16b, v2.16b, v17.16b, #4
; CHECK-NEXT: movi v7.2d, #0x00ffff0000ffff
; CHECK-NEXT: ushr v5.4s, v3.4s, #15
; CHECK-NEXT: ushr v16.4s, v6.4s, #15
; CHECK-NEXT: ushr v17.4s, v1.4s, #15 ; CHECK-NEXT: ushr v17.4s, v1.4s, #15
; CHECK-NEXT: add v2.4s, v4.4s, v2.4s
; CHECK-NEXT: and v5.16b, v5.16b, v0.16b ; CHECK-NEXT: and v5.16b, v5.16b, v0.16b
; CHECK-NEXT: mul v5.4s, v5.4s, v7.4s
; CHECK-NEXT: sub v6.4s, v6.4s, v16.4s
; CHECK-NEXT: add v2.4s, v3.4s, v2.4s
; CHECK-NEXT: ushr v16.4s, v6.4s, #15
; CHECK-NEXT: add v3.4s, v5.4s, v4.4s
; CHECK-NEXT: ushr v4.4s, v2.4s, #15 ; CHECK-NEXT: ushr v4.4s, v2.4s, #15
; CHECK-NEXT: and v17.16b, v17.16b, v0.16b ; CHECK-NEXT: and v17.16b, v17.16b, v0.16b
; CHECK-NEXT: and v16.16b, v16.16b, v0.16b ; CHECK-NEXT: and v16.16b, v16.16b, v0.16b
; CHECK-NEXT: and v0.16b, v4.16b, v0.16b ; CHECK-NEXT: and v0.16b, v4.16b, v0.16b
; CHECK-NEXT: mul v5.4s, v5.4s, v7.4s
; CHECK-NEXT: mul v16.4s, v16.4s, v7.4s ; CHECK-NEXT: mul v16.4s, v16.4s, v7.4s
; CHECK-NEXT: mul v17.4s, v17.4s, v7.4s ; CHECK-NEXT: mul v17.4s, v17.4s, v7.4s
; CHECK-NEXT: mul v0.4s, v0.4s, v7.4s ; CHECK-NEXT: mul v0.4s, v0.4s, v7.4s
; CHECK-NEXT: eor v3.16b, v3.16b, v5.16b ; CHECK-NEXT: add v3.4s, v5.4s, v3.4s
; CHECK-NEXT: add v6.4s, v16.4s, v6.4s ; CHECK-NEXT: add v6.4s, v16.4s, v6.4s
; CHECK-NEXT: add v1.4s, v17.4s, v1.4s ; CHECK-NEXT: add v1.4s, v17.4s, v1.4s
; CHECK-NEXT: add v2.4s, v0.4s, v2.4s ; CHECK-NEXT: add v2.4s, v0.4s, v2.4s
; CHECK-NEXT: eor v4.16b, v6.16b, v16.16b ; CHECK-NEXT: eor v4.16b, v6.16b, v16.16b
; CHECK-NEXT: eor v1.16b, v1.16b, v17.16b ; CHECK-NEXT: eor v1.16b, v1.16b, v17.16b
; CHECK-NEXT: eor v3.16b, v3.16b, v5.16b
; CHECK-NEXT: eor v0.16b, v2.16b, v0.16b ; CHECK-NEXT: eor v0.16b, v2.16b, v0.16b
; CHECK-NEXT: add v1.4s, v3.4s, v1.4s ; CHECK-NEXT: add v1.4s, v3.4s, v1.4s
; CHECK-NEXT: add v0.4s, v0.4s, v4.4s ; CHECK-NEXT: add v0.4s, v0.4s, v4.4s
; CHECK-NEXT: add v0.4s, v0.4s, v1.4s ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
; CHECK-NEXT: addv s0, v0.4s ; CHECK-NEXT: addv s0, v0.4s
; CHECK-NEXT: fmov w8, s0 ; CHECK-NEXT: fmov w8, s0
; CHECK-NEXT: lsr w9, w8, #16 ; CHECK-NEXT: lsr w9, w8, #16
; CHECK-NEXT: add w8, w9, w8, uxth ; CHECK-NEXT: add w8, w9, w8, uxth
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llvm/test/CodeGen/AArch64/shuffle-tbl34.ll

Show First 20 Lines • Show All 511 Lines • ▼ Show 20 Lines; CHECK-NEXT: ret
%y = shufflevector <4 x i16> %c, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %y = shufflevector <4 x i16> %c, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%z = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6> %z = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6>
ret <8 x i16> %z ret <8 x i16> %z
} }
define <4 x i32> @shuffle3_v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) { define <4 x i32> @shuffle3_v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
; CHECK-LABEL: shuffle3_v4i32: ; CHECK-LABEL: shuffle3_v4i32:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s ; CHECK-NEXT: trn1 v1.4s, v0.4s, v1.4s
; CHECK-NEXT: mov v0.s[1], v1.s[0] ; CHECK-NEXT: mov v1.d[1], v0.d[0]
; CHECK-NEXT: mov v0.s[2], v2.s[0] ; CHECK-NEXT: mov v1.s[2], v2.s[0]
; CHECK-NEXT: mov v0.16b, v1.16b
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%x = shufflevector <4 x i32> %a, <4 x i32> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %x = shufflevector <4 x i32> %a, <4 x i32> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%y = shufflevector <4 x i32> %c, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %y = shufflevector <4 x i32> %c, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%z = shufflevector <8 x i32> %x, <8 x i32> %y, <4 x i32> <i32 0, i32 4, i32 8, i32 1> %z = shufflevector <8 x i32> %x, <8 x i32> %y, <4 x i32> <i32 0, i32 4, i32 8, i32 1>
ret <4 x i32> %z ret <4 x i32> %z
} }
; CHECK: .LCPI14_0: ; CHECK: .LCPI14_0:
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llvm/test/CodeGen/AArch64/shuffles.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s
define <16 x i32> @test_shuf1(<16 x i32> %x, <16 x i32> %y) { define <16 x i32> @test_shuf1(<16 x i32> %x, <16 x i32> %y) {
; CHECK-LABEL: test_shuf1: ; CHECK-LABEL: test_shuf1:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: dup v3.4s, v4.s[0] ; CHECK-NEXT: ext v16.16b, v6.16b, v1.16b, #4
; CHECK-NEXT: ext v5.16b, v6.16b, v1.16b, #4 ; CHECK-NEXT: dup v5.4s, v4.s[0]
; CHECK-NEXT: uzp1 v16.4s, v1.4s, v0.4s ; CHECK-NEXT: uzp1 v17.4s, v1.4s, v0.4s
; CHECK-NEXT: uzp2 v17.4s, v2.4s, v4.4s ; CHECK-NEXT: uzp2 v18.4s, v2.4s, v4.4s
; CHECK-NEXT: mov v3.s[0], v6.s[3] ; CHECK-NEXT: rev64 v3.4s, v7.4s
; CHECK-NEXT: trn2 v4.4s, v1.4s, v5.4s ; CHECK-NEXT: trn2 v4.4s, v1.4s, v16.4s
; CHECK-NEXT: trn2 v1.4s, v16.4s, v1.4s ; CHECK-NEXT: mov v5.s[0], v6.s[3]
; CHECK-NEXT: trn1 v2.4s, v17.4s, v2.4s ; CHECK-NEXT: trn2 v1.4s, v17.4s, v1.4s
; CHECK-NEXT: mov v3.s[2], v7.s[3] ; CHECK-NEXT: trn1 v2.4s, v18.4s, v2.4s
; CHECK-NEXT: mov v4.s[0], v7.s[1] ; CHECK-NEXT: mov v4.s[0], v7.s[1]
; CHECK-NEXT: mov v3.d[0], v5.d[0]
; CHECK-NEXT: ext v1.16b, v0.16b, v1.16b, #12 ; CHECK-NEXT: ext v1.16b, v0.16b, v1.16b, #12
; CHECK-NEXT: mov v2.s[3], v7.s[0] ; CHECK-NEXT: mov v2.s[3], v7.s[0]
; CHECK-NEXT: mov v3.s[3], v7.s[2]
; CHECK-NEXT: mov v0.16b, v4.16b ; CHECK-NEXT: mov v0.16b, v4.16b
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <16 x i32> <i32 29, i32 26, i32 7, i32 4, i32 3, i32 6, i32 5, i32 2, i32 9, i32 8, i32 17, i32 28, i32 27, i32 16, i32 31, i32 30> %s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <16 x i32> <i32 29, i32 26, i32 7, i32 4, i32 3, i32 6, i32 5, i32 2, i32 9, i32 8, i32 17, i32 28, i32 27, i32 16, i32 31, i32 30>
ret <16 x i32> %s3 ret <16 x i32> %s3
} }
define <4 x i32> @test_shuf2(<16 x i32> %x, <16 x i32> %y) { define <4 x i32> @test_shuf2(<16 x i32> %x, <16 x i32> %y) {
; CHECK-LABEL: test_shuf2: ; CHECK-LABEL: test_shuf2:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: zip2 v0.4s, v7.4s, v6.4s ; CHECK-NEXT: zip2 v2.4s, v7.4s, v6.4s
; CHECK-NEXT: trn2 v0.4s, v7.4s, v0.4s ; CHECK-NEXT: ext v0.16b, v1.16b, v1.16b, #4
; CHECK-NEXT: mov v0.s[2], v1.s[3] ; CHECK-NEXT: trn2 v1.4s, v7.4s, v2.4s
; CHECK-NEXT: mov v0.s[3], v1.s[0] ; CHECK-NEXT: mov v0.d[0], v1.d[0]
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <4 x i32> <i32 29, i32 26, i32 7, i32 4> %s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <4 x i32> <i32 29, i32 26, i32 7, i32 4>
ret <4 x i32> %s3 ret <4 x i32> %s3
} }
define <4 x i32> @test_shuf3(<16 x i32> %x, <16 x i32> %y) { define <4 x i32> @test_shuf3(<16 x i32> %x, <16 x i32> %y) {
; CHECK-LABEL: test_shuf3: ; CHECK-LABEL: test_shuf3:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
Show All 14 Lines
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <4 x i32> <i32 9, i32 8, i32 17, i32 28> %s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <4 x i32> <i32 9, i32 8, i32 17, i32 28>
ret <4 x i32> %s3 ret <4 x i32> %s3
} }
define <4 x i32> @test_shuf5(<16 x i32> %x, <16 x i32> %y) { define <4 x i32> @test_shuf5(<16 x i32> %x, <16 x i32> %y) {
; CHECK-LABEL: test_shuf5: ; CHECK-LABEL: test_shuf5:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: ext v0.16b, v6.16b, v4.16b, #12 ; CHECK-NEXT: rev64 v0.4s, v7.4s
; CHECK-NEXT: mov v0.s[2], v7.s[3] ; CHECK-NEXT: ext v1.16b, v6.16b, v4.16b, #12
; CHECK-NEXT: mov v0.s[3], v7.s[2] ; CHECK-NEXT: mov v0.d[0], v1.d[0]
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <4 x i32> <i32 27, i32 16, i32 31, i32 30> %s3 = shufflevector <16 x i32> %x, <16 x i32> %y, <4 x i32> <i32 27, i32 16, i32 31, i32 30>
ret <4 x i32> %s3 ret <4 x i32> %s3
} }
define <4 x i32> @test1503(<4 x i32> %a, <4 x i32> %b) define <4 x i32> @test1503(<4 x i32> %a, <4 x i32> %b)
; CHECK-LABEL: test1503: ; CHECK-LABEL: test1503:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
Show All 17 Lines
{ {
%r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 3, i32 6, i32 6> %r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 3, i32 6, i32 6>
ret <4 x i32> %r ret <4 x i32> %r
} }
define <4 x i32> @test7367(<4 x i32> %a, <4 x i32> %b) define <4 x i32> @test7367(<4 x i32> %a, <4 x i32> %b)
; CHECK-LABEL: test7367: ; CHECK-LABEL: test7367:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: mov v1.s[0], v1.s[3] ; CHECK-NEXT: mov v2.16b, v1.16b
; CHECK-NEXT: mov v1.s[1], v0.s[3] ; CHECK-NEXT: mov v2.d[0], v0.d[1]
; CHECK-NEXT: mov v0.16b, v1.16b ; CHECK-NEXT: mov v2.s[0], v1.s[3]
; CHECK-NEXT: mov v0.16b, v2.16b
; CHECK-NEXT: ret ; CHECK-NEXT: ret
{ {
%r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 3, i32 6, i32 7> %r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 3, i32 6, i32 7>
ret <4 x i32> %r ret <4 x i32> %r
} }
define <4 x i32> @test4045(<4 x i32> %a, <4 x i32> %b) define <4 x i32> @test4045(<4 x i32> %a, <4 x i32> %b)
; CHECK-LABEL: test4045: ; CHECK-LABEL: test4045:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: ext v2.16b, v0.16b, v1.16b, #4 ; CHECK-NEXT: trn1 v0.4s, v1.4s, v0.4s
; CHECK-NEXT: ext v0.16b, v2.16b, v0.16b, #4 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
; CHECK-NEXT: ext v0.16b, v0.16b, v1.16b, #8
; CHECK-NEXT: ret ; CHECK-NEXT: ret
{ {
%r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 4, i32 5> %r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 4, i32 5>
ret <4 x i32> %r ret <4 x i32> %r
} }
define <4 x i32> @test0067(<4 x i32> %a, <4 x i32> %b) define <4 x i32> @test0067(<4 x i32> %a, <4 x i32> %b)
; CHECK-LABEL: test0067: ; CHECK-LABEL: test0067:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: mov v1.s[0], v0.s[0] ; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s
; CHECK-NEXT: mov v1.s[1], v0.s[0] ; CHECK-NEXT: mov v0.d[1], v1.d[1]
; CHECK-NEXT: mov v0.16b, v1.16b
; CHECK-NEXT: ret ; CHECK-NEXT: ret
{ {
%r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 6, i32 7> %r = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 6, i32 7>
ret <4 x i32> %r ret <4 x i32> %r
} }

llvm/test/Transforms/VectorCombine/AArch64/vecreduce-shuffle.ll

Show First 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
; ;
%x = shufflevector <2 x i32> %a, <2 x i32> %b, <4 x i32> <i32 0, i32 2, i32 1, i32 3> %x = shufflevector <2 x i32> %a, <2 x i32> %b, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
%r = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %x) %r = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %x)
ret i32 %r ret i32 %r
} }
define i32 @reduceshuffle_twoin_lowelts_v4i32(<4 x i32> %a, <4 x i32> %b) { define i32 @reduceshuffle_twoin_lowelts_v4i32(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @reduceshuffle_twoin_lowelts_v4i32( ; CHECK-LABEL: @reduceshuffle_twoin_lowelts_v4i32(
; CHECK-NEXT: [[X:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> <i32 0, i32 5, i32 1, i32 4> ; CHECK-NEXT: [[X:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[X]]) ; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[X]])
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%x = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 4> %x = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 4>
%r = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %x) %r = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %x)
ret i32 %r ret i32 %r
} }
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%x = xor <4 x i32> %s, <i32 -1, i32 -1, i32 -1, i32 -1> %x = xor <4 x i32> %s, <i32 -1, i32 -1, i32 -1, i32 -1>
%r = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %x) %r = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %x)
call void @use(<4 x i32> %x) call void @use(<4 x i32> %x)
ret i32 %r ret i32 %r
} }
define i32 @reduceshuffle_twoin_splat_v4i32(<4 x i32> %a, <4 x i32> %b, i32 %c) { define i32 @reduceshuffle_twoin_splat_v4i32(<4 x i32> %a, <4 x i32> %b, i32 %c) {
; CHECK-LABEL: @reduceshuffle_twoin_splat_v4i32( ; CHECK-LABEL: @reduceshuffle_twoin_splat_v4i32(
; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> <i32 0, i32 5, i32 1, i32 4> ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x i32> poison, i32 [[C:%.*]], i32 0 ; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x i32> poison, i32 [[C:%.*]], i32 0
; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[INSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[INSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
; CHECK-NEXT: [[X:%.*]] = xor <4 x i32> [[S]], [[SPLAT]] ; CHECK-NEXT: [[X:%.*]] = xor <4 x i32> [[S]], [[SPLAT]]
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[X]]) ; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[X]])
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%s = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 4> %s = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 4>
%insert = insertelement <4 x i32> poison, i32 %c, i32 0 %insert = insertelement <4 x i32> poison, i32 %c, i32 0
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llvm/utils/PerfectShuffle/PerfectShuffle.cpp

Show First 20 Lines • Show All 320 Lines • ▼ Show 20 Lines#ifdef GENERATE_NEON_INS
if (ShufTab[NewElt].Cost + 1 < ShufTab[i].Cost) { if (ShufTab[NewElt].Cost + 1 < ShufTab[i].Cost) {
MadeChange = true; MadeChange = true;
ShufTab[i].Cost = ShufTab[NewElt].Cost + 1; ShufTab[i].Cost = ShufTab[NewElt].Cost + 1;
ShufTab[i].Op = &InsOp; ShufTab[i].Op = &InsOp;
ShufTab[i].Arg0 = NewElt; ShufTab[i].Arg0 = NewElt;
ShufTab[i].Arg1 = LaneIdx; ShufTab[i].Arg1 = LaneIdx;
} }
} }
// Similar idea for using a D register mov, masking out 2 lanes to undef
for (unsigned LaneIdx = 0; LaneIdx < 4; LaneIdx += 2) {
unsigned Ln0 = getMaskElt(i, LaneIdx);
unsigned Ln1 = getMaskElt(i, LaneIdx + 1);
if ((Ln0 == 0 && Ln1 == 1) || (Ln0 == 2 && Ln1 == 3) ||
(Ln0 == 4 && Ln1 == 5) || (Ln0 == 6 && Ln1 == 7)) {
unsigned NewElt = setMaskElt(i, LaneIdx, 8);
NewElt = setMaskElt(NewElt, LaneIdx + 1, 8);
if (ShufTab[NewElt].Cost + 1 < ShufTab[i].Cost) {
MadeChange = true;
ShufTab[i].Cost = ShufTab[NewElt].Cost + 1;
ShufTab[i].Op = &InsOp;
ShufTab[i].Arg0 = NewElt;
ShufTab[i].Arg1 = (LaneIdx >> 1) | 0x4;
}
}
}
} }
#endif #endif
} }
for (unsigned LHS = 0; LHS != 0x8889; ++LHS) { for (unsigned LHS = 0; LHS != 0x8889; ++LHS) {
if (!isValidMask(LHS)) continue; if (!isValidMask(LHS)) continue;
if (ShufTab[LHS].Cost > 1000) continue; if (ShufTab[LHS].Cost > 1000) continue;
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