[x86] Support 3 builtin functions for 32-bits targets

[xiangzhangllvm]

Summary

To meet customers' requirement of building their libs in 32 bits targets:
Support 3 builtin functions

_mm_cvtsi128_si64
_mm_cvtsi64_si128
_mm_extract_epi64

for 32-bits targets.

[LuoYuanke]

clang/lib/Headers/emmintrin.h

3287

Not sure why we enable the intrinsics only in x86_64 mode before.

[xiangzhangllvm]

clang/lib/Headers/emmintrin.h

3287

I see ICC only support them in 64 bits at first, then extend to 32bits too.

[craig.topper]

clang/include/clang/Basic/BuiltinsX86_64.def

45

Why not the vec_set function?

47

What about the 256-bit version?

clang/lib/Headers/emmintrin.h

3293

64 bits -> 64-bit mode

clang/test/CodeGen/X86/sse2-builtins.c

545

Do we need the X86 prefix because of the x86-64 #ifdefs? Or are there other differences?

If it's just the x86-64, can we add -check-prefixes=CHECK,X64 to the x86-64 run lines and use X64 for the x86-64 only functions. That way CHECK can be used for all the common tests.

[LuoYuanke]

clang/lib/Headers/emmintrin.h

3287

I think it is because we use 64 bit GPR.

[xiangzhangllvm]

clang/include/clang/Basic/BuiltinsX86_64.def

45

This patch is to quickly fix customers' lib building problems.
So for the other builtins not required by them this time, I didn't change.

I think there must be quite number of other similar builtins need to support in 32 bits mode. We need a long way to check them.

clang/test/CodeGen/X86/sse2-builtins.c

545

Before I change the test, it only build with "-triple=x86_64", So all the CHECK should be X64 prefix.
So I add X86 prefix to just let "RUN ... -triple=i386" only check the updated 3 builtins. (let the change be small).

[RKSimon]

clang/test/CodeGen/X86/sse2-builtins.c

545

I'd much prefer we have complete test check prefix coverage for every RUN - and tbh we should be properly testing 32-bit on every x86 intrinsic test file.

[xiangzhangllvm]

clang/test/CodeGen/X86/sse2-builtins.c

545

Yes, testing 32-bit on every x86 intrinsic test file is make sense. I also confuse why this test not testing the 32-bit mode before. I think it is "defect" for the test.
But how can I well update the test by on checking the 3 updated intrinsics. Because it is strange to update the other intrinsics checking when I only update 3 intrinsics in clang.

[xiangzhangllvm]

clang/test/CodeGen/X86/sse2-builtins.c

545

Hi @craig.topper , @RKSimon, if the 32 and 64 has common prefix "CHECK", it means the line 4 (32 bits) need to check all other intrinsics. That means I need to updated a lot check string for the 32 bit mode.
What's more, currently we have no tools to auto generate the checking code for clang test.

[LiuChen3]

clang/test/CodeGen/X86/sse2-builtins.c

545

Actually we have 'update_cc_test_checks.py', but little use.

[xiangzhangllvm]

clang/test/CodeGen/X86/sse2-builtins.c

545

I do "./llvm/utils/update_cc_test_checks.py clang/test/CodeGen/X86/sse41-builtins.c"
It generate nothing.

[RKSimon]

I'm updating the sse builtin test files to include i386 coverage - should be done in an hour or so

[RKSimon]

OK - SSE2/SSE41 now have i386 coverage - please can you rebase and update the checks to use CHECK/X64/X86 ?

[xiangzhangllvm]

In D124067#3461551, @RKSimon wrote:

OK - SSE2/SSE41 now have i386 coverage - please can you rebase and update the checks to use CHECK/X64/X86 ?

Hi @RKSimon, I very appreciate your help to update the test! You are very kind! In fact, I should do it before this patch. Thank you very much!

[xiangzhangllvm]

clang/test/CodeGen/X86/sse2-builtins.c

545–547

Sorry I need to update it to "CHECK", let me update.

[craig.topper]

clang/lib/Headers/emmintrin.h

3293

64 bits -> 64-bit

[xiangzhangllvm]

clang/lib/Headers/emmintrin.h

3293

Thank you!

[RKSimon]

LGTM with one minor typo

clang/lib/Headers/emmintrin.h

3293

64-bit (missing hypen)

[xiangzhangllvm]

clang/lib/Headers/emmintrin.h

3293

Let me directly add it when push.
And I see a test failed duo to clang-format. I'll commit a patch only do clang format for this 2 tests. (NFC)
Thank you !

[xiangzhangllvm]

close with clang format at
commit 6454ff35e0e7b0c0762c640031aa6c2b5d1f16ec
[Clang Format] emmintrin.h smmintrin.h (NFC)

clang/include/clang/Basic/BuiltinsX86.def

 TARGET_BUILTIN(__builtin_ia32_maxsd, "V2dV2dV2d", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_pmulhw128, "V8sV8sV8s", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_pavgb128, "V16cV16cV16c", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_pavgw128, "V8sV8sV8s", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_packsswb128, "V16cV8sV8s", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_packssdw128, "V8sV4iV4i", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_packuswb128, "V16cV8sV8s", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s", "ncV:128:", "sse2")
+TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_vec_ext_v4si, "iV4iIi", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_vec_ext_v4sf, "fV4fIi", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_vec_ext_v8hi, "sV8sIi", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_vec_set_v8hi, "V8sV8ssIi", "ncV:128:", "sse2")
 
 TARGET_BUILTIN(__builtin_ia32_addsubps, "V4fV4fV4f", "ncV:128:", "sse3")
 TARGET_BUILTIN(__builtin_ia32_addsubpd, "V2dV2dV2d", "ncV:128:", "sse3")
 TARGET_BUILTIN(__builtin_ia32_haddps, "V4fV4fV4f", "ncV:128:", "sse3")

clang/include/clang/Basic/BuiltinsX86_64.def

 
 TARGET_BUILTIN(__builtin_ia32_readeflags_u64, "UOi", "n", "")
 TARGET_BUILTIN(__builtin_ia32_writeeflags_u64, "vUOi", "n", "")
 TARGET_BUILTIN(__builtin_ia32_cvtss2si64, "OiV4f", "ncV:128:", "sse")
 TARGET_BUILTIN(__builtin_ia32_cvttss2si64, "OiV4f", "ncV:128:", "sse")
 TARGET_BUILTIN(__builtin_ia32_cvtsd2si64, "OiV2d", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_cvttsd2si64, "OiV2d", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_movnti64, "vOi*Oi", "n", "sse2")
-TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2")
 TARGET_BUILTIN(__builtin_ia32_vec_set_v2di, "V2OiV2OiOiIi", "ncV:128:", "sse4.1")
 TARGET_BUILTIN(__builtin_ia32_crc32di, "UOiUOiUOi", "nc", "crc32")
 TARGET_BUILTIN(__builtin_ia32_vec_ext_v4di, "OiV4OiIi", "ncV:256:", "avx")
 TARGET_BUILTIN(__builtin_ia32_vec_set_v4di, "V4OiV4OiOiIi", "ncV:256:", "avx")
 TARGET_BUILTIN(__builtin_ia32_rdfsbase32, "Ui", "n", "fsgsbase")
 TARGET_BUILTIN(__builtin_ia32_rdfsbase64, "UOi", "n", "fsgsbase")
 TARGET_BUILTIN(__builtin_ia32_rdgsbase32, "Ui", "n", "fsgsbase")
 TARGET_BUILTIN(__builtin_ia32_rdgsbase64, "UOi", "n", "fsgsbase")
 TARGET_BUILTIN(__builtin_ia32_wrfsbase32, "vUi", "n", "fsgsbase")
 TARGET_BUILTIN(__builtin_ia32_wrfsbase64, "vUOi", "n", "fsgsbase")
 TARGET_BUILTIN(__builtin_ia32_wrgsbase32, "vUi", "n", "fsgsbase")

clang/lib/Headers/emmintrin.h

 ///
 /// \param __a
 ///    A 32-bit signed integer operand.
 /// \returns A 128-bit vector of [4 x i32].
 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
   return __extension__(__m128i)(__v4si){__a, 0, 0, 0};
 }
 
-#ifdef __x86_64__
 /// Returns a vector of [2 x i64] where the lower element is the input
 ///    operand and the upper element is zero.
 ///
 /// \headerfile <x86intrin.h>
 ///
-/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
+/// in 64-bit mode.
 ///
 /// \param __a
 ///    A 64-bit signed integer operand containing the value to be converted.
 /// \returns A 128-bit vector of [2 x i64] containing the converted value.
 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {
   return __extension__(__m128i)(__v2di){__a, 0};
 }
-#endif
 
 /// Moves the least significant 32 bits of a vector of [4 x i32] to a
 ///    32-bit signed integer value.
 ///
 /// \headerfile <x86intrin.h>
 ///
 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
 ///
 /// \param __a
 ///    A vector of [4 x i32]. The least significant 32 bits are moved to the
 ///    destination.
 /// \returns A 32-bit signed integer containing the moved value.
 static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
   __v4si __b = (__v4si)__a;
   return __b[0];
 }
 
-#ifdef __x86_64__
 /// Moves the least significant 64 bits of a vector of [2 x i64] to a
 ///    64-bit signed integer value.
 ///
 /// \headerfile <x86intrin.h>
 ///
 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
 ///
 /// \param __a
 ///    A vector of [2 x i64]. The least significant 64 bits are moved to the
 ///    destination.
 /// \returns A 64-bit signed integer containing the moved value.
 static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) {
   return __a[0];
 }
-#endif
 
 /// Moves packed integer values from an aligned 128-bit memory location
 ///    to elements in a 128-bit integer vector.
 ///
 /// \headerfile <x86intrin.h>
 ///
 /// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.
 ///

clang/lib/Headers/smmintrin.h

 ///    01: Bits [63:32] of the parameter \a X are extracted. \n
 ///    10: Bits [95:64] of the parameter \a X are extracted. \n
 ///    11: Bits [127:96] of the parameter \a X are exracted.
 /// \returns  An integer, whose lower 32 bits are selected from the 128-bit
 ///    integer vector parameter and the remaining bits are assigned zeros.
 #define _mm_extract_epi32(X, N)                                                \
   ((int)__builtin_ia32_vec_ext_v4si((__v4si)(__m128i)(X), (int)(N)))
 
-#ifdef __x86_64__
 /// Extracts a 64-bit element from the 128-bit integer vector of
 ///    [2 x i64], using the immediate value parameter \a N as a selector.
 ///
 /// \headerfile <x86intrin.h>
 ///
 /// \code
 /// long long _mm_extract_epi64(__m128i X, const int N);
 /// \endcode
 ///
-/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction.
+/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction
+/// in 64-bit mode.
 ///
 /// \param X
 ///    A 128-bit integer vector.
 /// \param N
 ///    An immediate value. Bit [0] specifies which 64-bit vector element from
 ///    the argument \a X to return. \n
 ///    0: Bits [63:0] are returned. \n
 ///    1: Bits [127:64] are returned. \n
 /// \returns  A 64-bit integer.
 #define _mm_extract_epi64(X, N)                                                \
   ((long long)__builtin_ia32_vec_ext_v2di((__v2di)(__m128i)(X), (int)(N)))
-#endif /* __x86_64 */
 
 /* SSE4 128-bit Packed Integer Comparisons.  */
 /// Tests whether the specified bits in a 128-bit integer vector are all
 ///    zeros.
 ///
 /// \headerfile <x86intrin.h>
 ///
 /// This intrinsic corresponds to the <c> VPTEST / PTEST </c> instruction.

clang/test/CodeGen/X86/sse2-builtins.c

 }
 
 int test_mm_cvtsi128_si32(__m128i A) {
   // CHECK-LABEL: test_mm_cvtsi128_si32
   // CHECK: extractelement <4 x i32> %{{.*}}, i32 0
   return _mm_cvtsi128_si32(A);
 }
 
-#ifdef __x86_64__
 long long test_mm_cvtsi128_si64(__m128i A) {
-  // X64-LABEL: test_mm_cvtsi128_si64
-  // X64: extractelement <2 x i64> %{{.*}}, i32 0
+  // CHECK-LABEL: test_mm_cvtsi128_si64
+  // CHECK: extractelement <2 x i64> %{{.*}}, i32 0
   return _mm_cvtsi128_si64(A);
 }
-#endif
 
 __m128d test_mm_cvtsi32_sd(__m128d A, int B) {
   // CHECK-LABEL: test_mm_cvtsi32_sd
   // CHECK: sitofp i32 %{{.*}} to double
   // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
   return _mm_cvtsi32_sd(A, B);
 }
 
 __m128i test_mm_cvtsi32_si128(int A) {
   // CHECK-LABEL: test_mm_cvtsi32_si128
   // CHECK: insertelement <4 x i32> undef, i32 %{{.*}}, i32 0
   // CHECK: insertelement <4 x i32> %{{.*}}, i32 0, i32 1
   // CHECK: insertelement <4 x i32> %{{.*}}, i32 0, i32 2
   // CHECK: insertelement <4 x i32> %{{.*}}, i32 0, i32 3
   return _mm_cvtsi32_si128(A);
 }
 
 #ifdef __x86_64__
 __m128d test_mm_cvtsi64_sd(__m128d A, long long B) {
   // X64-LABEL: test_mm_cvtsi64_sd
   // X64: sitofp i64 %{{.*}} to double
   // X64: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
   return _mm_cvtsi64_sd(A, B);
 }
+#endif
 
 __m128i test_mm_cvtsi64_si128(long long A) {
-  // X64-LABEL: test_mm_cvtsi64_si128
-  // X64: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
-  // X64: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+  // CHECK-LABEL: test_mm_cvtsi64_si128
+  // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+  // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
   return _mm_cvtsi64_si128(A);
 }
-#endif
 
 __m128d test_mm_cvtss_sd(__m128d A, __m128 B) {
   // CHECK-LABEL: test_mm_cvtss_sd
   // CHECK: extractelement <4 x float> %{{.*}}, i32 0
   // CHECK: fpext float %{{.*}} to double
   // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
   return _mm_cvtss_sd(A, B);
 }

clang/test/CodeGen/X86/sse41-builtins.c

 }
 
 int test_mm_extract_epi32(__m128i x) {
   // CHECK-LABEL: test_mm_extract_epi32
   // CHECK: extractelement <4 x i32> %{{.*}}, {{i32|i64}} 1
   return _mm_extract_epi32(x, 1);
 }
 
-#ifdef __x86_64__
 long long test_mm_extract_epi64(__m128i x) {
-  // X64-LABEL: test_mm_extract_epi64
-  // X64: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1
+  // CHECK-LABEL: test_mm_extract_epi64
+  // CHECK: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1
   return _mm_extract_epi64(x, 1);
 }
-#endif
 
 int test_mm_extract_ps(__m128 x) {
   // CHECK-LABEL: test_mm_extract_ps
   // CHECK: extractelement <4 x float> %{{.*}}, {{i32|i64}} 1
   return _mm_extract_ps(x, 1);
 }
 
 __m128d test_mm_floor_pd(__m128d x) {