[VP] Add vp.fcmp comparison intrinsic and docs

[frasercrmck]

Summary

This patch adds the first support for vector-predicated comparison
intrinsics, starting with vp.fcmp. It uses metadata to encode its
condition code, like the llvm.experimental.constrained.fcmp intrinsic.

[craig.topper]

Need a Verifier.cpp check on the validity of the metadata

Equivalent for constrained intrinsics

case Intrinsic::experimental_constrained_fcmp:                                 
case Intrinsic::experimental_constrained_fcmps: {                              
  auto Pred = cast<ConstrainedFPCmpIntrinsic>(&FPI)->getPredicate();           
  Assert(CmpInst::isFPPredicate(Pred),                                         
         "invalid predicate for constrained FP comparison intrinsic", &FPI);   
  break;                                                                       
}

llvm/docs/LangRef.rst

20153

Should only be a vector of boolean right?

[frasercrmck]

fix langref doc on return value
add VPCmpIntrinsic and verification of predicate
add testing for predicate verification

[frasercrmck]

In D121292#3371029, @craig.topper wrote:

Need a Verifier.cpp check on the validity of the metadata

Equivalent for constrained intrinsics

case Intrinsic::experimental_constrained_fcmp:                                 
case Intrinsic::experimental_constrained_fcmps: {                              
  auto Pred = cast<ConstrainedFPCmpIntrinsic>(&FPI)->getPredicate();           
  Assert(CmpInst::isFPPredicate(Pred),                                         
         "invalid predicate for constrained FP comparison intrinsic", &FPI);   
  break;                                                                       
}

Ah yes, I got thrown off because there's surprisingly no testing for that so I missed it. I've added that now.

I wasn't 100% on whether we want both VPIntCmp and VPFPCmp classes so I went with a general VPCmp base class, for now at least. It can fetch the CmpInst::Predicate, the idea being that the integer vp.icmp can use that too. I went for a simple opcode check for classof (rather than a VP_PROPERTY_CMP since I felt getPredicate would have to check the opcode anyway. Unless we use VP_PROPERTY_FCMP and VP_PROPERTY_ICMP but that seems overly verbose to me. I don't know what you think about that, @simoll.

llvm/docs/LangRef.rst

20153

yep, totally. bad copy/paste from the constrained.fcmp docs. thanks!

[simoll]

In D121292#3372302, @frasercrmck wrote:

In D121292#3371029, @craig.topper wrote:

Need a Verifier.cpp check on the validity of the metadata

Equivalent for constrained intrinsics

case Intrinsic::experimental_constrained_fcmp:                                 
case Intrinsic::experimental_constrained_fcmps: {                              
  auto Pred = cast<ConstrainedFPCmpIntrinsic>(&FPI)->getPredicate();           
  Assert(CmpInst::isFPPredicate(Pred),                                         
         "invalid predicate for constrained FP comparison intrinsic", &FPI);   
  break;                                                                       
}

Ah yes, I got thrown off because there's surprisingly no testing for that so I missed it. I've added that now.

I wasn't 100% on whether we want both VPIntCmp and VPFPCmp classes so I went with a general VPCmp base class, for now at least. It can fetch the CmpInst::Predicate, the idea being that the integer vp.icmp can use that too. I went for a simple opcode check for classof (rather than a VP_PROPERTY_CMP since I felt getPredicate would have to check the opcode anyway. Unless we use VP_PROPERTY_FCMP and VP_PROPERTY_ICMP but that seems overly verbose to me. I don't know what you think about that, @simoll.

I agree, it's verbose and there is no other comparison operators in sight.. but having macros in VPIntrinsics.def is the canonical form, so i am still in favor of going the VP_PROPERTY_CMP route.
+1 for VPCmp. If needed that can be specialized later.

[frasercrmck]

add VP_PROPERTY_CMP

[frasercrmck]

In D121292#3375539, @simoll wrote:

I agree, it's verbose and there is no other comparison operators in sight.. but having macros in VPIntrinsics.def is the canonical form, so i am still in favor of going the VP_PROPERTY_CMP route.
+1 for VPCmp. If needed that can be specialized later.

Fair enough, that makes sense. I've added VP_PROPERTY_CMP and am using it for the CC operand position and true/false about whether it takes FP condition codes. Just so we're not partially relying on a property and partially on explicit opcode checks when integer comparisons come around.

[frasercrmck]

add attributes: speculatable,nomem,willreturn, etc

[simoll]

VP intrinsics aren't speculatable because they have undefined behavior if %evl > static vector length

[frasercrmck]

In D121292#3382023, @simoll wrote:

VP intrinsics aren't speculatable because they have undefined behavior if %evl > static vector length

Hmm, this sort of goes against what was said in 9b99927618d338a2be3f13053ccf869a39eb1637.

[simoll]

In D121292#3382065, @frasercrmck wrote:

In D121292#3382023, @simoll wrote:

VP intrinsics aren't speculatable because they have undefined behavior if %evl > static vector length

Hmm, this sort of goes against what was said in 9b99927618d338a2be3f13053ccf869a39eb1637.

Right. That patch is wrong then. What we really need is something that tells us whether the replacement for the VP intrinsic is speculatable (not the VP intrinsic itself).
Something like isSafeToSpeculativelyExecute with just the opcode and the operands.

[frasercrmck]

In D121292#3385541, @simoll wrote:

What we really need is something that tells us whether the replacement for the VP intrinsic is speculatable (not the VP intrinsic itself).
Something like isSafeToSpeculativelyExecute with just the opcode and the operands.

Yeah, that makes sense. That needs to be a separate patch, however, so at the very least I should not be adding "speculatable" to these new intrinsics. This only really comes up as a problem in D121594.

[frasercrmck]

• rebase and drop Speculatable attribute

[simoll]

llvm/include/llvm/IR/Intrinsics.td

1552

Does DefaultAttrsIntrinsic imply speculatable ?

[frasercrmck]

llvm/include/llvm/IR/Intrinsics.td

1552

No, shouldn't do, anyway. It just adds those attributes marked as being applied by default, which is done through IsDefault in IntrinsicProperty:, e.g.,

class IntrinsicProperty<bit is_default = false> {
  bit IsDefault = is_default;
}

// Applied by default.
def IntrWillReturn : IntrinsicProperty<1>;

// This property indicates that the intrinsic is safe to speculate.
def IntrSpeculatable : IntrinsicProperty;

This does mean that IntrNoSync and IntrWillReturn are redundant, but since all other VP intrinsics (and even others like masked_load) explicitly list them, I thought I'd keep things consistent until we decide to clean things up.

[craig.topper]

LGTM

[frasercrmck]

• rebase and fix HandleToConstrainedFP unit test

[frasercrmck]

fix a grammar issue and the mangling used in a test

llvm/docs/LangRef.rst

.. code-block:: llvm
 
       %r = call <4 x float> @llvm.vp.sitofp.v4f32.v4i32(<4 x i32> %a, <4 x i1> %mask, i32 %evl)
       ;; For all lanes below %evl, %r is lane-wise equivalent to %also.r
 
       %t = sitofp <4 x i32> %a to <4 x float>
       %also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> undef
 
 
+.. _int_vp_fcmp:
+
+'``llvm.vp.fcmp.*``' Intrinsics
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+This is an overloaded intrinsic.
+
+::
+
+      declare <16 x i1> @llvm.vp.fcmp.v16f32(<16 x float> <left_op>, <16 x float> <right_op>, metadata <condition code>, <16 x i1> <mask>, i32 <vector_length>)
+      declare <vscale x 4 x i1> @llvm.vp.fcmp.nxv4f32(<vscale x 4 x float> <left_op>, <vscale x 4 x float> <right_op>, metadata <condition code>, <vscale x 4 x i1> <mask>, i32 <vector_length>)
+      declare <256 x i1> @llvm.vp.fcmp.v256f64(<256 x double> <left_op>, <256 x double> <right_op>, metadata <condition code>, <256 x i1> <mask>, i32 <vector_length>)
+
+Overview:
+"""""""""
+
+The '``llvm.vp.fcmp``' intrinsic returns a vector of boolean values based on
+the comparison of its operands. The operation has a mask and an explicit vector
+length parameter.
+
+
+Arguments:
+""""""""""
+
+The '``llvm.vp.fcmp``' intrinsic takes the two values to compare as its first
+and second operands. These two values must be vectors of :ref:`floating-point
+<t_floating>` types.
+The return type is the result of the comparison. The return type must be vector
+of :ref:`i1 <t_integer>` type. The fourth operand is the vector mask. The
+return type, the values to compare, and the vector mask have the same number of
+elements. The third operand is the condition code indicating the kind of
+comparison to perform. It must be a metadata string with :ref:`one of the
+supported floating-point condition code values <fcmp_md_cc>`. The fifth operand
+is the explicit vector length of the operation.
+
+Semantics:
+""""""""""
+
+The '``llvm.vp.fcmp``' compares its first two operands according to the
+condition code given as the third operand. The operands are compared element by
+element on each enabled lane, where the the semantics of the comparison are
+defined :ref:`according to the condition code <fcmp_md_cc_sem>`. Masked-off
+lanes are undefined.
+
+Examples:
+"""""""""
+
+.. code-block:: llvm
+
+      %r = call <4 x i1> @llvm.vp.fcmp.v4f32(<4 x float> %a, <4 x float> %b, metadata !"oeq", <4 x i1> %mask, i32 %evl)
+      ;; For all lanes below %evl, %r is lane-wise equivalent to %also.r
+
+      %t = fcmp oeq <4 x float> %a, %b
+      %also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> undef
+
+
 .. _int_mload_mstore:
 
 Masked Vector Load and Store Intrinsics
 ---------------------------------------
 
 LLVM provides intrinsics for predicated vector load and store operations. The predicate is specified by a mask operand, which holds one bit per vector element, switching the associated vector lane on or off. The memory addresses corresponding to the "off" lanes are not accessed. When all bits of the mask are on, the intrinsic is identical to a regular vector load or store. When all bits are off, no memory is accessed.
 
 .. _int_mload:

 The first two arguments to the '``llvm.experimental.constrained.fcmp``'
 and '``llvm.experimental.constrained.fcmps``' intrinsics must be
 :ref:`floating-point <t_floating>` or :ref:`vector <t_vector>`
 of floating-point values. Both arguments must have identical types.
 
 The third argument is the condition code indicating the kind of comparison
 to perform. It must be a metadata string with one of the following values:
 
+.. _fcmp_md_cc:
+
 - "``oeq``": ordered and equal
 - "``ogt``": ordered and greater than
 - "``oge``": ordered and greater than or equal
 - "``olt``": ordered and less than
 - "``ole``": ordered and less than or equal
 - "``one``": ordered and not equal
 - "``ord``": ordered (no nans)
 - "``ueq``": unordered or equal

 Semantics:
 """"""""""
 
 ``op1`` and ``op2`` are compared according to the condition code given
 as the third argument. If the operands are vectors, then the
 vectors are compared element by element. Each comparison performed
 always yields an :ref:`i1 <t_integer>` result, as follows:
 
+.. _fcmp_md_cc_sem:
+
 - "``oeq``": yields ``true`` if both operands are not a NAN and ``op1``
   is equal to ``op2``.
 - "``ogt``": yields ``true`` if both operands are not a NAN and ``op1``
   is greater than ``op2``.
 - "``oge``": yields ``true`` if both operands are not a NAN and ``op1``
   is greater than or equal to ``op2``.
 - "``olt``": yields ``true`` if both operands are not a NAN and ``op1``
   is less than ``op2``.

llvm/include/llvm/IR/IntrinsicInst.h

static bool classof(const IntrinsicInst *I) {
     return VPCastIntrinsic::isVPCast(I->getIntrinsicID());
   }
   static bool classof(const Value *V) {
     return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
   }
   /// @}
 };
 
+class VPCmpIntrinsic : public VPIntrinsic {
+public:
+  static bool isVPCmp(Intrinsic::ID ID);
+
+  CmpInst::Predicate getPredicate() const;
+
+  /// Methods for support type inquiry through isa, cast, and dyn_cast:
+  /// @{
+  static bool classof(const IntrinsicInst *I) {
+    return VPCmpIntrinsic::isVPCmp(I->getIntrinsicID());
+  }
+  static bool classof(const Value *V) {
+    return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
+  }
+  /// @}
+};
+
 /// This is the common base class for constrained floating point intrinsics.
 class ConstrainedFPIntrinsic : public IntrinsicInst {
 public:
   bool isUnaryOp() const;
   bool isTernaryOp() const;
   Optional<RoundingMode> getRoundingMode() const;
   Optional<fp::ExceptionBehavior> getExceptionBehavior() const;
   bool isDefaultFPEnvironment() const;

llvm/include/llvm/IR/Intrinsics.td

def int_vp_select : DefaultAttrsIntrinsic<[ llvm_anyvector_ty ],
                                 llvm_i32_ty]>;
 
 def int_vp_merge : DefaultAttrsIntrinsic<[ llvm_anyvector_ty ],
                               [ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
                                 LLVMMatchType<0>,
                                 LLVMMatchType<0>,
                                 llvm_i32_ty]>;
 
+// Comparisons.
+def int_vp_fcmp : DefaultAttrsIntrinsic<[ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty> ],
+                              [ llvm_anyvector_ty,
+                                LLVMMatchType<0>,
+                                llvm_metadata_ty,
+                                LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
+                                llvm_i32_ty]>;
+
 // Reductions
 let IntrProperties = [IntrSpeculatable, IntrNoMem, IntrNoSync, IntrWillReturn] in {
   def int_vp_reduce_fadd : DefaultAttrsIntrinsic<[LLVMVectorElementType<0>],
                                     [LLVMVectorElementType<0>,
                                      llvm_anyvector_ty,
                                      LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
                                      llvm_i32_ty]>;
   def int_vp_reduce_fmul : DefaultAttrsIntrinsic<[LLVMVectorElementType<0>],

llvm/include/llvm/IR/VPIntrinsics.def

 #define VP_PROPERTY_BINARYOP
 #endif
 
 // A property to infer VP type casts automatically.
 #ifndef VP_PROPERTY_CASTOP
 #define VP_PROPERTY_CASTOP
 #endif
 
+// This VP Intrinsic is a comparison operation
+// The condition code arg is at CCPOS and accepts floating-point condition
+// codes if ISFP is set, else it accepts integer condition codes.
+#ifndef VP_PROPERTY_CMP
+#define VP_PROPERTY_CMP(CCPOS, ISFP)
+#endif
+
 /// } Property Macros
 
 ///// Integer Arithmetic {
 
 // Specialized helper macro for integer binary operators (%x, %y, %mask, %evl).
 #ifdef HELPER_REGISTER_BINARY_INT_VP
 #error                                                                         \
     "The internal helper macro HELPER_REGISTER_BINARY_INT_VP is already defined!"

 
 // llvm.vp.sitofp(x,mask,vlen)
 HELPER_REGISTER_CAST_VP(sitofp, VP_SITOFP, SIToFP, 1)
 
 #undef HELPER_REGISTER_CAST_VP
 
 ///// } Type Casts
 
+///// Comparisons {
+// llvm.vp.fcmp(x,y,cc,mask,vlen)
+BEGIN_REGISTER_VP(vp_fcmp, 3, 4, VP_FCMP, -1)
+VP_PROPERTY_FUNCTIONAL_OPC(FCmp)
+VP_PROPERTY_CMP(2, true)
+VP_PROPERTY_CONSTRAINEDFP(0, 1, experimental_constrained_fcmp)
+END_REGISTER_VP(vp_fcmp, VP_FCMP)
+
+///// } Comparisons
+
 ///// Memory Operations {
 // llvm.vp.store(val,ptr,mask,vlen)
 BEGIN_REGISTER_VP_INTRINSIC(vp_store, 2, 3)
 // chain = VP_STORE chain,val,base,offset,mask,evl
 BEGIN_REGISTER_VP_SDNODE(VP_STORE, 0, vp_store, 4, 5)
 VP_PROPERTY_FUNCTIONAL_OPC(Store)
 VP_PROPERTY_FUNCTIONAL_INTRINSIC(masked_store)
 VP_PROPERTY_MEMOP(1, 0)

 #undef BEGIN_REGISTER_VP
 #undef BEGIN_REGISTER_VP_INTRINSIC
 #undef BEGIN_REGISTER_VP_SDNODE
 #undef END_REGISTER_VP
 #undef END_REGISTER_VP_INTRINSIC
 #undef END_REGISTER_VP_SDNODE
 #undef VP_PROPERTY_BINARYOP
 #undef VP_PROPERTY_CASTOP
+#undef VP_PROPERTY_CMP
 #undef VP_PROPERTY_CONSTRAINEDFP
 #undef VP_PROPERTY_FUNCTIONAL_INTRINSIC
 #undef VP_PROPERTY_FUNCTIONAL_OPC
 #undef VP_PROPERTY_MEMOP
 #undef VP_PROPERTY_REDUCTION

llvm/lib/IR/IntrinsicInst.cpp

bool ConstrainedFPIntrinsic::isDefaultFPEnvironment() const {
   if (Rounding) {
     if (Rounding.getValue() != RoundingMode::NearestTiesToEven)
       return false;
   }
 
   return true;
 }
 
-FCmpInst::Predicate ConstrainedFPCmpIntrinsic::getPredicate() const {
-  Metadata *MD = cast<MetadataAsValue>(getArgOperand(2))->getMetadata();
+static FCmpInst::Predicate getFPPredicateFromMD(const Value *Op) {
+  Metadata *MD = cast<MetadataAsValue>(Op)->getMetadata();
   if (!MD || !isa<MDString>(MD))
     return FCmpInst::BAD_FCMP_PREDICATE;
   return StringSwitch<FCmpInst::Predicate>(cast<MDString>(MD)->getString())
       .Case("oeq", FCmpInst::FCMP_OEQ)
       .Case("ogt", FCmpInst::FCMP_OGT)
       .Case("oge", FCmpInst::FCMP_OGE)
       .Case("olt", FCmpInst::FCMP_OLT)
       .Case("ole", FCmpInst::FCMP_OLE)
       .Case("one", FCmpInst::FCMP_ONE)
       .Case("ord", FCmpInst::FCMP_ORD)
       .Case("uno", FCmpInst::FCMP_UNO)
       .Case("ueq", FCmpInst::FCMP_UEQ)
       .Case("ugt", FCmpInst::FCMP_UGT)
       .Case("uge", FCmpInst::FCMP_UGE)
       .Case("ult", FCmpInst::FCMP_ULT)
       .Case("ule", FCmpInst::FCMP_ULE)
       .Case("une", FCmpInst::FCMP_UNE)
       .Default(FCmpInst::BAD_FCMP_PREDICATE);
 }
 
+FCmpInst::Predicate ConstrainedFPCmpIntrinsic::getPredicate() const {
+  return getFPPredicateFromMD(getArgOperand(2));
+}
+
 bool ConstrainedFPIntrinsic::isUnaryOp() const {
   switch (getIntrinsicID()) {
   default:
     return false;
 #define INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC)                         \
   case Intrinsic::INTRINSIC:                                                   \
     return NARG == 1;
 #include "llvm/IR/ConstrainedOps.def"

 #define BEGIN_REGISTER_VP_INTRINSIC(VPID, ...) case Intrinsic::VPID:
 #define VP_PROPERTY_CASTOP return true;
 #define END_REGISTER_VP_INTRINSIC(VPID) break;
 #include "llvm/IR/VPIntrinsics.def"
   }
   return false;
 }
 
+bool VPCmpIntrinsic::isVPCmp(Intrinsic::ID ID) {
+  switch (ID) {
+  default:
+    break;
+#define BEGIN_REGISTER_VP_INTRINSIC(VPID, ...) case Intrinsic::VPID:
+#define VP_PROPERTY_CMP(CCPOS, ...) return true;
+#define END_REGISTER_VP_INTRINSIC(VPID) break;
+#include "llvm/IR/VPIntrinsics.def"
+  }
+  return false;
+}
+
+CmpInst::Predicate VPCmpIntrinsic::getPredicate() const {
+  bool IsFP = true;
+  Optional<unsigned> CCArgIdx;
+  switch (getIntrinsicID()) {
+  default:
+    break;
+#define BEGIN_REGISTER_VP_INTRINSIC(VPID, ...) case Intrinsic::VPID:
+#define VP_PROPERTY_CMP(CCPOS, ISFP)                                           \
+  CCArgIdx = CCPOS;                                                            \
+  IsFP = ISFP;                                                                 \
+  break;
+#define END_REGISTER_VP_INTRINSIC(VPID) break;
+#include "llvm/IR/VPIntrinsics.def"
+  }
+  assert(CCArgIdx.hasValue() && IsFP &&
+         "Unexpected vector-predicated comparison");
+  return getFPPredicateFromMD(getArgOperand(*CCArgIdx));
+}
+
 unsigned VPReductionIntrinsic::getVectorParamPos() const {
   return *VPReductionIntrinsic::getVectorParamPos(getIntrinsicID());
 }
 
 unsigned VPReductionIntrinsic::getStartParamPos() const {
   return *VPReductionIntrinsic::getStartParamPos(getIntrinsicID());
 }
 

llvm/lib/IR/Verifier.cpp

void Verifier::visitVPIntrinsic(VPIntrinsic &VPI) {
   if (auto *VPCast = dyn_cast<VPCastIntrinsic>(&VPI)) {
     auto *RetTy = cast<VectorType>(VPCast->getType());
     auto *ValTy = cast<VectorType>(VPCast->getOperand(0)->getType());
     Assert(RetTy->getElementCount() == ValTy->getElementCount(),
            "VP cast intrinsic first argument and result vector lengths must be "
            "equal",
            *VPCast);
   }
+  if (VPI.getIntrinsicID() == Intrinsic::vp_fcmp) {
+    auto Pred = cast<VPCmpIntrinsic>(&VPI)->getPredicate();
+    Assert(CmpInst::isFPPredicate(Pred),
+           "invalid predicate for VP FP comparison intrinsic", &VPI);
+  }
 }
 
 void Verifier::visitConstrainedFPIntrinsic(ConstrainedFPIntrinsic &FPI) {
   unsigned NumOperands;
   bool HasRoundingMD;
   switch (FPI.getIntrinsicID()) {
 #define INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC)                         \
   case Intrinsic::INTRINSIC:                                                   \

llvm/test/Verifier/invalid-vp-intrinsics.ll

 ; RUN: not llvm-as < %s -disable-output 2>&1 | FileCheck %s
 
-declare <4 x i32> @llvm.vp.fptosi.v4i32.v8f32(<8 x float>, <4 x i1>, i32);
+declare <4 x i32> @llvm.vp.fptosi.v4i32.v8f32(<8 x float>, <4 x i1>, i32)
+declare <4 x i1> @llvm.vp.fcmp.v4f32(<4 x float>, <4 x float>, metadata, <4 x i1>, i32)
 
 ; CHECK: VP cast intrinsic first argument and result vector lengths must be equal
 ; CHECK-NEXT: %r0 = call <4 x i32>
 
 define void @test_vp_fptosi(<8 x float> %src, <4 x i1> %m, i32 %n) {
   %r0 = call <4 x i32> @llvm.vp.fptosi.v4i32.v8f32(<8 x float> %src, <4 x i1> %m, i32 %n)
   ret void
 }
+
+; CHECK: invalid predicate for VP FP comparison intrinsic
+; CHECK-NEXT: %r0 = call <4 x i1> @llvm.vp.fcmp.v4f32
+; CHECK: invalid predicate for VP FP comparison intrinsic
+; CHECK-NEXT: %r1 = call <4 x i1> @llvm.vp.fcmp.v4f32
+
+define void @test_vp_fcmp(<4 x float> %a, <4 x float> %b, <4 x i1> %m, i32 %n) {
+  %r0 = call <4 x i1> @llvm.vp.fcmp.v4f32(<4 x float> %a, <4 x float> %b, metadata !"bad", <4 x i1> %m, i32 %n)
+  %r1 = call <4 x i1> @llvm.vp.fcmp.v4f32(<4 x float> %a, <4 x float> %b, metadata !"eq", <4 x i1> %m, i32 %n)
+  ret void
+}

llvm/test/Verifier/vp-intrinsics.ll

 }
 
 define void @test_vp_int_fp_conversions(<8 x i32> %i0, <8 x float> %f0, <8 x i1> %mask, i32 %evl) {
   %r0 = call <8 x float> @llvm.vp.sitofp.v8f32.v8i32(<8 x i32> %i0, <8 x i1> %mask, i32 %evl)
   %r1 = call <8 x i32> @llvm.vp.fptosi.v8i32.v8f32(<8 x float> %f0, <8 x i1> %mask, i32 %evl)
   ret void
 }
 
+define void @test_vp_comparisons(<8 x float> %f0, <8 x float> %f1, <8 x i1> %mask, i32 %evl) {
+  %r0 = call <8 x i1> @llvm.vp.fcmp.v8f32(<8 x float> %f0, <8 x float> %f1, metadata !"oeq", <8 x i1> %mask, i32 %evl)
+  ret void
+}
+
 ; integer arith
 declare <8 x i32> @llvm.vp.add.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
 declare <8 x i32> @llvm.vp.sub.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
 declare <8 x i32> @llvm.vp.mul.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
 declare <8 x i32> @llvm.vp.sdiv.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
 declare <8 x i32> @llvm.vp.srem.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
 declare <8 x i32> @llvm.vp.udiv.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
 declare <8 x i32> @llvm.vp.urem.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)

 declare i32 @llvm.vp.reduce.umin.v8i32(i32, <8 x i32>, <8 x i1>, i32)
 declare float @llvm.vp.reduce.fmin.v8f32(float, <8 x float>, <8 x i1>, i32)
 declare float @llvm.vp.reduce.fmax.v8f32(float, <8 x float>, <8 x i1>, i32)
 declare float @llvm.vp.reduce.fadd.v8f32(float, <8 x float>, <8 x i1>, i32)
 declare float @llvm.vp.reduce.fmul.v8f32(float, <8 x float>, <8 x i1>, i32)
 ; casts
 declare <8 x float> @llvm.vp.sitofp.v8f32.v8i32(<8 x i32>, <8 x i1>, i32)
 declare <8 x i32> @llvm.vp.fptosi.v8i32.v8f32(<8 x float>, <8 x i1>, i32)
+; compares
+declare <8 x i1> @llvm.vp.fcmp.v8f32(<8 x float>, <8 x float>, metadata, <8 x i1>, i32)
 ; shuffles
 declare <8 x i32> @llvm.experimental.vp.splice.v8i32(<8 x i32>, <8 x i32>, i32, <8 x i1>, i32, i32)
 declare <vscale x 8 x i32> @llvm.experimental.vp.splice.nxv8i32(<vscale x 8 x i32>, <vscale x 8 x i32>, i32, <vscale x 8 x i1>, i32, i32)

llvm/unittests/IR/VPIntrinsicTest.cpp

std::unique_ptr<Module> createVPDeclarationModule() {
     Str << " declare <8 x i32> @llvm.experimental.vp.splice.v8i32(<8 x "
            "i32>, <8 x i32>, i32, <8 x i1>, i32, i32) ";
 
     Str << " declare <8 x i32> @llvm.vp.fptosi.v8i32"
         << ".v8f32(<8 x float>, <8 x i1>, i32) ";
     Str << " declare <8 x float> @llvm.vp.sitofp.v8f32"
         << ".v8i32(<8 x i32>, <8 x i1>, i32) ";
 
+    Str << " declare <8 x i1> @llvm.vp.fcmp.v8f32"
+        << ".v8f32(<8 x float>, <8 x float>, metadata, <8 x i1>, i32) ";
+
     return parseAssemblyString(Str.str(), Err, C);
   }
 };
 
 /// Check that the property scopes include/llvm/IR/VPIntrinsics.def are closed.
 TEST_F(VPIntrinsicTest, VPIntrinsicsDefScopes) {
   Optional<Intrinsic::ID> ScopeVPID;
 #define BEGIN_REGISTER_VP_INTRINSIC(VPID, ...)                                 \