[RISCV] Add tests for SHFLI and UNSHFLI aliases in Zbp extension

[Jimerlife]

Summary

Supplement tests alias of SHFLI and UNSHFLI instructions.
RV32:
zip8/zip4/zip2/unzip8/unzip4/unzip2 aliases

RV64:
zip8.w/zip4.w/zip2.w/zip.w/zip8/zip4/zip2/zip/unzip8.w/unzip4.w/unzip2.w/unzip.w/unzip8/unzip4/unzip2/unzip aliases

[Jimerlife]

add tests of i32 value type for RV64

[craig.topper]

Why test zip8 and zip8.w with RV64, but not RV32?

llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll

133

zip8.w/unzip8.w isn't listed in the patch description

135

zip8.w is 8 not 24 right? I think type legalization is masking it off by adding with 0xf?

[Jimerlife]

1. add zip8/unzip8 for RV32
2. update zip8.w/unzip8.w for Rv64
3. undate description of this patch

[Jimerlife]

In D120015#3334682, @craig.topper wrote:

Why test zip8 and zip8.w with RV64, but not RV32?

I found test of zip8 in rv32zbp.ll, so I didn't add this test. But now I also add zip8/unzip8 tests in rv32zbp-intrinsic.ll.

llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll

135

yes, zip8.w is 8. I updated this test.

[craig.topper]

LGTM

llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll

 ; RV32ZBP-LABEL: shfli32:
 ; RV32ZBP:       # %bb.0:
 ; RV32ZBP-NEXT:    shfli a0, a0, 13
 ; RV32ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 13)
  ret i32 %tmp
 }
 
+define i32 @zip4i32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zip4i32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip4 a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 12)
+ ret i32 %tmp
+}
+
+define i32 @zip2i32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zip2i32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip2 a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 14)
+ ret i32 %tmp
+}
+
 define i32 @zipi32(i32 %a) nounwind {
 ; RV32ZBP-LABEL: zipi32:
 ; RV32ZBP:       # %bb.0:
 ; RV32ZBP-NEXT:    zip a0, a0
 ; RV32ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 15)
  ret i32 %tmp
 }
 
+define i32 @zip8i32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zip8i32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip8 a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 8)
+ ret i32 %tmp
+}
+
 declare i32 @llvm.riscv.unshfl.i32(i32 %a, i32 %b)
 
 define i32 @unshfl32(i32 %a, i32 %b) nounwind {
 ; RV32ZBP-LABEL: unshfl32:
 ; RV32ZBP:       # %bb.0:
 ; RV32ZBP-NEXT:    unshfl a0, a0, a1
 ; RV32ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 %b)

 ; RV32ZBP-LABEL: unshfli32:
 ; RV32ZBP:       # %bb.0:
 ; RV32ZBP-NEXT:    unshfli a0, a0, 13
 ; RV32ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 13)
  ret i32 %tmp
 }
 
+define i32 @unzip4i32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzip4i32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip4 a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 12)
+ ret i32 %tmp
+}
+
+define i32 @unzip2i32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzip2i32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip2 a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 14)
+ ret i32 %tmp
+}
+
 define i32 @unzipi32(i32 %a) nounwind {
 ; RV32ZBP-LABEL: unzipi32:
 ; RV32ZBP:       # %bb.0:
 ; RV32ZBP-NEXT:    unzip a0, a0
 ; RV32ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 15)
  ret i32 %tmp
 }
 
+define i32 @unzip8i32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzip8i32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip8 a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 8)
+ ret i32 %tmp
+}
+
 declare i32 @llvm.riscv.xperm.n.i32(i32 %a, i32 %b)
 
 define i32 @xpermn32(i32 %a, i32 %b) nounwind {
 ; RV32ZBP-LABEL: xpermn32:
 ; RV32ZBP:       # %bb.0:
 ; RV32ZBP-NEXT:    xperm.n a0, a0, a1
 ; RV32ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.xperm.n.i32(i32 %a, i32 %b)

llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll

 ; RV64ZBP-LABEL: shfli32:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    shfli a0, a0, 13
 ; RV64ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 13)
  ret i32 %tmp
 }
 
-define signext i32 @zip_w(i32 signext %a) nounwind {
-; RV64ZBP-LABEL: zip_w:
+define signext i32 @zip4wi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zip4wi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip4.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 12)
+ ret i32 %tmp
+}
+
+define signext i32 @zip2wi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zip2wi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip2.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 14)
+ ret i32 %tmp
+}
+
+define signext i32 @zipwi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zipwi32:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    zip.w a0, a0
 ; RV64ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 15)
  ret i32 %tmp
 }
 
+define signext i32 @zip8wi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zip8wi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip8.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 8)
+ ret i32 %tmp
+}
+
 declare i32 @llvm.riscv.unshfl.i32(i32 %a, i32 %b)
 
 define signext i32 @unshfl32(i32 signext %a, i32 signext %b) nounwind {
 ; RV64ZBP-LABEL: unshfl32:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    unshflw a0, a0, a1
 ; RV64ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 %b)

 ; RV64ZBP-LABEL: unshfli32:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    unshfli a0, a0, 13
 ; RV64ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 13)
  ret i32 %tmp
 }
 
-define signext i32 @unzip_w(i32 signext %a) nounwind {
-; RV64ZBP-LABEL: unzip_w:
+define signext i32 @unzip4wi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzip4wi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip4.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 12)
+ ret i32 %tmp
+}
+
+define signext i32 @unzip2wi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzip2wi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip2.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 14)
+ ret i32 %tmp
+}
+
+define signext i32 @unzipwi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzipwi32:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    unzip.w a0, a0
 ; RV64ZBP-NEXT:    ret
   %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 15)
  ret i32 %tmp
 }
 
+define signext i32 @unzip8wi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzip8wi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip8.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 8)
+ ret i32 %tmp
+}
+
 declare i64 @llvm.riscv.grev.i64(i64 %a, i64 %b)
 
 define i64 @grev64(i64 %a, i64 %b) nounwind {
 ; RV64ZBP-LABEL: grev64:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    grev a0, a0, a1
 ; RV64ZBP-NEXT:    ret
   %tmp = call i64 @llvm.riscv.grev.i64(i64 %a, i64 %b)

 ; RV64ZBP-LABEL: shfli64:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    shfli a0, a0, 13
 ; RV64ZBP-NEXT:    ret
   %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 13)
  ret i64 %tmp
 }
 
+define i64 @zip4wi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip4wi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip4.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 12)
+ ret i64 %tmp
+}
+
+define i64 @zip2wi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip2wi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip2.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 14)
+ ret i64 %tmp
+}
+
+define i64 @zipwi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zipwi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 15)
+ ret i64 %tmp
+}
+
+define i64 @zip8i64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip8i64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip8 a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 24)
+ ret i64 %tmp
+}
+
+define i64 @zip4i64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip4i64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip4 a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 28)
+ ret i64 %tmp
+}
+
+define i64 @zip2i64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip2i64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip2 a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 30)
+ ret i64 %tmp
+}
+
+define i64 @zipi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zipi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 31)
+ ret i64 %tmp
+}
+
 declare i64 @llvm.riscv.unshfl.i64(i64 %a, i64 %b)
 
 define i64 @unshfl64(i64 %a, i64 %b) nounwind {
 ; RV64ZBP-LABEL: unshfl64:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    unshfl a0, a0, a1
 ; RV64ZBP-NEXT:    ret
   %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 %b)

 ; RV64ZBP-LABEL: unshfli64:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    unshfli a0, a0, 13
 ; RV64ZBP-NEXT:    ret
   %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 13)
  ret i64 %tmp
 }
 
+define i64 @unzip4wi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip4wi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip4.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 12)
+ ret i64 %tmp
+}
+
+define i64 @unzip2wi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip2wi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip2.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 14)
+ ret i64 %tmp
+}
+
+define i64 @unzipwi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzipwi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip.w a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 15)
+ ret i64 %tmp
+}
+
+define i64 @unzip8i64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip8i64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip8 a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 24)
+ ret i64 %tmp
+}
+
+define i64 @unzip4i64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip4i64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip4 a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 28)
+ ret i64 %tmp
+}
+
+define i64 @unzip2i64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip2i64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip2 a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 30)
+ ret i64 %tmp
+}
+
+define i64 @unzipi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzipi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 31)
+ ret i64 %tmp
+}
+
 declare i64 @llvm.riscv.xperm.n.i64(i64 %a, i64 %b)
 
 define i64 @xpermn64(i64 %a, i64 %b) nounwind {
 ; RV64ZBP-LABEL: xpermn64:
 ; RV64ZBP:       # %bb.0:
 ; RV64ZBP-NEXT:    xperm.n a0, a0, a1
 ; RV64ZBP-NEXT:    ret
   %tmp = call i64 @llvm.riscv.xperm.n.i64(i64 %a, i64 %b)