Add R_RISCV_SUB6 relocation
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
Comment Actions
Hi, StephenFan, I have a question in the inline comment.
Would you be so kind to explain it to us?
llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | ||
---|---|---|
379 | Can we safely assumed that, here, the Value is 6 bits? |
llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | ||
---|---|---|
379 | You are right, I need to mask off the upper 2 bits of the value at the address and truncate the Value |
Comment Actions
Please update this file as well and clang format the codes.
llvm/lib/ExecutionEngine/JITLink/riscv.cpp
You need to mask off the upper 2 bits of the value at the address