[RISCV] Adjust the header comment in RISCVInstrInfoZb.td to better integrate Zbk* extensions.

[craig.topper]

Summary

The Zbk* extensions have some overlap with Zb so have been placed in this file.

[SForeKeeper]

Fix minor typo.

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

26

Typo fix: Entropy*

[craig.topper]

Fix typo

[VincentWu]

LGTM

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

 //===-- RISCVInstrInfoZb.td - RISC-V Bitmanip instructions -*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file describes the RISC-V instructions from the standard Bitmanip
 // extensions, versions:
 //   Zba - 1.0
 //   Zbb - 1.0
 //   Zbc - 1.0
 //   Zbs - 1.0
-//   Zbe - 0.93
-//   Zbf - 0.93
-//   Zbm - 0.93
-//   Zbp - 0.93
-//   Zbr - 0.93
-//   Zbt - 0.93
+//   Zbe - 0.93 *experimental
+//   Zbf - 0.93 *experimental
+//   Zbm - 0.93 *experimental
+//   Zbp - 0.93 *experimental
+//   Zbr - 0.93 *experimental
+//   Zbt - 0.93 *experimental
 //
-// Zba, Zbb, Zbc, and Zbs have been ratified and are considered stable. The
-// other extensions are experimental as they have not yet been ratiied and are
-// subject to change.
+// The experimental extensions appeared in an earlier draft of the Bitmanip
+// extensions. They are not ratified and subject to change.
+//
+// This file also describes RISC-V instructions from the Zbk* extensions in
+// Cryptography Extensions Volume I: Scalar & Entropy Source Instructions,
+// versions:
+//   Zbkb - 1.0
+//   Zbkc - 1.0
 //
 //===----------------------------------------------------------------------===//
 
 //===----------------------------------------------------------------------===//
 // Operand and SDNode transformation definitions.
 //===----------------------------------------------------------------------===//
 
 def riscv_clzw   : SDNode<"RISCVISD::CLZW",   SDT_RISCVIntUnaryOpW>;