[RISCV] Add scheduler for bfp instruction in Zbf extension

[Jimerlife]

Summary

Try to add scheduler for bfp instruction in Zbf extension

[craig.topper]

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

557–558

limit line length to 80 columns

[Jimerlife]

adjust code format, limit line length to 80 columns

[Jimerlife]

update code format

[craig.topper]

LGTM

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

 } // Predicates = [HasStdExtZbp]
 
 let Predicates = [HasStdExtZbm, IsRV64] in {
 def BMATOR   : ALU_rr<0b0000100, 0b011, "bmator">, Sched<[]>;
 def BMATXOR  : ALU_rr<0b0100100, 0b011, "bmatxor">, Sched<[]>;
 } // Predicates = [HasStdExtZbm, IsRV64]
 
 let Predicates = [HasStdExtZbf] in
-def BFP : ALU_rr<0b0100100, 0b111, "bfp">, Sched<[]>;
+def BFP : ALU_rr<0b0100100, 0b111, "bfp">,
+          Sched<[WriteBFP, ReadBFP, ReadBFP]>;
 
 let Predicates = [HasStdExtZbp] in {
 def SHFLI   : RVBShfl_ri<0b0000100, 0b001, OPC_OP_IMM, "shfli">, Sched<[]>;
 def UNSHFLI : RVBShfl_ri<0b0000100, 0b101, OPC_OP_IMM, "unshfli">, Sched<[]>;
 } // Predicates = [HasStdExtZbp]
 
 let Predicates = [HasStdExtZba, IsRV64] in {
 def SLLIUW : RVBShift_ri<0b00001, 0b001, OPC_OP_IMM_32, "slli.uw">,

 } // Predicates = [HasStdExtZbe, IsRV64]
 
 let Predicates = [HasStdExtZbp, IsRV64] in {
 def PACKW  : ALUW_rr<0b0000100, 0b100, "packw">, Sched<[]>;
 def PACKUW : ALUW_rr<0b0100100, 0b100, "packuw">, Sched<[]>;
 } // Predicates = [HasStdExtZbp, IsRV64]
 
 let Predicates = [HasStdExtZbf, IsRV64] in
-def BFPW : ALUW_rr<0b0100100, 0b111, "bfpw">, Sched<[]>;
+def BFPW : ALUW_rr<0b0100100, 0b111, "bfpw">,
+           Sched<[WriteBFP32, ReadBFP32, ReadBFP32]>;
 
 let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 def ZEXTH_RV32 : RVInstR<0b0000100, 0b100, OPC_OP, (outs GPR:$rd),
                          (ins GPR:$rs1), "zext.h", "$rd, $rs1">,
                  Sched<[WriteIALU, ReadIALU]> {
   let rs2 = 0b00000;
 }

llvm/lib/Target/RISCV/RISCVSchedRocket.td

 def : ReadAdvance<ReadFClass32, 0>;
 def : ReadAdvance<ReadFClass64, 0>;
 
 //===----------------------------------------------------------------------===//
 // Unsupported extensions
 defm : UnsupportedSchedV;
 defm : UnsupportedSchedZba;
 defm : UnsupportedSchedZbb;
+defm : UnsupportedSchedZbf;
 defm : UnsupportedSchedZfh;
 }

llvm/lib/Target/RISCV/RISCVSchedSiFive7.td

 def : ReadAdvance<ReadFClass32, 0>;
 def : ReadAdvance<ReadFClass64, 0>;
 
 //===----------------------------------------------------------------------===//
 // Unsupported extensions
 defm : UnsupportedSchedV;
 defm : UnsupportedSchedZba;
 defm : UnsupportedSchedZbb;
+defm : UnsupportedSchedZbf;
 defm : UnsupportedSchedZfh;
 }

llvm/lib/Target/RISCV/RISCVScheduleB.td

 def WriteCLZ32       : SchedWrite;
 def WriteCTZ         : SchedWrite;
 def WriteCTZ32       : SchedWrite;
 def WriteCPOP        : SchedWrite;
 def WriteCPOP32      : SchedWrite;
 def WriteREV8        : SchedWrite;
 def WriteORCB        : SchedWrite;
 
+// Zbf extension
+def WriteBFP         : SchedWrite; // BFP
+def WriteBFP32       : SchedWrite; // BFPW
+
 /// Define scheduler resources associated with use operands.
 
 // Zba extension
 def ReadSHXADD      : SchedRead; // sh1add/sh2add/sh3add
 def ReadSHXADD32    : SchedRead; // sh1add.uw/sh2add.uw/sh3add.uw
 
 // Zbb extension
 def ReadRotateImm   : SchedRead;
 def ReadRotateImm32 : SchedRead;
 def ReadRotateReg   : SchedRead;
 def ReadRotateReg32 : SchedRead;
 def ReadCLZ         : SchedRead;
 def ReadCLZ32       : SchedRead;
 def ReadCTZ         : SchedRead;
 def ReadCTZ32       : SchedRead;
 def ReadCPOP        : SchedRead;
 def ReadCPOP32      : SchedRead;
 def ReadREV8        : SchedRead;
 def ReadORCB        : SchedRead;
 
+// Zbf extension
+def ReadBFP         : SchedRead; // BFP
+def ReadBFP32       : SchedRead; // BFPW
+
 /// Define default scheduler resources for B.
 
 multiclass UnsupportedSchedZba {
 let Unsupported = true in {
 def : WriteRes<WriteSHXADD, []>;
 def : WriteRes<WriteSHXADD32, []>;
 
 def : ReadAdvance<ReadSHXADD, 0>;

 def : ReadAdvance<ReadCTZ, 0>;
 def : ReadAdvance<ReadCTZ32, 0>;
 def : ReadAdvance<ReadCPOP, 0>;
 def : ReadAdvance<ReadCPOP32, 0>;
 def : ReadAdvance<ReadREV8, 0>;
 def : ReadAdvance<ReadORCB, 0>;
 }
 }
+
+multiclass UnsupportedSchedZbf {
+let Unsupported = true in {
+def : WriteRes<WriteBFP, []>;
+def : WriteRes<WriteBFP32, []>;
+
+def : ReadAdvance<ReadBFP, 0>;
+def : ReadAdvance<ReadBFP32, 0>;
+}
+}