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Differential D116968

[IRBuilder] Migrate add-folding to value-based FoldAdd.
ClosedPublic

Authored by fhahn on Jan 10 2022, 12:44 PM.

Details

Reviewers
reames
nikic
lebedev.ri
nhaehnle
Commits
rG7e68061305a9: [IRBuilder] Migrate add-folding to value-based FoldAdd.
Summary

Depends on D116935.

Diff Detail

Event Timeline

fhahn created this revision.Jan 10 2022, 12:44 PM
Herald added a subscriber: dexonsmith. · View Herald TranscriptJan 10 2022, 12:44 PM
fhahn requested review of this revision.Jan 10 2022, 12:44 PM
Herald added a project: Restricted Project. · View Herald TranscriptJan 10 2022, 12:44 PM
Harbormaster completed remote builds in B142501: Diff 398720.Jan 10 2022, 12:45 PM
nikic accepted this revision.Jan 10 2022, 12:51 PM

LGTM

llvm/include/llvm/Analysis/InstSimplifyFolder.h
52

Might make sense to store the SimplifyQuery in the class?

This revision is now accepted and ready to land.Jan 10 2022, 12:51 PM
This revision was landed with ongoing or failed builds.Jan 12 2022, 1:25 AM
Closed by commit rG7e68061305a9: [IRBuilder] Migrate add-folding to value-based FoldAdd. (authored by fhahn). · Explain Why
This revision was automatically updated to reflect the committed changes.
fhahn added a commit: rG7e68061305a9: [IRBuilder] Migrate add-folding to value-based FoldAdd..
fhahn marked an inline comment as done.Jan 12 2022, 1:25 AM
fhahn added inline comments.
llvm/include/llvm/Analysis/InstSimplifyFolder.h
52

Done in the committed version, thanks!

Revision Contents

PathSize
llvm/
include/
llvm/
Analysis/
15 lines
13 lines
IR/
14 lines
5 lines
4 lines
14 lines
test/
Transforms/
LoopVectorize/
6 lines
12 lines
9 lines
LoopVersioning/
3 lines

Diff 399248

llvm/include/llvm/Analysis/InstSimplifyFolder.h

Show All 27 Lines
#include "llvm/IR/Instruction.h" #include "llvm/IR/Instruction.h"
namespace llvm { namespace llvm {
/// InstSimplifyFolder - Use InstructionSimplify to fold operations to existing /// InstSimplifyFolder - Use InstructionSimplify to fold operations to existing
/// values. Also applies target-specific constant folding when not using /// values. Also applies target-specific constant folding when not using
/// InstructionSimplify. /// InstructionSimplify.
class InstSimplifyFolder final : public IRBuilderFolder { class InstSimplifyFolder final : public IRBuilderFolder {
const DataLayout &DL;
TargetFolder ConstFolder; TargetFolder ConstFolder;
SimplifyQuery SQ;
virtual void anchor(); virtual void anchor();
public: public:
InstSimplifyFolder(const DataLayout &DL) : DL(DL), ConstFolder(DL) {} InstSimplifyFolder(const DataLayout &DL) : ConstFolder(DL), SQ(DL) {}
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Value-based folders. // Value-based folders.
// //
// Return an existing value or a constant if the operation can be simplified. // Return an existing value or a constant if the operation can be simplified.
// Otherwise return nullptr. // Otherwise return nullptr.
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Value *FoldAdd(Value *LHS, Value *RHS, bool HasNUW = false,
bool HasNSW = false) const override {
return SimplifyAddInst(LHS, RHS, HasNUW, HasNSW, SQ);
nikicUnsubmitted
Not Done
ReplyInline Actions

Might make sense to store the SimplifyQuery in the class?

nikic: Might make sense to store the SimplifyQuery in the class?
fhahnAuthorUnsubmitted
Done
ReplyInline Actions

Done in the committed version, thanks!

fhahn: Done in the committed version, thanks!
}
Value *FoldOr(Value *LHS, Value *RHS) const override { Value *FoldOr(Value *LHS, Value *RHS) const override {
return SimplifyOrInst(LHS, RHS, SimplifyQuery(DL)); return SimplifyOrInst(LHS, RHS, SQ);
} }
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Binary Operators // Binary Operators
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Value *CreateAdd(Constant *LHS, Constant *RHS, bool HasNUW = false,
bool HasNSW = false) const override {
return ConstFolder.CreateAdd(LHS, RHS, HasNUW, HasNSW);
}
Value *CreateFAdd(Constant *LHS, Constant *RHS) const override { Value *CreateFAdd(Constant *LHS, Constant *RHS) const override {
return ConstFolder.CreateFAdd(LHS, RHS); return ConstFolder.CreateFAdd(LHS, RHS);
} }
Value *CreateSub(Constant *LHS, Constant *RHS, bool HasNUW = false, Value *CreateSub(Constant *LHS, Constant *RHS, bool HasNUW = false,
bool HasNSW = false) const override { bool HasNSW = false) const override {
return ConstFolder.CreateSub(LHS, RHS, HasNUW, HasNSW); return ConstFolder.CreateSub(LHS, RHS, HasNUW, HasNSW);
} }
Value *CreateFSub(Constant *LHS, Constant *RHS) const override { Value *CreateFSub(Constant *LHS, Constant *RHS) const override {
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llvm/include/llvm/Analysis/TargetFolder.h

Show First 20 Lines • Show All 42 Lines • ▼ Show 20 Linespublic:
explicit TargetFolder(const DataLayout &DL) : DL(DL) {} explicit TargetFolder(const DataLayout &DL) : DL(DL) {}
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Value-based folders. // Value-based folders.
// //
// Return an existing value or a constant if the operation can be simplified. // Return an existing value or a constant if the operation can be simplified.
// Otherwise return nullptr. // Otherwise return nullptr.
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Value *FoldAdd(Value *LHS, Value *RHS, bool HasNUW = false,
bool HasNSW = false) const override {
auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC)
return Fold(ConstantExpr::getAdd(LC, RC, HasNUW, HasNSW));
return nullptr;
}
Value *FoldOr(Value *LHS, Value *RHS) const override { Value *FoldOr(Value *LHS, Value *RHS) const override {
auto *LC = dyn_cast<Constant>(LHS); auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS); auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC) if (LC && RC)
return Fold(ConstantExpr::getOr(LC, RC)); return Fold(ConstantExpr::getOr(LC, RC));
return nullptr; return nullptr;
} }
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Binary Operators // Binary Operators
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Constant *CreateAdd(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNSW = false) const override {
return Fold(ConstantExpr::getAdd(LHS, RHS, HasNUW, HasNSW));
}
Constant *CreateFAdd(Constant *LHS, Constant *RHS) const override { Constant *CreateFAdd(Constant *LHS, Constant *RHS) const override {
return Fold(ConstantExpr::getFAdd(LHS, RHS)); return Fold(ConstantExpr::getFAdd(LHS, RHS));
} }
Constant *CreateSub(Constant *LHS, Constant *RHS, Constant *CreateSub(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNSW = false) const override { bool HasNUW = false, bool HasNSW = false) const override {
return Fold(ConstantExpr::getSub(LHS, RHS, HasNUW, HasNSW)); return Fold(ConstantExpr::getSub(LHS, RHS, HasNUW, HasNSW));
} }
Constant *CreateFSub(Constant *LHS, Constant *RHS) const override { Constant *CreateFSub(Constant *LHS, Constant *RHS) const override {
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llvm/include/llvm/IR/ConstantFolder.h

Show All 31 Linespublic:
explicit ConstantFolder() = default; explicit ConstantFolder() = default;
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Value-based folders. // Value-based folders.
// //
// Return an existing value or a constant if the operation can be simplified. // Return an existing value or a constant if the operation can be simplified.
// Otherwise return nullptr. // Otherwise return nullptr.
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Value *FoldAdd(Value *LHS, Value *RHS, bool HasNUW = false,
bool HasNSW = false) const override {
auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC)
return ConstantExpr::getAdd(LC, RC, HasNUW, HasNSW);
return nullptr;
}
Value *FoldOr(Value *LHS, Value *RHS) const override { Value *FoldOr(Value *LHS, Value *RHS) const override {
auto *LC = dyn_cast<Constant>(LHS); auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS); auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC) if (LC && RC)
return ConstantExpr::getOr(LC, RC); return ConstantExpr::getOr(LC, RC);
return nullptr; return nullptr;
} }
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Binary Operators // Binary Operators
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Constant *CreateAdd(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNSW = false) const override {
return ConstantExpr::getAdd(LHS, RHS, HasNUW, HasNSW);
}
Constant *CreateFAdd(Constant *LHS, Constant *RHS) const override { Constant *CreateFAdd(Constant *LHS, Constant *RHS) const override {
return ConstantExpr::getFAdd(LHS, RHS); return ConstantExpr::getFAdd(LHS, RHS);
} }
Constant *CreateSub(Constant *LHS, Constant *RHS, Constant *CreateSub(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNSW = false) const override { bool HasNUW = false, bool HasNSW = false) const override {
return ConstantExpr::getSub(LHS, RHS, HasNUW, HasNSW); return ConstantExpr::getSub(LHS, RHS, HasNUW, HasNSW);
} }
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llvm/include/llvm/IR/IRBuilder.h

Show First 20 Lines • Show All 1,205 Lines • ▼ Show 20 Lines Value *getConstrainedFPPredicate(CmpInst::Predicate Predicate) {
auto *PredicateMDS = MDString::get(Context, PredicateStr); auto *PredicateMDS = MDString::get(Context, PredicateStr);
return MetadataAsValue::get(Context, PredicateMDS); return MetadataAsValue::get(Context, PredicateMDS);
} }
public: public:
Value *CreateAdd(Value *LHS, Value *RHS, const Twine &Name = "", Value *CreateAdd(Value *LHS, Value *RHS, const Twine &Name = "",
bool HasNUW = false, bool HasNSW = false) { bool HasNUW = false, bool HasNSW = false) {
if (auto *LC = dyn_cast<Constant>(LHS)) if (auto *V = Folder.FoldAdd(LHS, RHS, HasNUW, HasNSW))
if (auto *RC = dyn_cast<Constant>(RHS)) return V;
return Insert(Folder.CreateAdd(LC, RC, HasNUW, HasNSW), Name);
return CreateInsertNUWNSWBinOp(Instruction::Add, LHS, RHS, Name, return CreateInsertNUWNSWBinOp(Instruction::Add, LHS, RHS, Name,
HasNUW, HasNSW); HasNUW, HasNSW);
} }
Value *CreateNSWAdd(Value *LHS, Value *RHS, const Twine &Name = "") { Value *CreateNSWAdd(Value *LHS, Value *RHS, const Twine &Name = "") {
return CreateAdd(LHS, RHS, Name, false, true); return CreateAdd(LHS, RHS, Name, false, true);
} }
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llvm/include/llvm/IR/IRBuilderFolder.h

Show All 25 Linespublic:
virtual ~IRBuilderFolder(); virtual ~IRBuilderFolder();
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Value-based folders. // Value-based folders.
// //
// Return an existing value or a constant if the operation can be simplified. // Return an existing value or a constant if the operation can be simplified.
// Otherwise return nullptr. // Otherwise return nullptr.
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
virtual Value *FoldAdd(Value *LHS, Value *RHS, bool HasNUW = false,
bool HasNSW = false) const = 0;
virtual Value *FoldOr(Value *LHS, Value *RHS) const = 0; virtual Value *FoldOr(Value *LHS, Value *RHS) const = 0;
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Binary Operators // Binary Operators
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
virtual Value *CreateAdd(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNSW = false) const = 0;
virtual Value *CreateFAdd(Constant *LHS, Constant *RHS) const = 0; virtual Value *CreateFAdd(Constant *LHS, Constant *RHS) const = 0;
virtual Value *CreateSub(Constant *LHS, Constant *RHS, virtual Value *CreateSub(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNSW = false) const = 0; bool HasNUW = false, bool HasNSW = false) const = 0;
virtual Value *CreateFSub(Constant *LHS, Constant *RHS) const = 0; virtual Value *CreateFSub(Constant *LHS, Constant *RHS) const = 0;
virtual Value *CreateMul(Constant *LHS, Constant *RHS, virtual Value *CreateMul(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNSW = false) const = 0; bool HasNUW = false, bool HasNSW = false) const = 0;
virtual Value *CreateFMul(Constant *LHS, Constant *RHS) const = 0; virtual Value *CreateFMul(Constant *LHS, Constant *RHS) const = 0;
virtual Value *CreateUDiv(Constant *LHS, Constant *RHS, virtual Value *CreateUDiv(Constant *LHS, Constant *RHS,
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llvm/include/llvm/IR/NoFolder.h

Show All 37 Linespublic:
explicit NoFolder() = default; explicit NoFolder() = default;
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Value-based folders. // Value-based folders.
// //
// Return an existing value or a constant if the operation can be simplified. // Return an existing value or a constant if the operation can be simplified.
// Otherwise return nullptr. // Otherwise return nullptr.
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Value *FoldAdd(Value *LHS, Value *RHS, bool HasNUW = false,
bool HasNSW = false) const override {
return nullptr;
}
Value *FoldOr(Value *LHS, Value *RHS) const override { return nullptr; } Value *FoldOr(Value *LHS, Value *RHS) const override { return nullptr; }
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Binary Operators // Binary Operators
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
Instruction *CreateAdd(Constant *LHS, Constant *RHS,
bool HasNUW = false,
bool HasNSW = false) const override {
BinaryOperator *BO = BinaryOperator::CreateAdd(LHS, RHS);
if (HasNUW) BO->setHasNoUnsignedWrap();
if (HasNSW) BO->setHasNoSignedWrap();
return BO;
}
Instruction *CreateFAdd(Constant *LHS, Constant *RHS) const override { Instruction *CreateFAdd(Constant *LHS, Constant *RHS) const override {
return BinaryOperator::CreateFAdd(LHS, RHS); return BinaryOperator::CreateFAdd(LHS, RHS);
} }
Instruction *CreateSub(Constant *LHS, Constant *RHS, Instruction *CreateSub(Constant *LHS, Constant *RHS,
bool HasNUW = false, bool HasNUW = false,
bool HasNSW = false) const override { bool HasNSW = false) const override {
BinaryOperator *BO = BinaryOperator::CreateSub(LHS, RHS); BinaryOperator *BO = BinaryOperator::CreateSub(LHS, RHS);
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llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll

Show First 20 Lines • Show All 639 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @sink_dominance( ; CHECK-LABEL: @sink_dominance(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[UMAX1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1) ; CHECK-NEXT: [[UMAX1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[UMAX1]], 4 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[UMAX1]], 4
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
; CHECK: vector.scevcheck: ; CHECK: vector.scevcheck:
; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N]], i32 1) ; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N]], i32 1)
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[UMAX]], -1 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[UMAX]], -1
; CHECK-NEXT: [[TMP1:%.*]] = add i32 0, [[TMP0]] ; CHECK-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP4]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK-NEXT: br i1 [[TMP4]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
; CHECK: vector.ph: ; CHECK: vector.ph:
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[UMAX1]], 4 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[UMAX1]], 4
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[UMAX1]], [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[UMAX1]], [[N_MOD_VF]]
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body: ; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i64> [ <i64 poison, i64 poison, i64 poison, i64 0>, [[VECTOR_PH]] ], [ [[TMP11:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i64> [ <i64 poison, i64 poison, i64 poison, i64 0>, [[VECTOR_PH]] ], [ [[TMP11:%.*]], [[VECTOR_BODY]] ]
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @sink_dominance_2( ; CHECK-LABEL: @sink_dominance_2(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[UMAX1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1) ; CHECK-NEXT: [[UMAX1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[UMAX1]], 4 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[UMAX1]], 4
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
; CHECK: vector.scevcheck: ; CHECK: vector.scevcheck:
; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N]], i32 1) ; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N]], i32 1)
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[UMAX]], -1 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[UMAX]], -1
; CHECK-NEXT: [[TMP1:%.*]] = add i32 0, [[TMP0]] ; CHECK-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP4]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK-NEXT: br i1 [[TMP4]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
; CHECK: vector.ph: ; CHECK: vector.ph:
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[UMAX1]], 4 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[UMAX1]], 4
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[UMAX1]], [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[UMAX1]], [[N_MOD_VF]]
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body: ; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i64> [ <i64 poison, i64 poison, i64 poison, i64 0>, [[VECTOR_PH]] ], [ [[TMP11:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i64> [ <i64 poison, i64 poison, i64 poison, i64 0>, [[VECTOR_PH]] ], [ [[TMP11:%.*]], [[VECTOR_BODY]] ]
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llvm/test/Transforms/LoopVectorize/induction.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 4,603 Lines • ▼ Show 20 Lines
define void @trunciv(i32* nocapture %a, i32 %start, i64 %k) { define void @trunciv(i32* nocapture %a, i32 %start, i64 %k) {
; CHECK-LABEL: @trunciv( ; CHECK-LABEL: @trunciv(
; CHECK-NEXT: for.body.preheader: ; CHECK-NEXT: for.body.preheader:
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[K:%.*]], 2 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[K:%.*]], 2
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
; CHECK: vector.scevcheck: ; CHECK: vector.scevcheck:
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[K]], -1 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[K]], -1
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = add i32 0, [[TMP1]] ; CHECK-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP2]], 0
; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295 ; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP5]], [[TMP7]] ; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP5]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK-NEXT: br i1 [[TMP8]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
; CHECK: vector.ph: ; CHECK: vector.ph:
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[K]], 2 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[K]], 2
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[K]], [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[K]], [[N_MOD_VF]]
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body: ; CHECK: vector.body:
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; ;
; UNROLL-NO-IC-LABEL: @trunciv( ; UNROLL-NO-IC-LABEL: @trunciv(
; UNROLL-NO-IC-NEXT: for.body.preheader: ; UNROLL-NO-IC-NEXT: for.body.preheader:
; UNROLL-NO-IC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[K:%.*]], 4 ; UNROLL-NO-IC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[K:%.*]], 4
; UNROLL-NO-IC-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] ; UNROLL-NO-IC-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
; UNROLL-NO-IC: vector.scevcheck: ; UNROLL-NO-IC: vector.scevcheck:
; UNROLL-NO-IC-NEXT: [[TMP0:%.*]] = add i64 [[K]], -1 ; UNROLL-NO-IC-NEXT: [[TMP0:%.*]] = add i64 [[K]], -1
; UNROLL-NO-IC-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32 ; UNROLL-NO-IC-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
; UNROLL-NO-IC-NEXT: [[TMP2:%.*]] = add i32 0, [[TMP1]] ; UNROLL-NO-IC-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP1]], 0
; UNROLL-NO-IC-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP2]], 0
; UNROLL-NO-IC-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295 ; UNROLL-NO-IC-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
; UNROLL-NO-IC-NEXT: [[TMP8:%.*]] = or i1 [[TMP5]], [[TMP7]] ; UNROLL-NO-IC-NEXT: [[TMP8:%.*]] = or i1 [[TMP5]], [[TMP7]]
; UNROLL-NO-IC-NEXT: br i1 [[TMP8]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; UNROLL-NO-IC-NEXT: br i1 [[TMP8]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
; UNROLL-NO-IC: vector.ph: ; UNROLL-NO-IC: vector.ph:
; UNROLL-NO-IC-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[K]], 4 ; UNROLL-NO-IC-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[K]], 4
; UNROLL-NO-IC-NEXT: [[N_VEC:%.*]] = sub i64 [[K]], [[N_MOD_VF]] ; UNROLL-NO-IC-NEXT: [[N_VEC:%.*]] = sub i64 [[K]], [[N_MOD_VF]]
; UNROLL-NO-IC-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL-NO-IC-NEXT: br label [[VECTOR_BODY:%.*]]
; UNROLL-NO-IC: vector.body: ; UNROLL-NO-IC: vector.body:
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8
; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0
; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]] ; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]]
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8
; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]]) ; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]])
; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0
; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1
; CHECK-NEXT: [[TMP6:%.*]] = add i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]] ; CHECK-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP8:%.*]] = icmp slt i8 [[TMP6]], 0 ; CHECK-NEXT: [[TMP8:%.*]] = icmp slt i8 [[MUL_RESULT]], 0
; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP7]], 0 ; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP7]], 0
; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]] ; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]]
; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]] ; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]]
; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255 ; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255
; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0
; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]] ; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]]
; CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]] ; CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]]
; CHECK-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32 ; CHECK-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32
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; UNROLL-NO-IC-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8 ; UNROLL-NO-IC-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8
; UNROLL-NO-IC-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]] ; UNROLL-NO-IC-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]]
; UNROLL-NO-IC-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0 ; UNROLL-NO-IC-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0
; UNROLL-NO-IC-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]] ; UNROLL-NO-IC-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]]
; UNROLL-NO-IC-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8 ; UNROLL-NO-IC-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8
; UNROLL-NO-IC-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]]) ; UNROLL-NO-IC-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]])
; UNROLL-NO-IC-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0 ; UNROLL-NO-IC-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0
; UNROLL-NO-IC-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1 ; UNROLL-NO-IC-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1
; UNROLL-NO-IC-NEXT: [[TMP6:%.*]] = add i8 0, [[MUL_RESULT]]
; UNROLL-NO-IC-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]] ; UNROLL-NO-IC-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]]
; UNROLL-NO-IC-NEXT: [[TMP8:%.*]] = icmp slt i8 [[TMP6]], 0 ; UNROLL-NO-IC-NEXT: [[TMP8:%.*]] = icmp slt i8 [[MUL_RESULT]], 0
; UNROLL-NO-IC-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP7]], 0 ; UNROLL-NO-IC-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP7]], 0
; UNROLL-NO-IC-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]] ; UNROLL-NO-IC-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]]
; UNROLL-NO-IC-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]] ; UNROLL-NO-IC-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]]
; UNROLL-NO-IC-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255 ; UNROLL-NO-IC-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255
; UNROLL-NO-IC-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0 ; UNROLL-NO-IC-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0
; UNROLL-NO-IC-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]] ; UNROLL-NO-IC-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]]
; UNROLL-NO-IC-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]] ; UNROLL-NO-IC-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]]
; UNROLL-NO-IC-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32 ; UNROLL-NO-IC-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32
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llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll

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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8
; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0
; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]] ; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]]
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8
; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]]) ; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]])
; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0
; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1
; CHECK-NEXT: [[TMP6:%.*]] = add i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]] ; CHECK-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP8:%.*]] = icmp slt i8 [[TMP6]], 0 ; CHECK-NEXT: [[TMP8:%.*]] = icmp slt i8 [[MUL_RESULT]], 0
; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP7]], 0 ; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP7]], 0
; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]] ; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]]
; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]] ; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]]
; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255 ; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255
; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0
; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]] ; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]]
; CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]] ; CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]]
; CHECK-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32 ; CHECK-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[STEP:%.*]] to i8
; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i8 [[TMP1]], 0
; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]] ; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[TMP1]]
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP0]] to i8
; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]]) ; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP4]], i8 [[TMP5]])
; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0
; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1
; CHECK-NEXT: [[TMP6:%.*]] = add i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]] ; CHECK-NEXT: [[TMP7:%.*]] = sub i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP8:%.*]] = icmp ult i8 [[TMP6]], 0 ; CHECK-NEXT: [[TMP8:%.*]] = icmp ult i8 [[MUL_RESULT]], 0
; CHECK-NEXT: [[TMP9:%.*]] = icmp ugt i8 [[TMP7]], 0 ; CHECK-NEXT: [[TMP9:%.*]] = icmp ugt i8 [[TMP7]], 0
; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]] ; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP3]], i1 [[TMP9]], i1 [[TMP8]]
; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]] ; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP10]], [[MUL_OVERFLOW]]
; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255 ; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP0]], 255
; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP1]], 0
; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]] ; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP11]], [[TMP12]]
; CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]] ; CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]]
; CHECK-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32 ; CHECK-NEXT: [[TMP17:%.*]] = sext i8 [[TMP1]] to i32
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; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1
; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[CSTEP]] ; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[CSTEP]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[CSTEP]], 0 ; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[CSTEP]], 0
; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i8 [[TMP1]], i8 [[CSTEP]] ; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i8 [[TMP1]], i8 [[CSTEP]]
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP0]] to i8 ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP0]] to i8
; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP3]], i8 [[TMP4]]) ; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[TMP3]], i8 [[TMP4]])
; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0
; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1
; CHECK-NEXT: [[TMP5:%.*]] = add i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP6:%.*]] = sub i8 0, [[MUL_RESULT]] ; CHECK-NEXT: [[TMP6:%.*]] = sub i8 0, [[MUL_RESULT]]
; CHECK-NEXT: [[TMP7:%.*]] = icmp slt i8 [[TMP5]], 0 ; CHECK-NEXT: [[TMP7:%.*]] = icmp slt i8 [[MUL_RESULT]], 0
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i8 [[TMP6]], 0 ; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i8 [[TMP6]], 0
; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[TMP2]], i1 [[TMP8]], i1 [[TMP7]] ; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[TMP2]], i1 [[TMP8]], i1 [[TMP7]]
; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP9]], [[MUL_OVERFLOW]] ; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP9]], [[MUL_OVERFLOW]]
; CHECK-NEXT: [[TMP10:%.*]] = icmp ugt i64 [[TMP0]], 255 ; CHECK-NEXT: [[TMP10:%.*]] = icmp ugt i64 [[TMP0]], 255
; CHECK-NEXT: [[TMP11:%.*]] = icmp ne i8 [[CSTEP]], 0 ; CHECK-NEXT: [[TMP11:%.*]] = icmp ne i8 [[CSTEP]], 0
; CHECK-NEXT: [[TMP12:%.*]] = and i1 [[TMP10]], [[TMP11]] ; CHECK-NEXT: [[TMP12:%.*]] = and i1 [[TMP10]], [[TMP11]]
; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP13]], [[TMP12]] ; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP13]], [[TMP12]]
; CHECK-NEXT: br i1 [[TMP14]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK-NEXT: br i1 [[TMP14]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
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llvm/test/Transforms/LoopVersioning/wrapping-pointer-versioning.ll

Show First 20 Lines • Show All 249 Lines • ▼ Show 20 Lines
; LV-LABEL: @f3( ; LV-LABEL: @f3(
; LV-NEXT: for.body.lver.check: ; LV-NEXT: for.body.lver.check:
; LV-NEXT: [[A5:%.*]] = bitcast i16* [[A:%.*]] to i8* ; LV-NEXT: [[A5:%.*]] = bitcast i16* [[A:%.*]] to i8*
; LV-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1 ; LV-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
; LV-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32 ; LV-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
; LV-NEXT: [[MUL1:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 2, i32 [[TMP1]]) ; LV-NEXT: [[MUL1:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 2, i32 [[TMP1]])
; LV-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL1]], 0 ; LV-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL1]], 0
; LV-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL1]], 1 ; LV-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL1]], 1
; LV-NEXT: [[TMP2:%.*]] = add i32 0, [[MUL_RESULT]] ; LV-NEXT: [[TMP5:%.*]] = icmp slt i32 [[MUL_RESULT]], 0
; LV-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP2]], 0
; LV-NEXT: [[TMP8:%.*]] = or i1 [[TMP5]], [[MUL_OVERFLOW]] ; LV-NEXT: [[TMP8:%.*]] = or i1 [[TMP5]], [[MUL_OVERFLOW]]
; LV-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295 ; LV-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
; LV-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[TMP7]] ; LV-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[TMP7]]
; LV-NEXT: [[MUL2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[TMP0]]) ; LV-NEXT: [[MUL2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[TMP0]])
; LV-NEXT: [[MUL_RESULT3:%.*]] = extractvalue { i64, i1 } [[MUL2]], 0 ; LV-NEXT: [[MUL_RESULT3:%.*]] = extractvalue { i64, i1 } [[MUL2]], 0
; LV-NEXT: [[MUL_OVERFLOW4:%.*]] = extractvalue { i64, i1 } [[MUL2]], 1 ; LV-NEXT: [[MUL_OVERFLOW4:%.*]] = extractvalue { i64, i1 } [[MUL2]], 1
; LV-NEXT: [[TMP11:%.*]] = sub i64 0, [[MUL_RESULT3]] ; LV-NEXT: [[TMP11:%.*]] = sub i64 0, [[MUL_RESULT3]]
; LV-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[A5]], i64 [[MUL_RESULT3]] ; LV-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[A5]], i64 [[MUL_RESULT3]]
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