When we strip and accumulate constant offsets we need to pick the right
address space such that the offset APInt has the right bit width.
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
Comment Actions
LG, thanks. I haven't followed the opaque / typeless work, presumably there's some new API one is expected to call for them.
Comment Actions
Ping. If you land this, I can the land D112227 and confirm that it gets through the amdgpu buildbot.
llvm/lib/Transforms/IPO/AttributorAttributes.cpp | ||
---|---|---|
1227–1232 | This is only using the type to get the address space, there's nothing bad going on here |
This is only using the type to get the address space, there's nothing bad going on here