[AArch64] Optimize add/sub with immediate

[benshi001]

Summary

Optimize ([add|sub] r, imm) -> ([ADD|SUB] ([ADD|SUB] r, #imm0, lsl #12), #imm1),
if imm == (imm0<<12)+imm1. and both imm0 and imm1 are non-zero 12-bit unsigned
integers.

Optimize ([add|sub] r, imm) -> ([SUB|ADD] ([SUB|ADD] r, #imm0, lsl #12), #imm1),
if imm == -(imm0<<12)-imm1, and both imm0 and imm1 are non-zero 12-bit unsigned
integers.

[benshi001]

This patch is based on D110476 and D109963.

[benshi001]

llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp

163

These code from line 122 - 146 will be used by both visitAND and visitADDSUB, so I moved them to a new function AArch64MIPeepholeOpt::checkMovImmInstr with little modification.

[jaykang10]

+1

It would be good to wait for review from others.

[dmgreen]

Can you rebase now that D109963 has been recommitted? Thanks.

[benshi001]

In D111034#3054474, @dmgreen wrote:

Can you rebase now that D109963 has been recommitted? Thanks.

done. Rebased to the the newest revision.

[dmgreen]

Thanks. Code looks good to me.

Are there test cases anywhere for having these adds in a loop? And for negative tests where we are out of range for the transform?

llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp

157

Do we need the equivalent of this in the new code? Or i s it Ok because of the 0xffffff check at the start of splitAddSubImm?

[benshi001]

llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp

157

I do not think we need such operation, since the check in splitAddSubImm has guarenteed that.

[benshi001]

In D111034#3058375, @dmgreen wrote:

Thanks. Code looks good to me.

Are there test cases anywhere for having these adds in a loop? And for negative tests where we are out of range for the transform?

We do not have such tests, I will add three more tests,

1. add/sub 0x1ffffff, which exceeds 0xffffff;
2. add/sub 0xaaaa, which does not exceed 0xffffff, but can be composed to (add x, (mov y, 0xaaaa));
3. add/sub 0xaaaaaa inside a loop and this split optimization is blocked.

Do you think enough ?

Thank you.

[dmgreen]

In D111034#3058614, @benshi001 wrote:

In D111034#3058375, @dmgreen wrote:

Thanks. Code looks good to me.

Are there test cases anywhere for having these adds in a loop? And for negative tests where we are out of range for the transform?

We do not have such tests, I will add three more tests,

1. add/sub 0x1ffffff, which exceeds 0xffffff;
2. add/sub 0xaaaa, which does not exceed 0xffffff, but can be composed to (add x, (mov y, 0xaaaa));
3. add/sub 0xaaaaaa inside a loop and this split optimization is blocked.

Do you think enough ?

Thank you.

Yeah that sounds good to me. Thanks. If you add those, this patch LGTM.

llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp

157

OK sounds good.

[benshi001]

In D111034#3058640, @dmgreen wrote:

In D111034#3058614, @benshi001 wrote:

In D111034#3058375, @dmgreen wrote:

Thanks. Code looks good to me.

Are there test cases anywhere for having these adds in a loop? And for negative tests where we are out of range for the transform?

We do not have such tests, I will add three more tests,

1. add/sub 0x1ffffff, which exceeds 0xffffff;
2. add/sub 0xaaaa, which does not exceed 0xffffff, but can be composed to (add x, (mov y, 0xaaaa));
3. add/sub 0xaaaaaa inside a loop and this split optimization is blocked.

Do you think enough ?

Thank you.

Yeah that sounds good to me. Thanks. If you add those, this patch LGTM.

I have added three negative tests in addsub.ll, which work meet our expectation.

define i32 @add_27962026(i32 %a) {
  %b = add i32 %a, 27962026
  ret i32 %b
}

define i32 @add_65534(i32 %a) {
  %b = add i32 %a, 65534
  ret i32 %b
}

declare i32 @foox(i32)
define void @add_in_loop(i32 %0) {
  br label %2
2:
  %3 = phi i32 [ %0, %1 ], [ %5, %2 ]
  %4 = add nsw i32 %3, 11184810
  %5 = tail call i32 @foox(i32 %4) #2
  br label %2
}

[vitalybuka]

there is some compiler crash after the patch https://lab.llvm.org/buildbot/#/builders/77/builds/10553/steps/10/logs/stdio

FAILED: lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_ioctl_test.cpp.o 
/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm_build64/bin/clang++  -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/.. -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/.. -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/../.. --target=aarch64-linux-android24 --sysroot=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64/sysroot --gcc-toolchain=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64  -B/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64  -I//var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64/sysroot/usr/include/c++/v1 -Wall -Werror -std=c++14 -Wno-unused-parameter -O3 -DNDEBUG  --target=aarch64-linux-android24 --sysroot=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64/sysroot --gcc-toolchain=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -B/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -stdlib=libc++ -g -Wno-covered-switch-default -Wno-suggest-override -DGTEST_NO_LLVM_SUPPORT=1 -DGTEST_HAS_RTTI=0 -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googletest/include -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googletest -DGTEST_NO_LLVM_SUPPORT=1 -DGTEST_HAS_RTTI=0 -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googlemock/include -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googlemock -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/include -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common -fno-rtti -O2 -Werror=sign-compare -Wno-gnu-zero-variadic-macro-arguments -gline-tables-only -MD -MT lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_ioctl_test.cpp.o -MF lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_ioctl_test.cpp.o.d -o lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_ioctl_test.cpp.o -c /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/sanitizer_ioctl_test.cpp
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace, preprocessed source, and associated run script.
Stack dump:
0.	Program arguments: /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm_build64/bin/clang++ -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/.. -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/.. -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/../.. --target=aarch64-linux-android24 --sysroot=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64/sysroot --gcc-toolchain=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -B/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -I//var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64/sysroot/usr/include/c++/v1 -Wall -Werror -std=c++14 -Wno-unused-parameter -O3 -DNDEBUG --target=aarch64-linux-android24 --sysroot=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64/sysroot --gcc-toolchain=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -B/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -stdlib=libc++ -g -Wno-covered-switch-default -Wno-suggest-override -DGTEST_NO_LLVM_SUPPORT=1 -DGTEST_HAS_RTTI=0 -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googletest/include -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googletest -DGTEST_NO_LLVM_SUPPORT=1 -DGTEST_HAS_RTTI=0 -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googlemock/include -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/utils/unittest/googlemock -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/include -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common -fno-rtti -O2 -Werror=sign-compare -Wno-gnu-zero-variadic-macro-arguments -gline-tables-only -MD -MT lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_ioctl_test.cpp.o -MF lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_ioctl_test.cpp.o.d -o lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_ioctl_test.cpp.o -c /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/sanitizer_ioctl_test.cpp
1.	<eof> parser at end of file
2.	Code generation
3.	Running pass 'Function Pass Manager' on module '/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/sanitizer_ioctl_test.cpp'.
4.	Running pass 'AArch64 MI Peephole Optimization pass' on function '@_ZN25SanitizerIoctl_Fixup_Test8TestBodyEv'
 #0 0x0000000005d2c9d3 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Support/Unix/Signals.inc:565:13
 #1 0x0000000005d2a7de llvm::sys::RunSignalHandlers() /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Support/Signals.cpp:98:18
 #2 0x0000000005d2bd4d llvm::sys::CleanupOnSignal(unsigned long) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Support/Unix/Signals.inc:0:3
 #3 0x0000000005c9dcd3 (anonymous namespace)::CrashRecoveryContextImpl::HandleCrash(int, unsigned long) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Support/CrashRecoveryContext.cpp:76:5
 #4 0x0000000005c9de7e CrashRecoverySignalHandler(int) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Support/CrashRecoveryContext.cpp:390:1
 #5 0x00007ff4baee8980 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x12980)
 #6 0x0000000003bf4b20 getOpcode /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h:489:39
 #7 0x0000000003bf4b20 (anonymous namespace)::AArch64MIPeepholeOpt::checkMovImmInstr(llvm::MachineInstr&, llvm::MachineInstr*&, llvm::MachineInstr*&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:289:14
 #8 0x0000000003bf2e0b visitAND<unsigned int> /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:138:7
 #9 0x0000000003bf2e0b (anonymous namespace)::AArch64MIPeepholeOpt::runOnMachineFunction(llvm::MachineFunction&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:330:19
#10 0x000000000501896d size /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/ADT/BitVector.h:151:35
#11 0x000000000501896d operator|= /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/ADT/BitVector.h:546:9
#12 0x000000000501896d set /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/CodeGen/MachineFunction.h:186:16
#13 0x000000000501896d llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:97:11
#14 0x00000000054a1388 llvm::FPPassManager::runOnFunction(llvm::Function&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1439:27
#15 0x00000000054a9861 llvm::FPPassManager::runOnModule(llvm::Module&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1485:13
#16 0x00000000054a1b34 runOnModule /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:0:27
#17 0x00000000054a1b34 llvm::legacy::PassManagerImpl::run(llvm::Module&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:542:44
#18 0x0000000006472274 RunCodegenPipeline /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/CodeGen/BackendUtil.cpp:1507:1
#19 0x0000000006472274 EmitAssembly /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/CodeGen/BackendUtil.cpp:1536:3
#20 0x0000000006472274 clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::HeaderSearchOptions const&, clang::CodeGenOptions const&, clang::TargetOptions const&, clang::LangOptions const&, llvm::StringRef, llvm::Module*, clang::BackendAction, std::unique_ptr<llvm::raw_pwrite_stream, std::default_delete<llvm::raw_pwrite_stream> >) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/CodeGen/BackendUtil.cpp:1697:15
#21 0x00000000067bcb86 ~unique_ptr /usr/lib/gcc/x86_64-linux-gnu/7.5.0/../../../../include/c++/7.5.0/bits/unique_ptr.h:262:6
#22 0x00000000067bcb86 clang::BackendConsumer::HandleTranslationUnit(clang::ASTContext&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/CodeGen/CodeGenAction.cpp:367:7
#23 0x00000000078c1354 __normal_iterator /usr/lib/gcc/x86_64-linux-gnu/7.5.0/../../../../include/c++/7.5.0/bits/stl_iterator.h:783:20
#24 0x00000000078c1354 begin /usr/lib/gcc/x86_64-linux-gnu/7.5.0/../../../../include/c++/7.5.0/bits/stl_vector.h:564:16
#25 0x00000000078c1354 finalize<std::vector<std::unique_ptr<clang::TemplateInstantiationCallback, std::default_delete<clang::TemplateInstantiationCallback> >, std::allocator<std::unique_ptr<clang::TemplateInstantiationCallback, std::default_delete<clang::TemplateInstantiationCallback> > > > > /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/include/clang/Sema/TemplateInstCallback.h:54:16
#26 0x00000000078c1354 clang::ParseAST(clang::Sema&, bool, bool) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Parse/ParseAST.cpp:178:3
#27 0x00000000066f0190 clang::FrontendAction::Execute() /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Frontend/FrontendAction.cpp:961:10
#28 0x000000000666888f getPtr /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/Support/Error.h:273:42
#29 0x000000000666888f operator bool /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/Support/Error.h:236:16
#30 0x000000000666888f clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Frontend/CompilerInstance.cpp:1027:23
#31 0x00000000067b63d3 clang::ExecuteCompilerInvocation(clang::CompilerInstance*) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp:261:25
#32 0x0000000003a84a2d cc1_main(llvm::ArrayRef<char const*>, char const*, void*) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/tools/driver/cc1_main.cpp:246:15
#33 0x0000000003a824cd ExecuteCC1Tool(llvm::SmallVectorImpl<char const*>&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/tools/driver/driver.cpp:317:12
#34 0x00000000064f94a2 operator() /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Driver/Job.cpp:405:30
#35 0x00000000064f94a2 void llvm::function_ref<void ()>::callback_fn<clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef> >, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >*, bool*) const::$_1>(long) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/ADT/STLExtras.h:177:12
#36 0x0000000005c9dbe7 operator() /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/ADT/STLExtras.h:0:12
#37 0x0000000005c9dbe7 llvm::CrashRecoveryContext::RunSafely(llvm::function_ref<void ()>) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/lib/Support/CrashRecoveryContext.cpp:425:3
#38 0x00000000064f8ff7 clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef> >, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >*, bool*) const /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Driver/Job.cpp:405:7
#39 0x00000000064c3a88 clang::driver::Compilation::ExecuteCommand(clang::driver::Command const&, clang::driver::Command const*&) const /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Driver/Compilation.cpp:196:15
#40 0x00000000064c3d57 clang::driver::Compilation::ExecuteJobs(clang::driver::JobList const&, llvm::SmallVectorImpl<std::pair<int, clang::driver::Command const*> >&) const /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Driver/Compilation.cpp:249:13
#41 0x00000000064dbf81 empty /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/llvm/include/llvm/ADT/SmallVector.h:73:47
#42 0x00000000064dbf81 clang::driver::Driver::ExecuteCompilation(clang::driver::Compilation&, llvm::SmallVectorImpl<std::pair<int, clang::driver::Command const*> >&) /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/lib/Driver/Driver.cpp:1553:23
#43 0x0000000003a819dd main /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/clang/tools/driver/driver.cpp:489:21
#44 0x00007ff4b9974bf7 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x21bf7)
#45 0x0000000003a7f1da _start (/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm_build64/bin/clang+++0x3a7f1da)
clang-14: error: clang frontend command failed with exit code 139 (use -v to see invocation)
clang version 14.0.0 (https://github.com/llvm/llvm-project.git 9bf6bef9951a1c230796ccad2c5c0195ce4c4dff)
Target: aarch64-unknown-linux-android24
Thread model: posix
InstalledDir: /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm_build64/bin
clang-14: note: diagnostic msg: 
********************
PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
Preprocessed source(s) and associated run script(s) are located at:
clang-14: note: diagnostic msg: /tmp/sanitizer_ioctl_test-bd2cdc.cpp
clang-14: note: diagnostic msg: /tmp/sanitizer_ioctl_test-bd2cdc.sh
clang-14: note: diagnostic msg: 
********************
[196/492] Building CXX object lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_flat_map_test.cpp.o
[197/492] Building CXX object lib/sanitizer_common/tests/CMakeFiles/SanitizerTest.dir/sanitizer_nolibc_test.cpp.o
[198/492] Building CXX object lib

[benshi001]

I have reverted and will fix it.

[benshi001]

This is blame from Linaro

[TCWG CI] Regression caused by llvm: [AArch64] Optimize add/sub with immediate:
commit 9bf6bef9951a1c230796ccad2c5c0195ce4c4dff
Author: Ben Shi <[e-mail]>

    [AArch64] Optimize add/sub with immediate

Results regressed to
# reset_artifacts:
-10
# build_abe binutils:
-9
# build_llvm:
-5
# build_abe qemu:
-2
# linux_n_obj:
6333
# First few build errors in logs:
# 00:01:55 clang-14: error: unable to execute command: Aborted (core dumped)
# 00:01:55 clang-14: error: clang frontend command failed due to signal (use -v to see invocation)
# 00:01:56 make[2]: *** [scripts/Makefile.build:280: kernel/power/swap.o] Error 254
# 00:02:02 make[1]: *** [scripts/Makefile.build:497: kernel/power] Error 2
# 00:04:03 clang-14: error: unable to execute command: Segmentation fault (core dumped)
# 00:04:03 clang-14: error: clang frontend command failed due to signal (use -v to see invocation)
# 00:04:03 make[3]: *** [scripts/Makefile.build:280: drivers/pci/controller/pcie-rockchip-host.o] Error 254
# 00:04:07 make[2]: *** [scripts/Makefile.build:497: drivers/pci/controller] Error 2
# 00:05:13 make: *** [Makefile:1822: kernel] Error 2
# 00:05:29 make[1]: *** [scripts/Makefile.build:497: drivers/pci] Error 2

from
# reset_artifacts:
-10
# build_abe binutils:
-9
# build_llvm:
-5
# build_abe qemu:
-2
# linux_n_obj:
7114
# linux build successful:
all
# linux boot successful:
boot

THIS IS THE END OF INTERESTING STUFF.  BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.

This commit has regressed these CI configurations:
 - tcwg_kernel/llvm-master-aarch64-lts-defconfig

First_bad build: https://ci.linaro.org/job/tcwg_kernel-llvm-bisect-llvm-master-aarch64-lts-defconfig/7/artifact/artifacts/build-9bf6bef9951a1c230796ccad2c5c0195ce4c4dff/
Last_good build: https://ci.linaro.org/job/tcwg_kernel-llvm-bisect-llvm-master-aarch64-lts-defconfig/7/artifact/artifacts/build-f0711106dc6c14dcaf06437a0467043e983bf9dc/
Baseline build: https://ci.linaro.org/job/tcwg_kernel-llvm-bisect-llvm-master-aarch64-lts-defconfig/7/artifact/artifacts/build-baseline/
Even more details: https://ci.linaro.org/job/tcwg_kernel-llvm-bisect-llvm-master-aarch64-lts-defconfig/7/artifact/artifacts/

Reproduce builds:
<cut>
mkdir investigate-llvm-9bf6bef9951a1c230796ccad2c5c0195ce4c4dff
cd investigate-llvm-9bf6bef9951a1c230796ccad2c5c0195ce4c4dff

# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts

# Fetch manifests and test.sh script
mkdir -p artifacts/manifests
curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-llvm-bisect-llvm-master-aarch64-lts-defconfig/7/artifact/artifacts/manifests/build-baseline.sh --fail
curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-llvm-bisect-llvm-master-aarch64-lts-defconfig/7/artifact/artifacts/manifests/build-parameters.sh --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-llvm-bisect-llvm-master-aarch64-lts-defconfig/7/artifact/artifacts/test.sh --fail
chmod +x artifacts/test.sh

# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh

# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/

cd llvm

# Reproduce first_bad build
git checkout --detach 9bf6bef9951a1c230796ccad2c5c0195ce4c4dff
../artifacts/test.sh

# Reproduce last_good build
git checkout --detach f0711106dc6c14dcaf06437a0467043e983bf9dc
../artifacts/test.sh

cd ..
</cut>

Full commit (up to 1000 lines):
<cut>
commit 9bf6bef9951a1c230796ccad2c5c0195ce4c4dff
Author: Ben Shi <[e-mail]>
Date:   Tue Oct 12 09:03:16 2021 +0000

    [AArch64] Optimize add/sub with immediate
    
    Optimize ([add|sub] r, imm) -> ([ADD|SUB] ([ADD|SUB] r, #imm0, lsl #12), #imm1),
    if imm == (imm0<<12)+imm1. and both imm0 and imm1 are non-zero 12-bit unsigned
    integers.
    
    Optimize ([add|sub] r, imm) -> ([SUB|ADD] ([SUB|ADD] r, #imm0, lsl #12), #imm1),
    if imm == -(imm0<<12)-imm1, and both imm0 and imm1 are non-zero 12-bit unsigned
    integers.
    
    Reviewed By: jaykang10, dmgreen
    
    Differential Revision: https://reviews.llvm.org/D111034
---
 llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp   | 188 ++++++++++++++++++---
 llvm/test/CodeGen/AArch64/addsub.ll                |  96 +++++++----
 .../CodeGenPrepare/AArch64/large-offset-gep.ll     |   5 +-
 3 files changed, 229 insertions(+), 60 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
index d091c8fd6a03..9ff92e6a2201 100644
--- a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
@@ -11,10 +11,17 @@
 // 1. MOVi32imm + ANDWrr ==> ANDWri + ANDWri
 //    MOVi64imm + ANDXrr ==> ANDXri + ANDXri
 //
+// 2. MOVi32imm + ADDWrr ==> ADDWRi + ADDWRi
+//    MOVi64imm + ADDXrr ==> ANDXri + ANDXri
+//
+// 3. MOVi32imm + SUBWrr ==> SUBWRi + SUBWRi
+//    MOVi64imm + SUBXrr ==> SUBXri + SUBXri
+//
 //    The mov pseudo instruction could be expanded to multiple mov instructions
 //    later. In this case, we could try to split the constant  operand of mov
-//    instruction into two bitmask immediates. It makes two AND instructions
-//    intead of multiple `mov` + `and` instructions.
+//    instruction into two immediates which can be directly encoded into
+//    *Wri/*Xri instructions. It makes two AND/ADD/SUB instructions instead of
+//    multiple `mov` + `and/add/sub` instructions.
 //===----------------------------------------------------------------------===//
 
 #include "AArch64ExpandImm.h"
@@ -41,6 +48,13 @@ struct AArch64MIPeepholeOpt : public MachineFunctionPass {
   MachineLoopInfo *MLI;
   MachineRegisterInfo *MRI;
 
+  bool checkMovImmInstr(MachineInstr &MI, MachineInstr *&MovMI,
+                        MachineInstr *&SubregToRegMI);
+
+  template <typename T>
+  bool visitADDSUB(MachineInstr &MI,
+                   SmallSetVector<MachineInstr *, 8> &ToBeRemoved, bool IsAdd);
+
   template <typename T>
   bool visitAND(MachineInstr &MI,
                 SmallSetVector<MachineInstr *, 8> &ToBeRemoved);
@@ -119,31 +133,9 @@ bool AArch64MIPeepholeOpt::visitAND(
   assert((RegSize == 32 || RegSize == 64) &&
          "Invalid RegSize for AND bitmask peephole optimization");
 
-  // Check whether AND's MBB is in loop and the AND is loop invariant.
-  MachineBasicBlock *MBB = MI.getParent();
-  MachineLoop *L = MLI->getLoopFor(MBB);
-  if (L && !L->isLoopInvariant(MI))
-    return false;
-
-  // Check whether AND's operand is MOV with immediate.
-  MachineInstr *MovMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg());
-  MachineInstr *SubregToRegMI = nullptr;
-  // If it is SUBREG_TO_REG, check its operand.
-  if (MovMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) {
-    SubregToRegMI = MovMI;
-    MovMI = MRI->getUniqueVRegDef(MovMI->getOperand(2).getReg());
-  }
-
-  if (MovMI->getOpcode() != AArch64::MOVi32imm &&
-      MovMI->getOpcode() != AArch64::MOVi64imm)
-    return false;
-
-  // If the MOV has multiple uses, do not split the immediate because it causes
-  // more instructions.
-  if (!MRI->hasOneUse(MovMI->getOperand(0).getReg()))
-    return false;
-
-  if (SubregToRegMI && !MRI->hasOneUse(SubregToRegMI->getOperand(0).getReg()))
+  // Perform several essential checks against current MI.
+  MachineInstr *MovMI, *SubregToRegMI;
+  if (!checkMovImmInstr(MI, MovMI, SubregToRegMI))
     return false;
 
   // Split the bitmask immediate into two.
@@ -160,6 +152,7 @@ bool AArch64MIPeepholeOpt::visitAND(
 
   // Create new AND MIs.
   DebugLoc DL = MI.getDebugLoc();
+  MachineBasicBlock *MBB = MI.getParent();
   const TargetRegisterClass *ANDImmRC =
       (RegSize == 32) ? &AArch64::GPR32spRegClass : &AArch64::GPR64spRegClass;
   Register DstReg = MI.getOperand(0).getReg();
@@ -185,6 +178,135 @@ bool AArch64MIPeepholeOpt::visitAND(
   return true;
 }
 
+template <typename T>
+static bool splitAddSubImm(T Imm, unsigned RegSize, T &Imm0, T &Imm1) {
+  // The immediate must be in the form of ((imm0 << 12) + imm1), in which both
+  // imm0 and imm1 are non-zero 12-bit unsigned int.
+  if ((Imm & 0xfff000) == 0 || (Imm & 0xfff) == 0 ||
+      (Imm & ~static_cast<T>(0xffffff)) != 0)
+    return false;
+
+  // The immediate can not be composed via a single instruction.
+  SmallVector<AArch64_IMM::ImmInsnModel, 4> Insn;
+  AArch64_IMM::expandMOVImm(Imm, RegSize, Insn);
+  if (Insn.size() == 1)
+    return false;
+
+  // Split Imm into (Imm0 << 12) + Imm1;
+  Imm0 = (Imm >> 12) & 0xfff;
+  Imm1 = Imm & 0xfff;
+  return true;
+}
+
+template <typename T>
+bool AArch64MIPeepholeOpt::visitADDSUB(
+    MachineInstr &MI, SmallSetVector<MachineInstr *, 8> &ToBeRemoved,
+    bool IsAdd) {
+  // Try below transformation.
+  //
+  // MOVi32imm + ADDWrr ==> ANDWri + ANDWri
+  // MOVi64imm + ADDXrr ==> ANDXri + ANDXri
+  //
+  // MOVi32imm + SUBWrr ==> SUBWri + SUBWri
+  // MOVi64imm + SUBXrr ==> SUBXri + SUBXri
+  //
+  // The mov pseudo instruction could be expanded to multiple mov instructions
+  // later. Let's try to split the constant operand of mov instruction into two
+  // legal add/sub immediates. It makes only two ADD/SUB instructions intead of
+  // multiple `mov` + `and/sub` instructions.
+
+  unsigned RegSize = sizeof(T) * 8;
+  assert((RegSize == 32 || RegSize == 64) &&
+         "Invalid RegSize for legal add/sub immediate peephole optimization");
+
+  // Perform several essential checks against current MI.
+  MachineInstr *MovMI, *SubregToRegMI;
+  if (!checkMovImmInstr(MI, MovMI, SubregToRegMI))
+    return false;
+
+  // Split the immediate to Imm0 and Imm1, and calculate the Opcode.
+  T Imm = static_cast<T>(MovMI->getOperand(1).getImm()), Imm0, Imm1;
+  unsigned Opcode;
+  if (splitAddSubImm(Imm, RegSize, Imm0, Imm1)) {
+    if (IsAdd)
+      Opcode = RegSize == 32 ? AArch64::ADDWri : AArch64::ADDXri;
+    else
+      Opcode = RegSize == 32 ? AArch64::SUBWri : AArch64::SUBXri;
+  } else if (splitAddSubImm(-Imm, RegSize, Imm0, Imm1)) {
+    if (IsAdd)
+      Opcode = RegSize == 32 ? AArch64::SUBWri : AArch64::SUBXri;
+    else
+      Opcode = RegSize == 32 ? AArch64::ADDWri : AArch64::ADDXri;
+  } else {
+    return false;
+  }
+
+  // Create new ADD/SUB MIs.
+  DebugLoc DL = MI.getDebugLoc();
+  MachineBasicBlock *MBB = MI.getParent();
+  const TargetRegisterClass *RC =
+      (RegSize == 32) ? &AArch64::GPR32spRegClass : &AArch64::GPR64spRegClass;
+  Register DstReg = MI.getOperand(0).getReg();
+  Register SrcReg = MI.getOperand(1).getReg();
+  Register TmpReg = MRI->createVirtualRegister(RC);
+
+  MRI->constrainRegClass(SrcReg, RC);
+  BuildMI(*MBB, MI, DL, TII->get(Opcode), TmpReg)
+      .addReg(SrcReg)
+      .addImm(Imm0)
+      .addImm(12);
+
+  MRI->constrainRegClass(DstReg, RC);
+  BuildMI(*MBB, MI, DL, TII->get(Opcode), DstReg)
+      .addReg(TmpReg)
+      .addImm(Imm1)
+      .addImm(0);
+
+  // Record the MIs need to be removed.
+  ToBeRemoved.insert(&MI);
+  if (SubregToRegMI)
+    ToBeRemoved.insert(SubregToRegMI);
+  ToBeRemoved.insert(MovMI);
+
+  return true;
+}
+
+// Checks if the corresponding MOV immediate instruction is applicable for
+// this peephole optimization.
+bool AArch64MIPeepholeOpt::checkMovImmInstr(MachineInstr &MI,
+                                            MachineInstr *&MovMI,
+                                            MachineInstr *&SubregToRegMI) {
+  // Check whether current MI is in loop and is loop invariant.
+  MachineBasicBlock *MBB = MI.getParent();
+  MachineLoop *L = MLI->getLoopFor(MBB);
+  if (L && !L->isLoopInvariant(MI))
+    return false;
+
+  // Check whether current MI's operand is MOV with immediate.
+  MovMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg());
+  SubregToRegMI = nullptr;
+  // If it is SUBREG_TO_REG, check its operand.
+  if (MovMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) {
+    SubregToRegMI = MovMI;
+    MovMI = MRI->getUniqueVRegDef(MovMI->getOperand(2).getReg());
+  }
+
+  if (MovMI->getOpcode() != AArch64::MOVi32imm &&
+      MovMI->getOpcode() != AArch64::MOVi64imm)
+    return false;
+
+  // If the MOV has multiple uses, do not split the immediate because it causes
+  // more instructions.
+  if (!MRI->hasOneUse(MovMI->getOperand(0).getReg()))
+    return false;
+
+  if (SubregToRegMI && !MRI->hasOneUse(SubregToRegMI->getOperand(0).getReg()))
+    return false;
+
+  // It is OK to perform this peephole optimization.
+  return true;
+}
+
 bool AArch64MIPeepholeOpt::runOnMachineFunction(MachineFunction &MF) {
   if (skipFunction(MF.getFunction()))
     return false;
@@ -210,6 +332,18 @@ bool AArch64MIPeepholeOpt::runOnMachineFunction(MachineFunction &MF) {
       case AArch64::ANDXrr:
         Changed = visitAND<uint64_t>(MI, ToBeRemoved);
         break;
+      case AArch64::ADDWrr:
+        Changed = visitADDSUB<uint32_t>(MI, ToBeRemoved, true);
+        break;
+      case AArch64::SUBWrr:
+        Changed = visitADDSUB<uint32_t>(MI, ToBeRemoved, false);
+        break;
+      case AArch64::ADDXrr:
+        Changed = visitADDSUB<uint64_t>(MI, ToBeRemoved, true);
+        break;
+      case AArch64::SUBXrr:
+        Changed = visitADDSUB<uint64_t>(MI, ToBeRemoved, false);
+        break;
       }
     }
   }
diff --git a/llvm/test/CodeGen/AArch64/addsub.ll b/llvm/test/CodeGen/AArch64/addsub.ll
index f0857fe2d966..37c9e4c5c6fe 100644
--- a/llvm/test/CodeGen/AArch64/addsub.ll
+++ b/llvm/test/CodeGen/AArch64/addsub.ll
@@ -152,9 +152,8 @@ define void @sub_med() {
 define i64 @add_two_parts_imm_i64(i64 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i64:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    add x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = add i64 %a, 11183445
   ret i64 %b
@@ -163,9 +162,8 @@ define i64 @add_two_parts_imm_i64(i64 %a) {
 define i32 @add_two_parts_imm_i32(i32 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i32:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    add w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = add i32 %a, 11183445
   ret i32 %b
@@ -174,9 +172,8 @@ define i32 @add_two_parts_imm_i32(i32 %a) {
 define i64 @add_two_parts_imm_i64_neg(i64 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i64_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-42325
-; CHECK-NEXT:    movk x8, #65365, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    sub x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = add i64 %a, -11183445
   ret i64 %b
@@ -185,9 +182,8 @@ define i64 @add_two_parts_imm_i64_neg(i64 %a) {
 define i32 @add_two_parts_imm_i32_neg(i32 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i32_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #23211
-; CHECK-NEXT:    movk w8, #65365, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    sub w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = add i32 %a, -11183445
   ret i32 %b
@@ -196,9 +192,8 @@ define i32 @add_two_parts_imm_i32_neg(i32 %a) {
 define i64 @sub_two_parts_imm_i64(i64 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i64:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-42325
-; CHECK-NEXT:    movk x8, #65365, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    sub x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i64 %a, 11183445
   ret i64 %b
@@ -207,9 +202,8 @@ define i64 @sub_two_parts_imm_i64(i64 %a) {
 define i32 @sub_two_parts_imm_i32(i32 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i32:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #23211
-; CHECK-NEXT:    movk w8, #65365, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    sub w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i32 %a, 11183445
   ret i32 %b
@@ -218,9 +212,8 @@ define i32 @sub_two_parts_imm_i32(i32 %a) {
 define i64 @sub_two_parts_imm_i64_neg(i64 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i64_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    add x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i64 %a, -11183445
   ret i64 %b
@@ -229,14 +222,57 @@ define i64 @sub_two_parts_imm_i64_neg(i64 %a) {
 define i32 @sub_two_parts_imm_i32_neg(i32 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i32_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    add w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i32 %a, -11183445
   ret i32 %b
 }
 
+define i32 @add_27962026(i32 %a) {
+; CHECK-LABEL: add_27962026:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #43690
+; CHECK-NEXT:    movk w8, #426, lsl #16
+; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    ret
+  %b = add i32 %a, 27962026
+  ret i32 %b
+}
+
+define i32 @add_65534(i32 %a) {
+; CHECK-LABEL: add_65534:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #65534
+; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    ret
+  %b = add i32 %a, 65534
+  ret i32 %b
+}
+
+declare i32 @foox(i32)
+
+define void @add_in_loop(i32 %0) {
+; CHECK-LABEL: add_in_loop:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w30, -16
+; CHECK-NEXT:    mov w19, #43690
+; CHECK-NEXT:    movk w19, #170, lsl #16
+; CHECK-NEXT:  .LBB15_1: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    add w0, w0, w19
+; CHECK-NEXT:    bl foox
+; CHECK-NEXT:    b .LBB15_1
+  br label %2
+2:
+  %3 = phi i32 [ %0, %1 ], [ %5, %2 ]
+  %4 = add nsw i32 %3, 11184810
+  %5 = tail call i32 @foox(i32 %4) #2
+  br label %2
+}
+
 define void @testing() {
 ; CHECK-LABEL: testing:
 ; CHECK:       // %bb.0:
@@ -244,7 +280,7 @@ define void @testing() {
 ; CHECK-NEXT:    ldr x8, [x8, :got_lo12:var_i32]
 ; CHECK-NEXT:    ldr w9, [x8]
 ; CHECK-NEXT:    cmp w9, #4095
-; CHECK-NEXT:    b.ne .LBB13_6
+; CHECK-NEXT:    b.ne .LBB16_6
 ; CHECK-NEXT:  // %bb.1: // %test2
 ; CHECK-NEXT:    adrp x10, :got:var2_i32
 ; CHECK-NEXT:    add w11, w9, #1
@@ -252,26 +288,26 @@ define void @testing() {
 ; CHECK-NEXT:    str w11, [x8]
 ; CHECK-NEXT:    ldr w10, [x10]
 ; CHECK-NEXT:    cmp w10, #3567, lsl #12 // =14610432
-; CHECK-NEXT:    b.lo .LBB13_6
+; CHECK-NEXT:    b.lo .LBB16_6
 ; CHECK-NEXT:  // %bb.2: // %test3
 ; CHECK-NEXT:    add w11, w9, #2
 ; CHECK-NEXT:    cmp w9, #123
 ; CHECK-NEXT:    str w11, [x8]
-; CHECK-NEXT:    b.lt .LBB13_6
+; CHECK-NEXT:    b.lt .LBB16_6
 ; CHECK-NEXT:  // %bb.3: // %test4
 ; CHECK-NEXT:    add w11, w9, #3
 ; CHECK-NEXT:    cmp w10, #321
 ; CHECK-NEXT:    str w11, [x8]
-; CHECK-NEXT:    b.gt .LBB13_6
+; CHECK-NEXT:    b.gt .LBB16_6
 ; CHECK-NEXT:  // %bb.4: // %test5
 ; CHECK-NEXT:    add w11, w9, #4
 ; CHECK-NEXT:    cmn w10, #443
 ; CHECK-NEXT:    str w11, [x8]
-; CHECK-NEXT:    b.ge .LBB13_6
+; CHECK-NEXT:    b.ge .LBB16_6
 ; CHECK-NEXT:  // %bb.5: // %test6
 ; CHECK-NEXT:    add w9, w9, #5
 ; CHECK-NEXT:    str w9, [x8]
-; CHECK-NEXT:  .LBB13_6: // %common.ret
+; CHECK-NEXT:  .LBB16_6: // %common.ret
 ; CHECK-NEXT:    ret
   %val = load i32, i32* @var_i32
   %val2 = load i32, i32* @var2_i32
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
index 1c587080f4b6..97e877211b12 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
@@ -214,10 +214,9 @@ define void @test5([65536 x i32]** %s, i32 %n) {
 ; CHECK-LABEL: test5:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    ldr x9, [x0]
-; CHECK-NEXT:    mov w10, #14464
-; CHECK-NEXT:    movk w10, #1, lsl #16
 ; CHECK-NEXT:    mov w8, wzr
-; CHECK-NEXT:    add x9, x9, x10
+; CHECK-NEXT:    add x9, x9, #19, lsl #12 // =77824
+; CHECK-NEXT:    add x9, x9, #2176
 ; CHECK-NEXT:    cmp w8, w1
 ; CHECK-NEXT:    b.ge .LBB4_2
 ; CHECK-NEXT:  .LBB4_1: // %while_body
</cut>

[jaykang10]

Sorry, my patch could cause the problem. I have pushed a bug patch https://reviews.llvm.org/D109963.
Please wait a couple of days to verify the bug patch and then rebase your patch.

[benshi001]

In D111034#3069427, @jaykang10 wrote:

Sorry, my patch could cause the problem. I have pushed a bug patch https://reviews.llvm.org/D109963.
Please wait a couple of days to verify the bug patch and then rebase your patch.

I have rebased on your newest code and uploaded my patch, it works without any crashes on my localhost.

So if there is no concerns within several days, I will commit my new patch and wait for blames (if there will be). ^_^

[jaykang10]

In D111034#3099847, @benshi001 wrote:

In D111034#3069427, @jaykang10 wrote:

Sorry, my patch could cause the problem. I have pushed a bug patch https://reviews.llvm.org/D109963.
Please wait a couple of days to verify the bug patch and then rebase your patch.

I have rebased on your newest code and uploaded my patch, it works without any crashes on my localhost.

So if there is no concerns within several days, I will commit my new patch and wait for blames (if there will be). ^_^

Thanks for rebase and sorry for adding more codes to the pass.

If possible, please check the bootstrap build and check-all on AArch64 machine to minimize the possibility of errors from AArch64 crews side. If you already did it, I am +1. :)

[benshi001]

In D111034#3099892, @jaykang10 wrote:

In D111034#3099847, @benshi001 wrote:

In D111034#3069427, @jaykang10 wrote:

Sorry, my patch could cause the problem. I have pushed a bug patch https://reviews.llvm.org/D109963.
Please wait a couple of days to verify the bug patch and then rebase your patch.

I have rebased on your newest code and uploaded my patch, it works without any crashes on my localhost.

So if there is no concerns within several days, I will commit my new patch and wait for blames (if there will be). ^_^

Thanks for rebase and sorry for adding more codes to the pass.

If possible, please check the bootstrap build and check-all on AArch64 machine to minimize the possibility of errors from AArch64 crews side. If you already did it, I am +1. :)

I do not have an aarch64 machine, maybe I need to buy a raspberry-pi or macbook pro m1 for that. :)

[jaykang10]

In D111034#3099926, @benshi001 wrote:

In D111034#3099892, @jaykang10 wrote:

In D111034#3099847, @benshi001 wrote:

In D111034#3069427, @jaykang10 wrote:

Sorry, my patch could cause the problem. I have pushed a bug patch https://reviews.llvm.org/D109963.
Please wait a couple of days to verify the bug patch and then rebase your patch.

I have rebased on your newest code and uploaded my patch, it works without any crashes on my localhost.

So if there is no concerns within several days, I will commit my new patch and wait for blames (if there will be). ^_^

Thanks for rebase and sorry for adding more codes to the pass.

If possible, please check the bootstrap build and check-all on AArch64 machine to minimize the possibility of errors from AArch64 crews side. If you already did it, I am +1. :)

I do not have an aarch64 machine, maybe I need to buy a raspberry-pi or macbook pro m1 for that. :)

Ah, ok. @DavidSpickett mentioned to use docker on https://reviews.llvm.org/D109963 as below.

If you have docker:

$ docker pull linaro/ci-arm64-tcwg-llvmbot-ubuntu:bionic
$ docker run -it --entrypoint=/bin/bash linaro/ci-arm64-tcwg-llvmbot-ubuntu:bionic
root@a9e83ff71f75:/# export CC=/usr/local/clang+llvm-12.0.0-aarch64-linux-gnu/bin/clang
root@a9e83ff71f75:/# export CXX=/usr/local/clang+llvm-12.0.0-aarch64-linux-gnu/bin/clang++
<follow commands from the buildbot page>
I suggest following https://lab.llvm.org/buildbot/#/builders/179/builds/1234 because it's the simplest. (not by much, it just doesn't use lld)

[benshi001]

In D111034#3099970, @jaykang10 wrote:

In D111034#3099926, @benshi001 wrote:

In D111034#3099892, @jaykang10 wrote:

In D111034#3099847, @benshi001 wrote:

In D111034#3069427, @jaykang10 wrote:

Sorry, my patch could cause the problem. I have pushed a bug patch https://reviews.llvm.org/D109963.
Please wait a couple of days to verify the bug patch and then rebase your patch.

I have rebased on your newest code and uploaded my patch, it works without any crashes on my localhost.

So if there is no concerns within several days, I will commit my new patch and wait for blames (if there will be). ^_^

Thanks for rebase and sorry for adding more codes to the pass.

If possible, please check the bootstrap build and check-all on AArch64 machine to minimize the possibility of errors from AArch64 crews side. If you already did it, I am +1. :)

I do not have an aarch64 machine, maybe I need to buy a raspberry-pi or macbook pro m1 for that. :)

Ah, ok. @DavidSpickett mentioned to use docker on https://reviews.llvm.org/D109963 as below.

If you have docker:

$ docker pull linaro/ci-arm64-tcwg-llvmbot-ubuntu:bionic
$ docker run -it --entrypoint=/bin/bash linaro/ci-arm64-tcwg-llvmbot-ubuntu:bionic
root@a9e83ff71f75:/# export CC=/usr/local/clang+llvm-12.0.0-aarch64-linux-gnu/bin/clang
root@a9e83ff71f75:/# export CXX=/usr/local/clang+llvm-12.0.0-aarch64-linux-gnu/bin/clang++
<follow commands from the buildbot page>
I suggest following https://lab.llvm.org/buildbot/#/builders/179/builds/1234 because it's the simplest. (not by much, it just doesn't use lld)

I am not familiar with docker, but I guess I still need a real physical aarch64 machine ?

ben.shi@BJDT046:~$ docker run -it --entrypoint=/bin/bash linaro/ci-arm64-tcwg-llvmbot-ubuntu:bionic

WARNING: The requested image's platform (linux/arm64) does not match the detected host platform (linux/amd64) and no specific platform was requested
standard_init_linux.go:228: exec user process caused: no such file or directory

I tried to pull and launch your suggested docker image on an amd64-linux desktop.

[benshi001]

In D111034#3099892, @jaykang10 wrote:

In D111034#3099847, @benshi001 wrote:

In D111034#3069427, @jaykang10 wrote:

Sorry, my patch could cause the problem. I have pushed a bug patch https://reviews.llvm.org/D109963.
Please wait a couple of days to verify the bug patch and then rebase your patch.

I have rebased on your newest code and uploaded my patch, it works without any crashes on my localhost.

So if there is no concerns within several days, I will commit my new patch and wait for blames (if there will be). ^_^

Thanks for rebase and sorry for adding more codes to the pass.

If possible, please check the bootstrap build and check-all on AArch64 machine to minimize the possibility of errors from AArch64 crews side. If you already did it, I am +1. :)

I have tested on RaspberryPi-4, there were two failures, but they seemed not related to my patch. So I will directly push my patch again.

******************** TEST 'SanitizerCommon-msan-aarch64-Linux :: Posix/lstat.cpp' FAILED ********************
Script:
--
: 'RUN: at line 1';      /home/ben/llvm-project/build/./bin/clang  --driver-mode=g++ -gline-tables-only -fsanitize=memory    -funwind-tables  -ldl -O0 -g /home/ben/llvm-project/compiler-rt/test/sanitizer_common/TestCases/Posix/lstat.cpp -o /home/ben/llvm-project/build/projects/compiler-rt/test/sanitizer_common/msan-aarch64-Linux/Posix/Output/lstat.cpp.tmp &&  /home/ben/llvm-project/build/projects/compiler-rt/test/sanitizer_common/msan-aarch64-Linux/Posix/Output/lstat.cpp.tmp
--
Exit Code: 1

Command Output (stderr):
--
==1800722==WARNING: MemorySanitizer: use-of-uninitialized-value
    #0 0xaaaad5cd0154 in main /home/ben/llvm-project/compiler-rt/test/sanitizer_common/TestCases/Posix/lstat.cpp:14:3
    #1 0xffff8d5bc9d0 in __libc_start_main csu/../csu/libc-start.c:332:16
    #2 0xaaaad5c42cf4 in _start (/home/ben/llvm-project/build/projects/compiler-rt/test/sanitizer_common/msan-aarch64-Linux/Posix/Output/lstat.cpp.tmp+0x22cf4)

SUMMARY: MemorySanitizer: use-of-uninitialized-value /home/ben/llvm-project/compiler-rt/test/sanitizer_common/TestCases/Posix/lstat.cpp:14:3 in main
Exiting

Another failure was

******************** TEST 'AddressSanitizer-Unit :: ./Asan-aarch64-inline-Test/AddressSanitizer.HugeMallocTest' FAILED ********************
Script:
--
/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/./Asan-aarch64-inline-Test --gtest_filter=AddressSanitizer.HugeMallocTest
--
Note: Google Test filter = AddressSanitizer.HugeMallocTest
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from AddressSanitizer
[ RUN      ] AddressSanitizer.HugeMallocTest
/home/ben/llvm-project/compiler-rt/lib/asan/tests/asan_test.cpp:333: Failure
Death test: Ident((char*)malloc(n_megs << 20))[-1] = 0
    Result: died but not with expected error.
  Expected: contains regular expression "is located 1 bytes to the left|AddressSanitizer failed to allocate"
Actual msg:
[  DEATH   ] =================================================================
[  DEATH   ] ==1495343==ERROR: AddressSanitizer: allocator is out of memory trying to allocate 0x100400000 bytes
[  DEATH   ]     #0 0x4df25c  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x4df25c)
[  DEATH   ]     #1 0x5e4a94  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x5e4a94)
[  DEATH   ]     #2 0x59cfbc  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x59cfbc)
[  DEATH   ]     #3 0x53d1e4  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x53d1e4)
[  DEATH   ]     #4 0x540b50  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x540b50)
[  DEATH   ]     #5 0x54208c  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x54208c)
[  DEATH   ]     #6 0x568174  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x568174)
[  DEATH   ]     #7 0x59f0d4  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x59f0d4)
[  DEATH   ]     #8 0x5671ac  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x5671ac)
[  DEATH   ]     #9 0x6b8d20  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x6b8d20)
[  DEATH   ]     #10 0xffffa3d7c9d0  (/lib/aarch64-linux-gnu/libc.so.6+0x249d0)
[  DEATH   ]     #11 0x447b34  (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x447b34)
[  DEATH   ]
[  DEATH   ] ==1495343==HINT: if you don't care about these errors you may set allocator_may_return_null=1
[  DEATH   ] SUMMARY: AddressSanitizer: out-of-memory (/home/ben/llvm-project/build/projects/compiler-rt/lib/asan/tests/AARCH64LinuxConfig/Asan-aarch64-inline-Test+0x4df25c)
[  DEATH   ] ==1495343==ABORTING
[  DEATH   ]
[  FAILED  ] AddressSanitizer.HugeMallocTest (67 ms)
[----------] 1 test from AddressSanitizer (68 ms total)

[----------] Global test environment tear-down
[==========] 1 test from 1 test suite ran. (70 ms total)
[  PASSED  ] 0 tests.
[  FAILED  ] 1 test, listed below:
[  FAILED  ] AddressSanitizer.HugeMallocTest

 1 FAILED TEST

[benshi001]

Sorry, there is still a failure https://lab.llvm.org/buildbot/#/builders/179/builds/1577/steps/11/logs/stdio ,
it seems I have to revert for a second time.

:AArch64MIPeepholeOpt::checkMovImmInstr(llvm::MachineInstr&, llvm::MachineInstr*&, llvm::MachineInstr*&) AArch64MIPeepholeOpt.cpp:0:0
#13 0x0000000000b1b1bc bool (anonymous namespace)::AArch64MIPeepholeOpt::visitADDSUB<unsigned long>(llvm::MachineInstr&, llvm::SmallSetVector<llvm::MachineInstr*, 8u>&, bool) AArch64MIPeepholeOpt.cpp:0:0
#14 0x0000000000b1a0bc (anonymous namespace)::AArch64MIPeepholeOpt::runOnMachineFunction(llvm::MachineFunction&) AArch64MIPeepholeOpt.cpp:0:0
#15 0x0000000001dcf254 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x1dcf254)
#16 0x00000000021e3ed8 llvm::FPPassManager::runOnFunction(llvm::Function&) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x21e3ed8)
#17 0x00000000021ea3fc llvm::FPPassManager::runOnModule(llvm::Module&) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x21ea3fc)
#18 0x00000000021e44cc llvm::legacy::PassManagerImpl::run(llvm::Module&) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x21e44cc)
#19 0x0000000002c1b2f0 clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::HeaderSearchOptions const&, clang::CodeGenOptions const&, clang::TargetOptions const&, clang::LangOptions const&, llvm::StringRef, llvm::Module*, clang::BackendAction, std::unique_ptr<llvm::raw_pwrite_stream, std::default_delete<llvm::raw_pwrite_stream> >) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x2c1b2f0)
#20 0x00000000037a2bbc clang::BackendConsumer::HandleTranslationUnit(clang::ASTContext&) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x37a2bbc)
#21 0x00000000040d2908 clang::ParseAST(clang::Sema&, bool, bool) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x40d2908)
#22 0x0000000003198b60 clang::FrontendAction::Execute() (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x3198b60)
#23 0x000000000312e84c clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x312e84c)
#24 0x0000000003244f18 clang::ExecuteCompilerInvocation(clang::CompilerInstance*) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x3244f18)
#25 0x00000000009db95c cc1_main(llvm::ArrayRef<char const*>, char const*, void*) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x9db95c)
#26 0x00000000009d9bfc ExecuteCC1Tool(llvm::SmallVectorImpl<char const*>&) driver.cpp:0:0
#27 0x000000000301c6cc void llvm::function_ref<void ()>::callback_fn<clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef> >, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >*, bool*) const::$_1>(long) Job.cpp:0:0
#28 0x0000000002916a4c llvm::CrashRecoveryContext::RunSafely(llvm::function_ref<void ()>) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x2916a4c)
#29 0x000000000301bfe8 clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef> >, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >*, bool*) const (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x301bfe8)
#30 0x0000000002ff1a64 clang::driver::Compilation::ExecuteCommand(clang::driver::Command const&, clang::driver::Command const*&) const (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x2ff1a64)
#31 0x0000000002ff1cfc clang::driver::Compilation::ExecuteJobs(clang::driver::JobList const&, llvm::SmallVectorImpl<std::pair<int, clang::driver::Command const*> >&) const (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x2ff1cfc)
#32 0x000000000300497c clang::driver::Driver::ExecuteCompilation(clang::driver::Compilation&, llvm::SmallVectorImpl<std::pair<int, clang::driver::Command const*> >&) (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x300497c)
#33 0x00000000009d934c main (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x9d934c)
#34 0x0000ffffba4e1090 __libc_start_main /build/glibc-iW00TY/glibc-2.31/csu/../csu/libc-start.c:342:3
#35 0x00000000009d6cc4 _start (/home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin/clang+++0x9d6cc4)
clang-14: error: clang frontend command failed with exit code 134 (use -v to see invocation)
clang version 14.0.0 (https://github.com/llvm/llvm-project.git d61aac76bf9009317ef15b1fc38a98a808ce9b19)
Target: aarch64-unknown-linux-gnu
Thread model: posix
InstalledDir: /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage1.install/bin
clang-14: note: diagnostic msg: 
********************
PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
Preprocessed source(s) and associated run script(s) are located at:
clang-14: note: diagnostic msg: /tmp/asan_allocator-bd54f4.cpp
clang-14: note: diagnostic msg: /tmp/asan_allocator-bd54f4.sh
clang-14: note: diagnostic msg: 
********************
[709/7107] cd /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas1_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas1_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas1_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas1_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas2_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas2_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas2_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas2_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas4_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas4_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas4_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas4_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas8_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas8_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas8_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas8_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas16_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas16_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas16_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_cas16_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp1_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp1_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp1_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp1_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp2_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp2_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp2_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp2_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp4_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp4_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp4_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp4_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp8_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp8_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp8_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_swp8_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd1_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd1_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd1_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd1_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd2_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd2_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd2_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd2_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd4_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd4_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd4_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd4_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd8_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd8_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd8_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldadd8_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr1_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr1_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr1_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr1_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr2_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr2_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr2_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr2_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr4_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr4_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr4_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr4_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr8_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr8_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr8_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldclr8_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor1_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor1_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor1_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor1_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor2_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor2_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor2_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor2_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor4_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor4_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor4_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor4_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor8_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor8_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor8_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldeor8_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset1_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset1_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset1_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset1_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset2_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset2_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset2_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset2_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset4_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset4_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset4_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset4_4.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset8_1.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset8_2.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset8_3.S && /usr/bin/cmake -E create_symlink /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/llvm/compiler-rt/lib/builtins/aarch64/lse.S /home/tcwg-buildslave/worker/clang-aarch64-full-2stage/stage2/projects/compiler-rt/lib/builtins/outline_atomic_helpers.dir/outline_atomic_ldset8_4.S
[710/7107] Building CXX object projects/compiler-rt/lib/asan/CMakeFiles/RTAsan.aarch64.dir/asan_fake_stack.cpp.o
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ninja: build stopped: subcommand failed.

[DavidSpickett]

I tried to pull and launch your suggested docker image on an amd64-linux desktop.

As you suspected, the docker suggestion was so that anyone can reproduce the environment of the Linaro bots on an AArch64 machine. If you're mainly seeing stage 2 failures the initial tools are probably not important anyway.

(I think Docker can do some cross arch stuff now, I've not tried it myself)

llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp

 //===- AArch64MIPeepholeOpt.cpp - AArch64 MI peephole optimization pass ---===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This pass performs below peephole optimizations on MIR level.
 //
 // 1. MOVi32imm + ANDWrr ==> ANDWri + ANDWri
 //    MOVi64imm + ANDXrr ==> ANDXri + ANDXri
 //
+// 2. MOVi32imm + ADDWrr ==> ADDWRi + ADDWRi
+//    MOVi64imm + ADDXrr ==> ANDXri + ANDXri
+//
+// 3. MOVi32imm + SUBWrr ==> SUBWRi + SUBWRi
+//    MOVi64imm + SUBXrr ==> SUBXri + SUBXri
+//
 //    The mov pseudo instruction could be expanded to multiple mov instructions
 //    later. In this case, we could try to split the constant  operand of mov
-//    instruction into two bitmask immediates. It makes two AND instructions
-//    intead of multiple `mov` + `and` instructions.
+//    instruction into two immediates which can be directly encoded into
+//    *Wri/*Xri instructions. It makes two AND/ADD/SUB instructions instead of
+//    multiple `mov` + `and/add/sub` instructions.
 //
-// 2. Remove redundant ORRWrs which is generated by zero-extend.
+// 4. Remove redundant ORRWrs which is generated by zero-extend.
 //
 //    %3:gpr32 = ORRWrs $wzr, %2, 0
 //    %4:gpr64 = SUBREG_TO_REG 0, %3, %subreg.sub_32
 //
 //    If AArch64's 32-bit form of instruction defines the source operand of
 //    ORRWrs, we can remove the ORRWrs because the upper 32 bits of the source
 //    operand are set to zero.
 //
struct AArch64MIPeepholeOpt : public MachineFunctionPass {
   AArch64MIPeepholeOpt() : MachineFunctionPass(ID) {
     initializeAArch64MIPeepholeOptPass(*PassRegistry::getPassRegistry());
   }
 
   const AArch64InstrInfo *TII;
   MachineLoopInfo *MLI;
   MachineRegisterInfo *MRI;
 
+  bool checkMovImmInstr(MachineInstr &MI, MachineInstr *&MovMI,
+                        MachineInstr *&SubregToRegMI);
+
+  template <typename T>
+  bool visitADDSUB(MachineInstr &MI,
+                   SmallSetVector<MachineInstr *, 8> &ToBeRemoved, bool IsAdd);
   template <typename T>
   bool visitAND(MachineInstr &MI,
                 SmallSetVector<MachineInstr *, 8> &ToBeRemoved);
   bool visitORR(MachineInstr &MI,
                 SmallSetVector<MachineInstr *, 8> &ToBeRemoved);
   bool runOnMachineFunction(MachineFunction &MF) override;
 
   StringRef getPassName() const override {
bool AArch64MIPeepholeOpt::visitAND(
   // later. Let's try to split the constant operand of mov instruction into two
   // bitmask immediates. It makes only two AND instructions intead of multiple
   // mov + and instructions.
 
   unsigned RegSize = sizeof(T) * 8;
   assert((RegSize == 32 || RegSize == 64) &&
          "Invalid RegSize for AND bitmask peephole optimization");
 
-  // Check whether AND's MBB is in loop and the AND is loop invariant.
-  MachineBasicBlock *MBB = MI.getParent();
-  MachineLoop *L = MLI->getLoopFor(MBB);
-  if (L && !L->isLoopInvariant(MI))
-    return false;
-
-  // Check whether AND's operand is MOV with immediate.
-  MachineInstr *MovMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg());
-  if (!MovMI)
-    return false;
-
-  MachineInstr *SubregToRegMI = nullptr;
-  // If it is SUBREG_TO_REG, check its operand.
-  if (MovMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) {
-    SubregToRegMI = MovMI;
-    MovMI = MRI->getUniqueVRegDef(MovMI->getOperand(2).getReg());
-    if (!MovMI)
-      return false;
-  }
-
-  if (MovMI->getOpcode() != AArch64::MOVi32imm &&
-      MovMI->getOpcode() != AArch64::MOVi64imm)
-    return false;
-
-  // If the MOV has multiple uses, do not split the immediate because it causes
-  // more instructions.
-  if (!MRI->hasOneUse(MovMI->getOperand(0).getReg()))
-    return false;
-
-  if (SubregToRegMI && !MRI->hasOneUse(SubregToRegMI->getOperand(0).getReg()))
+  // Perform several essential checks against current MI.
+  MachineInstr *MovMI = nullptr, *SubregToRegMI = nullptr;
+  if (!checkMovImmInstr(MI, MovMI, SubregToRegMI))
     return false;
 
   // Split the bitmask immediate into two.
   T UImm = static_cast<T>(MovMI->getOperand(1).getImm());
   // For the 32 bit form of instruction, the upper 32 bits of the destination
   // register are set to zero. If there is SUBREG_TO_REG, set the upper 32 bits
   // of UImm to zero.
   if (SubregToRegMI)
     UImm &= 0xFFFFFFFF;
   T Imm1Enc;
   T Imm2Enc;
   if (!splitBitmaskImm(UImm, RegSize, Imm1Enc, Imm2Enc))
     return false;
 
   // Create new AND MIs.
   DebugLoc DL = MI.getDebugLoc();
+  MachineBasicBlock *MBB = MI.getParent();
   const TargetRegisterClass *ANDImmRC =
       (RegSize == 32) ? &AArch64::GPR32spRegClass : &AArch64::GPR64spRegClass;
   Register DstReg = MI.getOperand(0).getReg();
   Register SrcReg = MI.getOperand(1).getReg();
   Register NewTmpReg = MRI->createVirtualRegister(ANDImmRC);
   Register NewDstReg = MRI->createVirtualRegister(ANDImmRC);
   unsigned Opcode = (RegSize == 32) ? AArch64::ANDWri : AArch64::ANDXri;
 
bool AArch64MIPeepholeOpt::visitORR(
   MI.getOperand(0).setReg(DefReg);
   ToBeRemoved.insert(&MI);
 
   LLVM_DEBUG({ dbgs() << "Removed: " << MI << "\n"; });
 
   return true;
 }
 
+template <typename T>
+static bool splitAddSubImm(T Imm, unsigned RegSize, T &Imm0, T &Imm1) {
+  // The immediate must be in the form of ((imm0 << 12) + imm1), in which both
+  // imm0 and imm1 are non-zero 12-bit unsigned int.
+  if ((Imm & 0xfff000) == 0 || (Imm & 0xfff) == 0 ||
+      (Imm & ~static_cast<T>(0xffffff)) != 0)
+    return false;
+
+  // The immediate can not be composed via a single instruction.
+  SmallVector<AArch64_IMM::ImmInsnModel, 4> Insn;
+  AArch64_IMM::expandMOVImm(Imm, RegSize, Insn);
+  if (Insn.size() == 1)
+    return false;
+
+  // Split Imm into (Imm0 << 12) + Imm1;
+  Imm0 = (Imm >> 12) & 0xfff;
+  Imm1 = Imm & 0xfff;
+  return true;
+}
+
+template <typename T>
+bool AArch64MIPeepholeOpt::visitADDSUB(
+    MachineInstr &MI, SmallSetVector<MachineInstr *, 8> &ToBeRemoved,
+    bool IsAdd) {
+  // Try below transformation.
+  //
+  // MOVi32imm + ADDWrr ==> ANDWri + ANDWri
+  // MOVi64imm + ADDXrr ==> ANDXri + ANDXri
+  //
+  // MOVi32imm + SUBWrr ==> SUBWri + SUBWri
+  // MOVi64imm + SUBXrr ==> SUBXri + SUBXri
+  //
+  // The mov pseudo instruction could be expanded to multiple mov instructions
+  // later. Let's try to split the constant operand of mov instruction into two
+  // legal add/sub immediates. It makes only two ADD/SUB instructions intead of
+  // multiple `mov` + `and/sub` instructions.
+
+  unsigned RegSize = sizeof(T) * 8;
+  assert((RegSize == 32 || RegSize == 64) &&
+         "Invalid RegSize for legal add/sub immediate peephole optimization");
+
+  // Perform several essential checks against current MI.
+  MachineInstr *MovMI, *SubregToRegMI;
+  if (!checkMovImmInstr(MI, MovMI, SubregToRegMI))
+    return false;
+
+  // Split the immediate to Imm0 and Imm1, and calculate the Opcode.
+  T Imm = static_cast<T>(MovMI->getOperand(1).getImm()), Imm0, Imm1;
+  unsigned Opcode;
+  if (splitAddSubImm(Imm, RegSize, Imm0, Imm1)) {
+    if (IsAdd)
+      Opcode = RegSize == 32 ? AArch64::ADDWri : AArch64::ADDXri;
+    else
+      Opcode = RegSize == 32 ? AArch64::SUBWri : AArch64::SUBXri;
+  } else if (splitAddSubImm(-Imm, RegSize, Imm0, Imm1)) {
+    if (IsAdd)
+      Opcode = RegSize == 32 ? AArch64::SUBWri : AArch64::SUBXri;
+    else
+      Opcode = RegSize == 32 ? AArch64::ADDWri : AArch64::ADDXri;
+  } else {
+    return false;
+  }
+
+  // Create new ADD/SUB MIs.
+  DebugLoc DL = MI.getDebugLoc();
+  MachineBasicBlock *MBB = MI.getParent();
+  const TargetRegisterClass *RC =
+      (RegSize == 32) ? &AArch64::GPR32spRegClass : &AArch64::GPR64spRegClass;
+  Register DstReg = MI.getOperand(0).getReg();
+  Register SrcReg = MI.getOperand(1).getReg();
+  Register TmpReg = MRI->createVirtualRegister(RC);
+
+  MRI->constrainRegClass(SrcReg, RC);
+  BuildMI(*MBB, MI, DL, TII->get(Opcode), TmpReg)
+      .addReg(SrcReg)
+      .addImm(Imm0)
+      .addImm(12);
+
+  MRI->constrainRegClass(DstReg, RC);
+  BuildMI(*MBB, MI, DL, TII->get(Opcode), DstReg)
+      .addReg(TmpReg)
+      .addImm(Imm1)
+      .addImm(0);
+
+  // Record the MIs need to be removed.
+  ToBeRemoved.insert(&MI);
+  if (SubregToRegMI)
+    ToBeRemoved.insert(SubregToRegMI);
+  ToBeRemoved.insert(MovMI);
+
+  return true;
+}
+
+// Checks if the corresponding MOV immediate instruction is applicable for
+// this peephole optimization.
+bool AArch64MIPeepholeOpt::checkMovImmInstr(MachineInstr &MI,
+                                            MachineInstr *&MovMI,
+                                            MachineInstr *&SubregToRegMI) {
+  // Check whether current MBB is in loop and the AND is loop invariant.
+  MachineBasicBlock *MBB = MI.getParent();
+  MachineLoop *L = MLI->getLoopFor(MBB);
+  if (L && !L->isLoopInvariant(MI))
+    return false;
+
+  // Check whether current MI's operand is MOV with immediate.
+  MovMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg());
+  if (!MovMI)
+    return false;
+
+  // If it is SUBREG_TO_REG, check its operand.
+  SubregToRegMI = nullptr;
+  if (MovMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) {
+    SubregToRegMI = MovMI;
+    MovMI = MRI->getUniqueVRegDef(MovMI->getOperand(2).getReg());
+    if (!MovMI)
+      return false;
+  }
+
+  if (MovMI->getOpcode() != AArch64::MOVi32imm &&
+      MovMI->getOpcode() != AArch64::MOVi64imm)
+    return false;
+
+  // If the MOV has multiple uses, do not split the immediate because it causes
+  // more instructions.
+  if (!MRI->hasOneUse(MovMI->getOperand(0).getReg()))
+    return false;
+  if (SubregToRegMI && !MRI->hasOneUse(SubregToRegMI->getOperand(0).getReg()))
+    return false;
+
+  // It is OK to perform this peephole optimization.
+  return true;
+}
+
 bool AArch64MIPeepholeOpt::runOnMachineFunction(MachineFunction &MF) {
   if (skipFunction(MF.getFunction()))
     return false;
 
   TII = static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo());
   MLI = &getAnalysis<MachineLoopInfo>();
   MRI = &MF.getRegInfo();
 
for (MachineInstr &MI : MBB) {
       case AArch64::ANDWrr:
         Changed = visitAND<uint32_t>(MI, ToBeRemoved);
         break;
       case AArch64::ANDXrr:
         Changed = visitAND<uint64_t>(MI, ToBeRemoved);
         break;
       case AArch64::ORRWrs:
         Changed = visitORR(MI, ToBeRemoved);
+        break;
+      case AArch64::ADDWrr:
+        Changed = visitADDSUB<uint32_t>(MI, ToBeRemoved, true);
+        break;
+      case AArch64::SUBWrr:
+        Changed = visitADDSUB<uint32_t>(MI, ToBeRemoved, false);
+        break;
+      case AArch64::ADDXrr:
+        Changed = visitADDSUB<uint64_t>(MI, ToBeRemoved, true);
+        break;
+      case AArch64::SUBXrr:
+        Changed = visitADDSUB<uint64_t>(MI, ToBeRemoved, false);
+        break;
       }
     }
   }
 
   for (MachineInstr *MI : ToBeRemoved)
     MI->eraseFromParent();
 
   return Changed;
 }
 
 FunctionPass *llvm::createAArch64MIPeepholeOptPass() {
   return new AArch64MIPeepholeOpt();
 }

llvm/test/CodeGen/AArch64/addsub.ll

; CHECK-NEXT:    ret
   store i64 %newval64, i64* @var_i64
 
   ret void
 }
 
 define i64 @add_two_parts_imm_i64(i64 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i64:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    add x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = add i64 %a, 11183445
   ret i64 %b
 }
 
 define i32 @add_two_parts_imm_i32(i32 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i32:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    add w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = add i32 %a, 11183445
   ret i32 %b
 }
 
 define i64 @add_two_parts_imm_i64_neg(i64 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i64_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-42325
-; CHECK-NEXT:    movk x8, #65365, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    sub x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = add i64 %a, -11183445
   ret i64 %b
 }
 
 define i32 @add_two_parts_imm_i32_neg(i32 %a) {
 ; CHECK-LABEL: add_two_parts_imm_i32_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #23211
-; CHECK-NEXT:    movk w8, #65365, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    sub w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = add i32 %a, -11183445
   ret i32 %b
 }
 
 define i64 @sub_two_parts_imm_i64(i64 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i64:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-42325
-; CHECK-NEXT:    movk x8, #65365, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    sub x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i64 %a, 11183445
   ret i64 %b
 }
 
 define i32 @sub_two_parts_imm_i32(i32 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i32:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #23211
-; CHECK-NEXT:    movk w8, #65365, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    sub w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    sub w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i32 %a, 11183445
   ret i32 %b
 }
 
 define i64 @sub_two_parts_imm_i64_neg(i64 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i64_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add x0, x0, x8
+; CHECK-NEXT:    add x8, x0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add x0, x8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i64 %a, -11183445
   ret i64 %b
 }
 
 define i32 @sub_two_parts_imm_i32_neg(i32 %a) {
 ; CHECK-LABEL: sub_two_parts_imm_i32_neg:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w8, #42325
-; CHECK-NEXT:    movk w8, #170, lsl #16
-; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    add w8, w0, #2730, lsl #12 // =11182080
+; CHECK-NEXT:    add w0, w8, #1365
 ; CHECK-NEXT:    ret
   %b = sub i32 %a, -11183445
   ret i32 %b
 }
 
+define i32 @add_27962026(i32 %a) {
+; CHECK-LABEL: add_27962026:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #43690
+; CHECK-NEXT:    movk w8, #426, lsl #16
+; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    ret
+  %b = add i32 %a, 27962026
+  ret i32 %b
+}
+
+define i32 @add_65534(i32 %a) {
+; CHECK-LABEL: add_65534:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #65534
+; CHECK-NEXT:    add w0, w0, w8
+; CHECK-NEXT:    ret
+  %b = add i32 %a, 65534
+  ret i32 %b
+}
+
+declare i32 @foox(i32)
+
+define void @add_in_loop(i32 %0) {
+; CHECK-LABEL: add_in_loop:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w30, -16
+; CHECK-NEXT:    mov w19, #43690
+; CHECK-NEXT:    movk w19, #170, lsl #16
+; CHECK-NEXT:  .LBB15_1: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    add w0, w0, w19
+; CHECK-NEXT:    bl foox
+; CHECK-NEXT:    b .LBB15_1
+  br label %2
+2:
+  %3 = phi i32 [ %0, %1 ], [ %5, %2 ]
+  %4 = add nsw i32 %3, 11184810
+  %5 = tail call i32 @foox(i32 %4) #2
+  br label %2
+}
+
 define void @testing() {
 ; CHECK-LABEL: testing:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    adrp x8, :got:var_i32
 ; CHECK-NEXT:    ldr x8, [x8, :got_lo12:var_i32]
 ; CHECK-NEXT:    ldr w9, [x8]
 ; CHECK-NEXT:    cmp w9, #4095
-; CHECK-NEXT:    b.ne .LBB13_6
+; CHECK-NEXT:    b.ne .LBB16_6
 ; CHECK-NEXT:  // %bb.1: // %test2
 ; CHECK-NEXT:    adrp x10, :got:var2_i32
 ; CHECK-NEXT:    add w11, w9, #1
 ; CHECK-NEXT:    ldr x10, [x10, :got_lo12:var2_i32]
 ; CHECK-NEXT:    str w11, [x8]
 ; CHECK-NEXT:    ldr w10, [x10]
 ; CHECK-NEXT:    cmp w10, #3567, lsl #12 // =14610432
-; CHECK-NEXT:    b.lo .LBB13_6
+; CHECK-NEXT:    b.lo .LBB16_6
 ; CHECK-NEXT:  // %bb.2: // %test3
 ; CHECK-NEXT:    add w11, w9, #2
 ; CHECK-NEXT:    cmp w9, #123
 ; CHECK-NEXT:    str w11, [x8]
-; CHECK-NEXT:    b.lt .LBB13_6
+; CHECK-NEXT:    b.lt .LBB16_6
 ; CHECK-NEXT:  // %bb.3: // %test4
 ; CHECK-NEXT:    add w11, w9, #3
 ; CHECK-NEXT:    cmp w10, #321
 ; CHECK-NEXT:    str w11, [x8]
-; CHECK-NEXT:    b.gt .LBB13_6
+; CHECK-NEXT:    b.gt .LBB16_6
 ; CHECK-NEXT:  // %bb.4: // %test5
 ; CHECK-NEXT:    add w11, w9, #4
 ; CHECK-NEXT:    cmn w10, #443
 ; CHECK-NEXT:    str w11, [x8]
-; CHECK-NEXT:    b.ge .LBB13_6
+; CHECK-NEXT:    b.ge .LBB16_6
 ; CHECK-NEXT:  // %bb.5: // %test6
 ; CHECK-NEXT:    add w9, w9, #5
 ; CHECK-NEXT:    str w9, [x8]
-; CHECK-NEXT:  .LBB13_6: // %common.ret
+; CHECK-NEXT:  .LBB16_6: // %common.ret
 ; CHECK-NEXT:    ret
   %val = load i32, i32* @var_i32
   %val2 = load i32, i32* @var2_i32
 
   %cmp_pos_small = icmp ne i32 %val, 4095
   br i1 %cmp_pos_small, label %ret, label %test2
 
 test2:

llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll

 }
 
 declare i32 @__FrameHandler(...)
 
 define void @test5([65536 x i32]** %s, i32 %n) {
 ; CHECK-LABEL: test5:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    ldr x9, [x0]
-; CHECK-NEXT:    mov w10, #14464
-; CHECK-NEXT:    movk w10, #1, lsl #16
 ; CHECK-NEXT:    mov w8, wzr
-; CHECK-NEXT:    add x9, x9, x10
+; CHECK-NEXT:    add x9, x9, #19, lsl #12 // =77824
+; CHECK-NEXT:    add x9, x9, #2176
 ; CHECK-NEXT:    cmp w8, w1
 ; CHECK-NEXT:    b.ge .LBB4_2
 ; CHECK-NEXT:  .LBB4_1: // %while_body
 ; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    add w10, w8, #1
 ; CHECK-NEXT:    stp w10, w8, [x9]
 ; CHECK-NEXT:    mov w8, w10
 ; CHECK-NEXT:    cmp w8, w1