[SVE] Fix the FP arithmetic instruction costs for SVE

[david-arm]

Summary

Several FP instructions (fadd, fsub, etc.) were incorrectly assigned
a higher cost for SVE because they have custom lowering, however we
know they are legal. This patch explicitly assigns a cost of 2 to
these opcodes.

Tests added here:

Analysis/CostModel/AArch64/arith-fp-sve.ll

[sdesmalen]

llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

1449

This condition is missing !Ty->getScalarType()->isFP128Ty(), and if you add it, the if-statement can be merged with the one above:

..
case ISD::FNEG:
  if (!Ty->getScalarType()->isFP128Ty())
    return (Cost + 2) * LT.first;

[david-arm]

• Coalesced the checks in getArithmeticInstrCost, as well as fixed up some other tests I'd missed.

llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

InstructionCost AArch64TTIImpl::getArithmeticInstrCost(
   case ISD::XOR:
   case ISD::OR:
   case ISD::AND:
     // These nodes are marked as 'custom' for combining purposes only.
     // We know that they are legal. See LowerAdd in ISelLowering.
     return (Cost + 1) * LT.first;
 
   case ISD::FADD:
+  case ISD::FSUB:
+  case ISD::FMUL:
+  case ISD::FDIV:
+  case ISD::FNEG:
     // These nodes are marked as 'custom' just to lower them to SVE.
     // We know said lowering will incur no additional cost.
     if (isa<FixedVectorType>(Ty) && !Ty->getScalarType()->isFP128Ty())
       return (Cost + 2) * LT.first;
 
+    // These nodes are marked as 'custom' so we can lower to the predicated
+    // form, but we know that they are legal.
+    if (isa<ScalableVectorType>(Ty))
+      return (Cost + 2) * LT.first;
+
     return Cost + BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info,
                                                 Opd2Info,
                                                 Opd1PropInfo, Opd2PropInfo);
   }
 }
 
 InstructionCost AArch64TTIImpl::getAddressComputationCost(Type *Ty,
                                                           ScalarEvolution *SE,

llvm/test/Analysis/CostModel/AArch64/arith-fp-sve.ll

+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=aarch64 -mattr=+fullfp16 -mattr=+sve | FileCheck %s
+
+define void @fadd() {
+; CHECK-LABEL: 'fadd'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fadd <vscale x 4 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fadd <vscale x 8 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fadd <vscale x 16 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fadd <vscale x 2 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fadd <vscale x 4 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fadd <vscale x 8 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fadd <vscale x 2 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fadd <vscale x 4 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %V4F16 = fadd <vscale x 4 x half> undef, undef
+  %V8F16 = fadd <vscale x 8 x half> undef, undef
+  %V16F16 = fadd <vscale x 16 x half> undef, undef
+
+  %V2F32 = fadd <vscale x 2 x float> undef, undef
+  %V4F32 = fadd <vscale x 4 x float> undef, undef
+  %V8F32 = fadd <vscale x 8 x float> undef, undef
+
+  %V2F64 = fadd <vscale x 2 x double> undef, undef
+  %V4F64 = fadd <vscale x 4 x double> undef, undef
+
+  ret void
+}
+
+define void @fsub() {
+; CHECK-LABEL: 'fsub'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fsub <vscale x 4 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fsub <vscale x 8 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fsub <vscale x 16 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fsub <vscale x 2 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fsub <vscale x 4 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fsub <vscale x 8 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <vscale x 2 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fsub <vscale x 4 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %V4F16 = fsub <vscale x 4 x half> undef, undef
+  %V8F16 = fsub <vscale x 8 x half> undef, undef
+  %V16F16 = fsub <vscale x 16 x half> undef, undef
+
+  %V2F32 = fsub <vscale x 2 x float> undef, undef
+  %V4F32 = fsub <vscale x 4 x float> undef, undef
+  %V8F32 = fsub <vscale x 8 x float> undef, undef
+
+  %V2F64 = fsub <vscale x 2 x double> undef, undef
+  %V4F64 = fsub <vscale x 4 x double> undef, undef
+
+  ret void
+}
+
+define void @fneg() {
+; CHECK-LABEL: 'fneg'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F16 = fneg <vscale x 2 x half> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fneg <vscale x 4 x half> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fneg <vscale x 8 x half> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fneg <vscale x 16 x half> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fneg <vscale x 2 x float> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fneg <vscale x 4 x float> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fneg <vscale x 8 x float> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fneg <vscale x 2 x double> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fneg <vscale x 4 x double> undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %V2F16 = fneg <vscale x 2 x half> undef
+  %V4F16 = fneg <vscale x 4 x half> undef
+  %V8F16 = fneg <vscale x 8 x half> undef
+  %V16F16 = fneg <vscale x 16 x half> undef
+
+  %V2F32 = fneg <vscale x 2 x float> undef
+  %V4F32 = fneg <vscale x 4 x float> undef
+  %V8F32 = fneg <vscale x 8 x float> undef
+
+  %V2F64 = fneg <vscale x 2 x double> undef
+  %V4F64 = fneg <vscale x 4 x double> undef
+
+  ret void
+}
+
+define void @fmul() {
+; CHECK-LABEL: 'fmul'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fmul <vscale x 4 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fmul <vscale x 8 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fmul <vscale x 16 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fmul <vscale x 2 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fmul <vscale x 4 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fmul <vscale x 8 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fmul <vscale x 2 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fmul <vscale x 4 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %V4F16 = fmul <vscale x 4 x half> undef, undef
+  %V8F16 = fmul <vscale x 8 x half> undef, undef
+  %V16F16 = fmul <vscale x 16 x half> undef, undef
+
+  %V2F32 = fmul <vscale x 2 x float> undef, undef
+  %V4F32 = fmul <vscale x 4 x float> undef, undef
+  %V8F32 = fmul <vscale x 8 x float> undef, undef
+
+  %V2F64 = fmul <vscale x 2 x double> undef, undef
+  %V4F64 = fmul <vscale x 4 x double> undef, undef
+
+  ret void
+}
+
+define void @fdiv() {
+; CHECK-LABEL: 'fdiv'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fdiv <vscale x 4 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fdiv <vscale x 8 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fdiv <vscale x 16 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fdiv <vscale x 2 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fdiv <vscale x 4 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fdiv <vscale x 8 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fdiv <vscale x 2 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fdiv <vscale x 4 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %V4F16 = fdiv <vscale x 4 x half> undef, undef
+  %V8F16 = fdiv <vscale x 8 x half> undef, undef
+  %V16F16 = fdiv <vscale x 16 x half> undef, undef
+
+  %V2F32 = fdiv <vscale x 2 x float> undef, undef
+  %V4F32 = fdiv <vscale x 4 x float> undef, undef
+  %V8F32 = fdiv <vscale x 8 x float> undef, undef
+
+  %V2F64 = fdiv <vscale x 2 x double> undef, undef
+  %V4F64 = fdiv <vscale x 4 x double> undef, undef
+
+  ret void
+}