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[WIP][X86] Freeze shl(x,1) -> add(x,x) vector fold (PR50468)
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Authored by RKSimon on Jul 23 2021, 8:51 AM.

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Summary

Demo patch to show the effect of folding shl(x,1) ->add(freeze(x),freeze(x)) to avoid the undef issues identified in PR50468

I have a second patch that adds alternative isel patterns for vXi16/vXi32/vXi64 shl-by-one - I'll raise that for comparison shortly.

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