[WebAssembly] Codegen for v128.load{32,64}_zero

[tlively]

Summary

Replace the experimental clang builtins and LLVM intrinsics for these
instructions with normal instruction selection patterns. The wasm_simd128.h
intrinsics header was already using portable code for the corresponding
intrinsics, so now it produces the correct instructions.

[tlively]

• Add aligment tests

clang/include/clang/Basic/BuiltinsWebAssembly.def

 TARGET_BUILTIN(__builtin_wasm_narrow_s_i8x16_i16x8, "V16ScV8sV8s", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16UcV8sV8s", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4iV4i", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4iiC*", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLiC*", "n", "simd128")
-
 #undef BUILTIN
 #undef TARGET_BUILTIN

clang/lib/CodeGen/CGBuiltin.cpp

case WebAssembly::BI__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4: {
     Function *Callee = CGM.getIntrinsic(IntNo, {TruncT, SrcT});
     Value *Trunc = Builder.CreateCall(Callee, Vec);
     Value *Splat = Builder.CreateVectorSplat(2, Builder.getInt32(0));
     Value *ConcatMask =
         llvm::ConstantVector::get({Builder.getInt32(0), Builder.getInt32(1),
                                    Builder.getInt32(2), Builder.getInt32(3)});
     return Builder.CreateShuffleVector(Trunc, Splat, ConcatMask);
   }
-  case WebAssembly::BI__builtin_wasm_load32_zero: {
-    Value *Ptr = EmitScalarExpr(E->getArg(0));
-    Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);
-    return Builder.CreateCall(Callee, {Ptr});
-  }
-  case WebAssembly::BI__builtin_wasm_load64_zero: {
-    Value *Ptr = EmitScalarExpr(E->getArg(0));
-    Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
-    return Builder.CreateCall(Callee, {Ptr});
-  }
   case WebAssembly::BI__builtin_wasm_shuffle_i8x16: {
     Value *Ops[18];
     size_t OpIdx = 0;
     Ops[OpIdx++] = EmitScalarExpr(E->getArg(0));
     Ops[OpIdx++] = EmitScalarExpr(E->getArg(1));
     while (OpIdx < 18) {
       Optional<llvm::APSInt> LaneConst =
           E->getArg(OpIdx)->getIntegerConstantExpr(getContext());

clang/test/CodeGen/builtins-wasm.c

 
 u32x4 trunc_sat_zero_u_f64x2_i32x4(f64x2 x) {
   return __builtin_wasm_trunc_sat_zero_u_f64x2_i32x4(x);
   // WEBASSEMBLY: %0 = tail call <2 x i32> @llvm.fptoui.sat.v2i32.v2f64(<2 x double> %x)
   // WEBASSEMBLY: %1 = shufflevector <2 x i32> %0, <2 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
   // WEBASSEMBLY: ret <4 x i32> %1
 }
 
-i32x4 load32_zero(const int *p) {
-  return __builtin_wasm_load32_zero(p);
-  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p)
-  // WEBASSEMBLY: ret
-}
-
-i64x2 load64_zero(const long long *p) {
-  return __builtin_wasm_load64_zero(p);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.load64.zero(i64* %p)
-  // WEBASSEMBLY: ret
-}
-
 i8x16 swizzle_i8x16(i8x16 x, i8x16 y) {
   return __builtin_wasm_swizzle_i8x16(x, y);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.swizzle(<16 x i8> %x, <16 x i8> %y)
 }
 
 i8x16 shuffle(i8x16 x, i8x16 y) {
   return __builtin_wasm_shuffle_i8x16(x, y, 0, 1, 2, 3, 4, 5, 6, 7,
                                       8, 9, 10, 11, 12, 13, 14, 15);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.shuffle(<16 x i8> %x, <16 x i8> %y,
   // WEBASSEMBLY-SAME: i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,
   // WEBASSEMBLY-SAME: i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14,
   // WEBASSEMBLY-SAME: i32 15
   // WEBASSEMBLY-NEXT: ret
 }

llvm/include/llvm/IR/IntrinsicsWebAssembly.td

def int_wasm_pmin :
   Intrinsic<[llvm_anyvector_ty],
             [LLVMMatchType<0>, LLVMMatchType<0>],
             [IntrNoMem, IntrSpeculatable]>;
 def int_wasm_pmax :
   Intrinsic<[llvm_anyvector_ty],
             [LLVMMatchType<0>, LLVMMatchType<0>],
             [IntrNoMem, IntrSpeculatable]>;
 
-// TODO: Replace these intrinsic with normal ISel patterns once the
-// load_zero instructions are merged to the proposal.
-def int_wasm_load32_zero :
-  Intrinsic<[llvm_v4i32_ty],
-            [LLVMPointerType<llvm_i32_ty>],
-            [IntrReadMem, IntrArgMemOnly],
-             "", [SDNPMemOperand]>;
-
-def int_wasm_load64_zero :
-  Intrinsic<[llvm_v2i64_ty],
-            [LLVMPointerType<llvm_i64_ty>],
-            [IntrReadMem, IntrArgMemOnly],
-             "", [SDNPMemOperand]>;
-
 // TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged
 // to the proposal.
 def int_wasm_popcnt :
   Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem, IntrSpeculatable]>;
 
 def int_wasm_extmul_low_signed :
   Intrinsic<[llvm_anyvector_ty],
             [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>],

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
   case Intrinsic::wasm_memory_atomic_wait64:
     Info.opc = ISD::INTRINSIC_W_CHAIN;
     Info.memVT = MVT::i64;
     Info.ptrVal = I.getArgOperand(0);
     Info.offset = 0;
     Info.align = Align(8);
     Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
     return true;
-  case Intrinsic::wasm_load32_zero:
-  case Intrinsic::wasm_load64_zero:
-    Info.opc = ISD::INTRINSIC_W_CHAIN;
-    Info.memVT = Intrinsic == Intrinsic::wasm_load32_zero ? MVT::i32 : MVT::i64;
-    Info.ptrVal = I.getArgOperand(0);
-    Info.offset = 0;
-    Info.align = Align(1);
-    Info.flags = MachineMemOperand::MOLoad;
-    return true;
   default:
     return false;
   }
 }
 
 //===----------------------------------------------------------------------===//
 // WebAssembly Lowering private implementation.
 //===----------------------------------------------------------------------===//

llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

defm LOAD_ZERO_#vec#_A64 :
     SIMD_I<(outs V128:$dst),
            (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
            (outs), (ins P2Align:$p2align, offset64_op:$off), [],
            name#"\t$dst, ${off}(${addr})$p2align",
            name#"\t$off$p2align", simdop>;
   } // mayLoad = 1, UseNamedOperandTable = 1
 }
 
-// TODO: Also support v4f32 and v2f64 once the instructions are merged
-// to the proposal
 defm "" : SIMDLoadZero<I32x4, 0x5c>;
 defm "" : SIMDLoadZero<I64x2, 0x5d>;
 
+// TODO: f32x4 and f64x2 as well
 foreach vec = [I32x4, I64x2] in {
-defvar loadpat = !cast<Intrinsic>("int_wasm_load"#vec.lane_bits#"_zero");
   defvar inst = "LOAD_ZERO_"#vec;
-defm : LoadPatNoOffset<vec.vt, loadpat, inst>;
-defm : LoadPatImmOff<vec.vt, loadpat, regPlusImm, inst>;
-defm : LoadPatImmOff<vec.vt, loadpat, or_is_add, inst>;
-defm : LoadPatOffsetOnly<vec.vt, loadpat, inst>;
-defm : LoadPatGlobalAddrOffOnly<vec.vt, loadpat, inst>;
+  defvar pat = PatFrag<(ops node:$ptr),
+    (vector_insert (vec.splat (vec.lane_vt 0)), (vec.lane_vt (load $ptr)), 0)>;
+  defm : LoadPatNoOffset<vec.vt, pat, inst>;
+  defm : LoadPatImmOff<vec.vt, pat, regPlusImm, inst>;
+  defm : LoadPatImmOff<vec.vt, pat, or_is_add, inst>;
+  defm : LoadPatOffsetOnly<vec.vt, pat, inst>;
+  defm : LoadPatGlobalAddrOffOnly<vec.vt, pat, inst>;
 }
 
 // Load lane
 multiclass SIMDLoadLane<Vec vec, bits<32> simdop> {
   defvar name = "v128.load"#vec.lane_bits#"_lane";
   let mayLoad = 1, UseNamedOperandTable = 1 in {
   defm LOAD_LANE_#vec#_A32 :
     SIMD_I<(outs V128:$dst),

llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll

 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    v128.store32_lane 0, 0
 ; CHECK-NEXT:    # fallthrough-return
   %x = extractelement <4 x i32> %v, i32 0
   store i32 %x, i32* %p, align 8
   ret void
 }
 
+define <4 x i32> @load_zero_i32_a1(i32* %p) {
+; CHECK-LABEL: load_zero_i32_a1:
+; CHECK:         .functype load_zero_i32_a1 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load32_zero 0:p2align=0
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i32, i32* %p, align 1
+  %v = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
+  ret <4 x i32> %v
+}
+
+define <4 x i32> @load_zero_i32_a2(i32* %p) {
+; CHECK-LABEL: load_zero_i32_a2:
+; CHECK:         .functype load_zero_i32_a2 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load32_zero 0:p2align=1
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i32, i32* %p, align 2
+  %v = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
+  ret <4 x i32> %v
+}
+
+; 4 is the default alignment for v128.load32_zero so no attribute is needed.
+define <4 x i32> @load_zero_i32_a4(i32* %p) {
+; CHECK-LABEL: load_zero_i32_a4:
+; CHECK:         .functype load_zero_i32_a4 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load32_zero 0
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i32, i32* %p, align 4
+  %v = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
+  ret <4 x i32> %v
+}
+
+; 8 is greater than the default alignment so it is ignored.
+define <4 x i32> @load_zero_i32_a8(i32* %p) {
+; CHECK-LABEL: load_zero_i32_a8:
+; CHECK:         .functype load_zero_i32_a8 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load32_zero 0
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i32, i32* %p, align 8
+  %v = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
+  ret <4 x i32> %v
+}
+
 ; ==============================================================================
 ; 2 x i64
 ; ==============================================================================
 
 define <2 x i64> @load_v2i64_a1(<2 x i64> *%p) {
 ; CHECK-LABEL: load_v2i64_a1:
 ; CHECK:         .functype load_v2i64_a1 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:

 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    v128.store64_lane 0, 0
 ; CHECK-NEXT:    # fallthrough-return
   %x = extractelement <2 x i64> %v, i32 0
   store i64 %x, i64* %p, align 16
   ret void
 }
 
+define <2 x i64> @load_zero_i64_a1(i64* %p) {
+; CHECK-LABEL: load_zero_i64_a1:
+; CHECK:         .functype load_zero_i64_a1 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load64_zero 0:p2align=0
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i64, i64* %p, align 1
+  %v = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
+  ret <2 x i64> %v
+}
+
+define <2 x i64> @load_zero_i64_a2(i64* %p) {
+; CHECK-LABEL: load_zero_i64_a2:
+; CHECK:         .functype load_zero_i64_a2 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load64_zero 0:p2align=1
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i64, i64* %p, align 2
+  %v = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
+  ret <2 x i64> %v
+}
+
+define <2 x i64> @load_zero_i64_a4(i64* %p) {
+; CHECK-LABEL: load_zero_i64_a4:
+; CHECK:         .functype load_zero_i64_a4 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load64_zero 0:p2align=2
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i64, i64* %p, align 4
+  %v = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
+  ret <2 x i64> %v
+}
+
+; 8 is the default alignment for v128.load64_zero so no attribute is needed.
+define <2 x i64> @load_zero_i64_a8(i64* %p) {
+; CHECK-LABEL: load_zero_i64_a8:
+; CHECK:         .functype load_zero_i64_a8 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load64_zero 0
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i64, i64* %p, align 8
+  %v = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
+  ret <2 x i64> %v
+}
+
+; 16 is greater than the default alignment so it is ignored.
+define <2 x i64> @load_zero_i64_a16(i64* %p) {
+; CHECK-LABEL: load_zero_i64_a16:
+; CHECK:         .functype load_zero_i64_a16 (i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    local.get 0
+; CHECK-NEXT:    v128.load64_zero 0
+; CHECK-NEXT:    # fallthrough-return
+  %x = load i64, i64* %p, align 16
+  %v = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
+  ret <2 x i64> %v
+}
+
 ; ==============================================================================
 ; 4 x float
 ; ==============================================================================
 
 define <4 x float> @load_v4f32_a1(<4 x float> *%p) {
 ; CHECK-LABEL: load_v4f32_a1:
 ; CHECK:         .functype load_v4f32_a1 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:

llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ; Test SIMD v128.load{32,64}_zero instructions
 
 target triple = "wasm32-unknown-unknown"
 
-declare <4 x i32> @llvm.wasm.load32.zero(i32*)
-declare <2 x i64> @llvm.wasm.load64.zero(i64*)
-
 ;===----------------------------------------------------------------------------
 ; v128.load32_zero
 ;===----------------------------------------------------------------------------
 
 define <4 x i32> @load_zero_i32_no_offset(i32* %p) {
 ; CHECK-LABEL: load_zero_i32_no_offset:
 ; CHECK:         .functype load_zero_i32_no_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v128.load32_zero 0:p2align=0
+; CHECK-NEXT:    v128.load32_zero 0
 ; CHECK-NEXT:    # fallthrough-return
-  %v = tail call <4 x i32> @llvm.wasm.load32.zero(i32* %p)
+  %x = load i32, i32* %p
+  %v = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %v
 }
 
 define <4 x i32> @load_zero_i32_with_folded_offset(i32* %p) {
 ; CHECK-LABEL: load_zero_i32_with_folded_offset:
 ; CHECK:         .functype load_zero_i32_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v128.load32_zero 24:p2align=0
+; CHECK-NEXT:    v128.load32_zero 24
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i32*
-  %t = tail call <4 x i32> @llvm.wasm.load32.zero(i32* %s)
+  %x = load i32, i32* %s
+  %t = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %t
 }
 
 define <4 x i32> @load_zero_i32_with_folded_gep_offset(i32* %p) {
 ; CHECK-LABEL: load_zero_i32_with_folded_gep_offset:
 ; CHECK:         .functype load_zero_i32_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v128.load32_zero 24:p2align=0
+; CHECK-NEXT:    v128.load32_zero 24
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i32, i32* %p, i32 6
-  %t = tail call <4 x i32> @llvm.wasm.load32.zero(i32* %s)
+  %x = load i32, i32* %s
+  %t = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %t
 }
 
 define <4 x i32> @load_zero_i32_with_unfolded_gep_negative_offset(i32* %p) {
 ; CHECK-LABEL: load_zero_i32_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_zero_i32_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -24
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v128.load32_zero 0:p2align=0
+; CHECK-NEXT:    v128.load32_zero 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i32, i32* %p, i32 -6
-  %t = tail call <4 x i32> @llvm.wasm.load32.zero(i32* %s)
+  %x = load i32, i32* %s
+  %t = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %t
 }
 
 define <4 x i32> @load_zero_i32_with_unfolded_offset(i32* %p) {
 ; CHECK-LABEL: load_zero_i32_with_unfolded_offset:
 ; CHECK:         .functype load_zero_i32_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 24
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v128.load32_zero 0:p2align=0
+; CHECK-NEXT:    v128.load32_zero 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i32* %p to i32
   %r = add nsw i32 %q, 24
   %s = inttoptr i32 %r to i32*
-  %t = tail call <4 x i32> @llvm.wasm.load32.zero(i32* %s)
+  %x = load i32, i32* %s
+  %t = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %t
 }
 
 define <4 x i32> @load_zero_i32_with_unfolded_gep_offset(i32* %p) {
 ; CHECK-LABEL: load_zero_i32_with_unfolded_gep_offset:
 ; CHECK:         .functype load_zero_i32_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 24
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v128.load32_zero 0:p2align=0
+; CHECK-NEXT:    v128.load32_zero 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr i32, i32* %p, i32 6
-  %t = tail call <4 x i32> @llvm.wasm.load32.zero(i32* %s)
+  %x = load i32, i32* %s
+  %t = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %t
 }
 
 define <4 x i32> @load_zero_i32_from_numeric_address() {
 ; CHECK-LABEL: load_zero_i32_from_numeric_address:
 ; CHECK:         .functype load_zero_i32_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v128.load32_zero 42:p2align=0
+; CHECK-NEXT:    v128.load32_zero 42
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 42 to i32*
-  %t = tail call <4 x i32> @llvm.wasm.load32.zero(i32* %s)
+  %x = load i32, i32* %s
+  %t = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %t
 }
 
 @gv_i32 = global i32 0
 define <4 x i32> @load_zero_i32_from_global_address() {
 ; CHECK-LABEL: load_zero_i32_from_global_address:
 ; CHECK:         .functype load_zero_i32_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v128.load32_zero gv_i32:p2align=0
+; CHECK-NEXT:    v128.load32_zero gv_i32
 ; CHECK-NEXT:    # fallthrough-return
-  %t = tail call <4 x i32> @llvm.wasm.load32.zero(i32* @gv_i32)
+  %x = load i32, i32* @gv_i32
+  %t = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
   ret <4 x i32> %t
 }
 
 ;===----------------------------------------------------------------------------
 ; v128.load64_zero
 ;===----------------------------------------------------------------------------
 
 define <2 x i64> @load_zero_i64_no_offset(i64* %p) {
 ; CHECK-LABEL: load_zero_i64_no_offset:
 ; CHECK:         .functype load_zero_i64_no_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v128.load64_zero 0:p2align=0
+; CHECK-NEXT:    v128.load64_zero 0
 ; CHECK-NEXT:    # fallthrough-return
-  %v = tail call <2 x i64> @llvm.wasm.load64.zero(i64* %p)
+  %x = load i64, i64* %p
+  %v = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %v
 }
 
 define <2 x i64> @load_zero_i64_with_folded_offset(i64* %p) {
 ; CHECK-LABEL: load_zero_i64_with_folded_offset:
 ; CHECK:         .functype load_zero_i64_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v128.load64_zero 24:p2align=0
+; CHECK-NEXT:    v128.load64_zero 24
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i64* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i64*
-  %t = tail call <2 x i64> @llvm.wasm.load64.zero(i64* %s)
+  %x = load i64, i64* %s
+  %t = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %t
 }
 
 define <2 x i64> @load_zero_i64_with_folded_gep_offset(i64* %p) {
 ; CHECK-LABEL: load_zero_i64_with_folded_gep_offset:
 ; CHECK:         .functype load_zero_i64_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v128.load64_zero 48:p2align=0
+; CHECK-NEXT:    v128.load64_zero 48
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i64, i64* %p, i64 6
-  %t = tail call <2 x i64> @llvm.wasm.load64.zero(i64* %s)
+  %x = load i64, i64* %s
+  %t = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %t
 }
 
 define <2 x i64> @load_zero_i64_with_unfolded_gep_negative_offset(i64* %p) {
 ; CHECK-LABEL: load_zero_i64_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_zero_i64_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -48
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v128.load64_zero 0:p2align=0
+; CHECK-NEXT:    v128.load64_zero 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i64, i64* %p, i64 -6
-  %t = tail call <2 x i64> @llvm.wasm.load64.zero(i64* %s)
+  %x = load i64, i64* %s
+  %t = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %t
 }
 
 define <2 x i64> @load_zero_i64_with_unfolded_offset(i64* %p) {
 ; CHECK-LABEL: load_zero_i64_with_unfolded_offset:
 ; CHECK:         .functype load_zero_i64_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 24
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v128.load64_zero 0:p2align=0
+; CHECK-NEXT:    v128.load64_zero 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i64* %p to i32
   %r = add nsw i32 %q, 24
   %s = inttoptr i32 %r to i64*
-  %t = tail call <2 x i64> @llvm.wasm.load64.zero(i64* %s)
+  %x = load i64, i64* %s
+  %t = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %t
 }
 
 define <2 x i64> @load_zero_i64_with_unfolded_gep_offset(i64* %p) {
 ; CHECK-LABEL: load_zero_i64_with_unfolded_gep_offset:
 ; CHECK:         .functype load_zero_i64_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 48
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v128.load64_zero 0:p2align=0
+; CHECK-NEXT:    v128.load64_zero 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr i64, i64* %p, i64 6
-  %t = tail call <2 x i64> @llvm.wasm.load64.zero(i64* %s)
+  %x = load i64, i64* %s
+  %t = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %t
 }
 
 define <2 x i64> @load_zero_i64_from_numeric_address() {
 ; CHECK-LABEL: load_zero_i64_from_numeric_address:
 ; CHECK:         .functype load_zero_i64_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v128.load64_zero 42:p2align=0
+; CHECK-NEXT:    v128.load64_zero 42
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 42 to i64*
-  %t = tail call <2 x i64> @llvm.wasm.load64.zero(i64* %s)
+  %x = load i64, i64* %s
+  %t = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %t
 }
 
 @gv_i64 = global i64 0
 define <2 x i64> @load_zero_i64_from_global_address() {
 ; CHECK-LABEL: load_zero_i64_from_global_address:
 ; CHECK:         .functype load_zero_i64_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v128.load64_zero gv_i64:p2align=0
+; CHECK-NEXT:    v128.load64_zero gv_i64
 ; CHECK-NEXT:    # fallthrough-return
-  %t = tail call <2 x i64> @llvm.wasm.load64.zero(i64* @gv_i64)
+  %x = load i64, i64* @gv_i64
+  %t = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
   ret <2 x i64> %t
 }