[AIX] Use AsmParser to do inline asm parsing

[jsji]

Summary

Add a flag so that target can choose to use AsmParser for parsing inline asm.
And set the flag by default for AIX.

-no-intergrated-as will override this default if specified explicitly.

[shchenz]

Seems the X86 failures in the premerge tests need to be addressed. A little strange why that assertion only happens on X86 target.

[jsji]

In D105314#2854516, @shchenz wrote:

Seems the X86 failures in the premerge tests need to be addressed. A little strange why that assertion only happens on X86 target.

That is because this depends on D105259, I have set the parent revision now.

[jsji]

To trigger premerget tests again.

[shchenz]

In D105314#2854603, @jsji wrote:

In D105314#2854516, @shchenz wrote:

Seems the X86 failures in the premerge tests need to be addressed. A little strange why that assertion only happens on X86 target.

That is because this depends on D105259, I have set the parent revision now.

Ah, OK, LGTM. Thanks

llvm/include/llvm/MC/MCAsmInfo.h

protected:
 
   /// Should we use the integrated assembler?
   /// The integrated assembler should be enabled by default (by the
   /// constructors) when failing to parse a valid piece of assembly (inline
   /// or otherwise) is considered a bug. It may then be overridden after
   /// construction (see LLVMTargetMachine::initAsmInfo()).
   bool UseIntegratedAssembler;
 
+  /// Use AsmParser to parse inlineAsm when UseIntegratedAssembler is not set.
+  bool ParseInlineAsmUsingAsmParser;
+
   /// Preserve Comments in assembly
   bool PreserveAsmComments;
 
   /// Compress DWARF debug sections. Defaults to no compression.
   DebugCompressionType CompressDebugSections = DebugCompressionType::None;
 
   /// True if the integrated assembler should interpret 'a >> b' constant
   /// expressions as logical rather than arithmetic.
public:
 
   void setBinutilsVersion(std::pair<int, int> Value) {
     BinutilsVersion = Value;
   }
 
   /// Return true if assembly (inline or otherwise) should be parsed.
   bool useIntegratedAssembler() const { return UseIntegratedAssembler; }
 
+  /// Return true if target want to use AsmParser to parse inlineasm.
+  bool parseInlineAsmUsingAsmParser() const {
+    return ParseInlineAsmUsingAsmParser;
+  }
+
   bool binutilsIsAtLeast(int Major, int Minor) const {
     return BinutilsVersion >= std::make_pair(Major, Minor);
   }
 
   /// Set whether assembly (inline or otherwise) should be parsed.
   virtual void setUseIntegratedAssembler(bool Value) {
     UseIntegratedAssembler = Value;
   }
 
+  /// Set whether target want to use AsmParser to parse inlineasm.
+  virtual void setParseInlineAsmUsingAsmParser(bool Value) {
+    ParseInlineAsmUsingAsmParser = Value;
+  }
+
   /// Return true if assembly (inline or otherwise) should be parsed.
   bool preserveAsmComments() const { return PreserveAsmComments; }
 
   /// Set whether assembly (inline or otherwise) should be parsed.
   virtual void setPreserveAsmComments(bool Value) {
     PreserveAsmComments = Value;
   }
 

llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp

void AsmPrinter::emitInlineAsm(StringRef Str, const MCSubtargetInfo &STI,
   assert(!Str.empty() && "Can't emit empty inline asm block");
 
   // Remember if the buffer is nul terminated or not so we can avoid a copy.
   bool isNullTerminated = Str.back() == 0;
   if (isNullTerminated)
     Str = Str.substr(0, Str.size()-1);
 
   // If the output streamer does not have mature MC support or the integrated
-  // assembler has been disabled, just emit the blob textually.
+  // assembler has been disabled or not required, just emit the blob textually.
   // Otherwise parse the asm and emit it via MC support.
   // This is useful in case the asm parser doesn't handle something but the
   // system assembler does.
   const MCAsmInfo *MCAI = TM.getMCAsmInfo();
   assert(MCAI && "No MCAsmInfo");
   if (!MCAI->useIntegratedAssembler() &&
+      !MCAI->parseInlineAsmUsingAsmParser() &&
       !OutStreamer->isIntegratedAssemblerRequired()) {
     emitInlineAsmStart();
     OutStreamer->emitRawText(Str);
     emitInlineAsmEnd(STI, nullptr);
     return;
   }
 
   unsigned BufNum = addInlineAsmDiagBuffer(Str, LocMDNode);

llvm/lib/CodeGen/LLVMTargetMachine.cpp

void LLVMTargetMachine::initAsmInfo() {
   // Provide the user with a useful error message about what's wrong.
   assert(TmpAsmInfo && "MCAsmInfo not initialized. "
          "Make sure you include the correct TargetSelect.h"
          "and that InitializeAllTargetMCs() is being invoked!");
 
   if (Options.BinutilsVersion.first > 0)
     TmpAsmInfo->setBinutilsVersion(Options.BinutilsVersion);
 
-  if (Options.DisableIntegratedAS)
+  if (Options.DisableIntegratedAS) {
     TmpAsmInfo->setUseIntegratedAssembler(false);
+    // If there is explict option disable integratedAS, we can't use it for
+    // inlineasm either.
+    TmpAsmInfo->setParseInlineAsmUsingAsmParser(false);
+  }
 
   TmpAsmInfo->setPreserveAsmComments(Options.MCOptions.PreserveAsmComments);
 
   TmpAsmInfo->setCompressDebugSections(Options.CompressDebugSections);
 
   TmpAsmInfo->setRelaxELFRelocations(Options.RelaxELFRelocations);
 
   if (Options.ExceptionModel != ExceptionHandling::None)

llvm/lib/MC/MCAsmInfo.cpp

MCAsmInfo::MCAsmInfo() {
   // - Windows always enables the integrated assembler by default
   //   - MCAsmInfoCOFF is handling this case, should it be MCAsmInfoMicrosoft?
   // - MachO targets always enables the integrated assembler by default
   //   - MCAsmInfoDarwin is handling this case
   // - Generic_GCC toolchains enable the integrated assembler on a per
   //   architecture basis.
   //   - The target subclasses for AArch64, ARM, and X86 handle these cases
   UseIntegratedAssembler = true;
+  ParseInlineAsmUsingAsmParser = false;
   PreserveAsmComments = true;
 }
 
 MCAsmInfo::~MCAsmInfo() = default;
 
 void MCAsmInfo::addInitialFrameState(const MCCFIInstruction &Inst) {
   InitialFrameState.push_back(Inst);
 }

llvm/lib/MC/MCAsmInfoXCOFF.cpp

MCAsmInfoXCOFF::MCAsmInfoXCOFF() {
   // alignment.
   Data16bitsDirective = "\t.vbyte\t2, ";
   Data32bitsDirective = "\t.vbyte\t4, ";
 
   COMMDirectiveAlignmentIsInBytes = false;
   LCOMMDirectiveAlignmentType = LCOMM::Log2Alignment;
   HasDotTypeDotSizeDirective = false;
   UseIntegratedAssembler = false;
+  ParseInlineAsmUsingAsmParser = true;
   NeedsFunctionDescriptors = true;
 
   ExceptionsType = ExceptionHandling::AIX;
 }
 
 bool MCAsmInfoXCOFF::isAcceptableChar(char C) const {
   // QualName is allowed for a MCSymbolXCOFF, and
   // QualName contains '[' and ']'.
   if (C == '[' || C == ']')
     return true;
 
   // For AIX assembler, symbols may consist of numeric digits,
   // underscores, periods, uppercase or lowercase letters, or
   // any combination of these.
   return isAlnum(C) || C == '_' || C == '.';
 }

llvm/test/CodeGen/PowerPC/inline-asm-label.ll

+; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
+; RUN:     -mtriple=powerpc-unknown-aix < %s  | FileCheck %s
+
+; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
+; RUN:     -mtriple=powerpc64-unknown-aix < %s | FileCheck %s
+
+; RUN: llc -mcpu=pwr7 -verify-machineinstrs -no-integrated-as \
+; RUN:     -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=NOIS
+
+
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local signext i32 @NoBarrier_CompareAndSwap(i32* %ptr, i32 signext %old_value, i32 signext %new_value) #0 {
+; CHECK-LABEL: NoBarrier_CompareAndSwap:
+; CHECK:    #APP
+; CHECK-NEXT:  L..tmp0:
+; CHECK-NEXT:    lwarx 6, 0, 3
+; CHECK-NEXT:    cmpw 4, 6
+; CHECK-NEXT:    bne- 0, L..tmp1
+; CHECK-NEXT:    stwcx. 5, 0, 3
+; CHECK-NEXT:    bne- 0, L..tmp0
+; CHECK-NEXT:  L..tmp1:
+
+; NOIS-LABEL: NoBarrier_CompareAndSwap:
+; NOIS:    #APP
+; NOIS-NEXT: 1: lwarx 6, 0, 3
+; NOIS-NEXT:    cmpw 4, 6
+; NOIS-NEXT:    bne- 2f
+; NOIS-NEXT:    stwcx. 5, 0, 3
+; NOIS-NEXT:    bne- 1b
+; NOIS-NEXT: 2:
+
+entry:
+  %ptr.addr = alloca i32*, align 8                                                                                                                                            %old_value.addr = alloca i32, align 4
+  %new_value.addr = alloca i32, align 4
+  %result = alloca i32, align 4
+  store i32* %ptr, i32** %ptr.addr, align 8
+  store i32 %old_value, i32* %old_value.addr, align 4
+  store i32 %new_value, i32* %new_value.addr, align 4
+  %0 = load i32*, i32** %ptr.addr, align 8
+  %1 = load i32, i32* %old_value.addr, align 4
+  %2 = load i32, i32* %new_value.addr, align 4
+  %3 = call i32 asm sideeffect "1:     lwarx $0, $4, $1   \0A\09       cmpw $2, $0             \0A\09       bne- 2f                         \0A\09       stwcx. $3, $4, $1  \0A\09       bne- 1b                         \0A\092:                                     \0A\09", "=&b,b,b,b,i,~{cr0},~{ctr}"(i32* %0, i32 %1, i32 %2, i32 0)
+  store i32 %3, i32* %result, align 4
+  %4 = load i32, i32* %result, align 4
+  ret i32 %4
+}
+

llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll

 ; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
 ; RUN:     -mtriple=powerpc-unknown-aix < %s  | FileCheck %s
 
 ; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
 ; RUN:     -mtriple=powerpc64-unknown-aix < %s | FileCheck %s
 
 
 define dso_local double @test_double(double %a, double %b) {
 entry:
   %0 = tail call double asm "fadd. $0,$1,$2\0A", "={f31},d,d,0"(double %a, double %b, double 0.000000e+00)
   ret double %0
 }
 
 ; CHECK-LABEL: test_double
 ; CHECK:         #APP
-; CHECK-NEXT:    fadd. 31,1,2
+; CHECK-NEXT:    fadd. 31, 1, 2
 
 define dso_local signext i32 @test_int(double %a, double %b) {
 entry:
   %0 = tail call i32 asm "fadd. $0,$1,$2\0A", "={f0},d,d,0"(double %a, double %b, i32 0)
   ret i32 %0
 }
 
 ; CHECK-LABEL: test_int
 ; CHECK:         #APP
-; CHECK-NEXT:    fadd. 0,1,2
+; CHECK-NEXT:    fadd. 0, 1, 2