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[RISCV] Remove earlyclobber from vnsrl/vnsra/vnclip(u) when the source and dest are a single vector register.
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Authored by craig.topper on May 28 2021, 5:39 PM.

Details

Summary

This guarantees they meet this overlap exception.

"The destination EEW is smaller than the source EEW and the overlap
is in the lowest-numbered part of the source register group"

Being a single register guarantees the overlap is always in the
lowerst-number part of the group.

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Event Timeline

craig.topper created this revision.May 28 2021, 5:39 PM
craig.topper requested review of this revision.May 28 2021, 5:39 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 28 2021, 5:39 PM
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khchen accepted this revision.May 29 2021, 7:35 AM

Good catch! LGTM.

This revision is now accepted and ready to land.May 29 2021, 7:35 AM