[clang][ARM] Remove arm2/3/6/7m CPU names

[DavidSpickett]

Summary

These legacy CPUs are known to clang but not llvm.
Their use was ignored by llvm and it would print a
warning saying it did not recognise them.

However because some of them are default CPUs for their
architecture, you would get those warnings even if you didn't
choose a cpu explicitly.
(now those architectures will default to a "generic" CPU)

Information is thin on the ground for these older chips
so this is the best I could find:
https://en.wikichip.org/wiki/acorn/microarchitectures/arm2
https://en.wikichip.org/wiki/acorn/microarchitectures/arm3
https://en.wikichip.org/wiki/arm_holdings/microarchitectures/arm6
https://en.wikichip.org/wiki/arm_holdings/microarchitectures/arm7

Final part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.

[DavidSpickett]

@nickdesaulniers With this you won't get warnings for https://github.com/ClangBuiltLinux/linux/issues/921.

[peter.smith]

Does LLVM generate correct code for those architectures? For example armv3 doesn't have BX LR, it must use MOV PC, LR or emit BX LR with an R_ARM_V4BX relocation so the linker can transform it. From memory I think armv2 doesn't even use 32-bit addresses, the flags were stored in the top 8 bits.

[efriedma]

The ARM documentation people usually use doesn't document anything older than v4, and I've never seen anyone use those targets. I'd rather just reject them from clang.

[DavidSpickett]

@nickdesaulniers Can you confirm whether the kernel CI report you got was intentionally setting armv3m? If the build isn't setting an mcpu then removing the CPUs won't actually break it, though what it generates likely wouldn't run correctly.

In the meantime I will have a scan through the code and see if this armv4 minimum is evident in llvm. Then update this change to remove the CPUs from clang.

[nickdesaulniers]

In D103028#2778991, @DavidSpickett wrote:

@nickdesaulniers Can you confirm whether the kernel CI report you got was intentionally setting armv3m? If the build isn't setting an mcpu then removing the CPUs won't actually break it, though what it generates likely wouldn't run correctly.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/Makefile#n74 explicitly sets -march=armv3m, when trying to build CONFIG_CPU_32v3. We don't yet support v4 or v4t FWIW.

[efriedma]

I found some discussion at https://patchwork.kernel.org/project/linux-arm-kernel/patch/[e-mail]/ . Apparently, the kernel is actually intentionally building for "ARMv3M" by default, to support some ancient hardware that doesn't support all the armv4 instructions. LLVM doesn't support this at the moment. We shouldn't accept -march=armv3m unless we're actually going to generate correct code for it.

We don't yet support v4 or v4t FWIW.

Not sure what you mean by this?

[nickdesaulniers]

In D103028#2791630, @efriedma wrote:

I found some discussion at https://patchwork.kernel.org/project/linux-arm-kernel/patch/[e-mail]/ . Apparently, the kernel is actually intentionally building for "ARMv3M" by default,

(when targeting armv3 hardware, not in general)

to support some ancient hardware that doesn't support all the armv4 instructions. LLVM doesn't support this at the moment. We shouldn't accept -march=armv3m unless we're actually going to generate correct code for it.

We don't yet support v4 or v4t FWIW.

Not sure what you mean by this?

Folks building the Linux kernel with Clang do not have working configurations of the Linux kernel that target ARMv4 hardware. I don't know the list of blockers, and it's not a high priority. Clang may support ARMv4, but that doesn't mean a kernel with such configuration with build let alone boot.

[DavidSpickett]

Instead of adding CPUs to llvm, remove them from clang.

If anyone was using them they weren't making any difference,
apart from generating warnings.

I checked the linux tree and found only 2 similair strings.
A Freescale "Armardillo2" aka arm2 board, which is actually using
a cortex A-9, and a comment in a file for the ARM720 which
is actually an ARM7TDMI-S CPU.

Whether we generate correct code for pre v4 is a
question for a different time, so the architectures remain.

[DavidSpickett]

clang/test/Misc/target-invalid-cpu-note.c

4

Despite the triple being armv5, clang just prints every CPU it knows about. The arm8 is now the first one.

[efriedma]

LGTM

[DavidSpickett]

Clang format

clang/test/Misc/target-invalid-cpu-note.c

 // RUN: not %clang_cc1 -triple armv5--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix ARM
 // ARM: error: unknown target CPU 'not-a-cpu'
 // ARM: note: valid target CPU values are:
-// ARM-SAME: arm2
+// ARM-SAME: arm8
 
 // RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AARCH64
 // AARCH64: error: unknown target CPU 'not-a-cpu'
 // AARCH64: note: valid target CPU values are:
 // AARCH64-SAME: cortex-a35,
 
 // RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_AARCH64
 // TUNE_AARCH64: error: unknown target CPU 'not-a-cpu'

llvm/include/llvm/Support/ARMTargetParser.def

 ARM_HW_DIV_NAME("thumb", ARM::AEK_HWDIVTHUMB)
 ARM_HW_DIV_NAME("arm", ARM::AEK_HWDIVARM)
 ARM_HW_DIV_NAME("arm,thumb", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB))
 #undef ARM_HW_DIV_NAME
 
 #ifndef ARM_CPU_NAME
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)
 #endif
-ARM_CPU_NAME("arm2", ARMV2, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm3", ARMV2A, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm6", ARMV3, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm7m", ARMV3M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("arm8", ARMV4, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("arm810", ARMV4, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("strongarm", ARMV4, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("strongarm110", ARMV4, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("strongarm1100", ARMV4, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("strongarm1110", ARMV4, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("arm7tdmi", ARMV4T, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("arm7tdmi-s", ARMV4T, FK_NONE, false, ARM::AEK_NONE)

llvm/unittests/Support/TargetParserTest.cpp

 // of the default extensions for its architecture and for the CPU.
 // So if a CPU has no extra extensions, it adds AEK_NONE.
 INSTANTIATE_TEST_SUITE_P(
     ARMCPUTestsPart1, ARMCPUTestFixture,
     ::testing::Values(
         ARMCPUTestParams("invalid", "invalid", "invalid", ARM::AEK_NONE, ""),
         ARMCPUTestParams("generic", "invalid", "none", ARM::AEK_NONE, ""),
 
-        ARMCPUTestParams("arm2", "armv2", "none", ARM::AEK_NONE, "2"),
-        ARMCPUTestParams("arm3", "armv2a", "none", ARM::AEK_NONE, "2A"),
-        ARMCPUTestParams("arm6", "armv3", "none", ARM::AEK_NONE, "3"),
-        ARMCPUTestParams("arm7m", "armv3m", "none", ARM::AEK_NONE, "3M"),
         ARMCPUTestParams("arm8", "armv4", "none", ARM::AEK_NONE, "4"),
         ARMCPUTestParams("arm810", "armv4", "none", ARM::AEK_NONE, "4"),
         ARMCPUTestParams("strongarm", "armv4", "none", ARM::AEK_NONE, "4"),
         ARMCPUTestParams("strongarm110", "armv4", "none", ARM::AEK_NONE, "4"),
         ARMCPUTestParams("strongarm1100", "armv4", "none", ARM::AEK_NONE, "4"),
         ARMCPUTestParams("strongarm1110", "armv4", "none", ARM::AEK_NONE, "4"),
         ARMCPUTestParams("arm7tdmi", "armv4t", "none", ARM::AEK_NONE, "4T"),
         ARMCPUTestParams("arm7tdmi-s", "armv4t", "none", ARM::AEK_NONE, "4T"),
::testing::Values(
                              ARM::AEK_FP16,
                          "8.1-M.Mainline"),
         ARMCPUTestParams("iwmmxt", "iwmmxt", "none", ARM::AEK_NONE, "iwmmxt"),
         ARMCPUTestParams("xscale", "xscale", "none", ARM::AEK_NONE, "xscale"),
         ARMCPUTestParams("swift", "armv7s", "neon-vfpv4",
                          ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP,
                          "7-S")));
 
-static constexpr unsigned NumARMCPUArchs = 90;
+static constexpr unsigned NumARMCPUArchs = 86;
 
 TEST(TargetParserTest, testARMCPUArchList) {
   SmallVector<StringRef, NumARMCPUArchs> List;
   ARM::fillValidCPUArchList(List);
 
   // No list exists for these in this test suite, so ensure all are
   // valid, and match the expected 'magic' count.
   EXPECT_EQ(List.size(), NumARMCPUArchs);
bool testARMArch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
   Result &= ARM::getDefaultCPU(Arch).equals(DefaultCPU);
   Result &= ARM::getSubArch(AK).equals(SubArch);
   Result &= (ARM::getArchAttr(AK) == ArchAttr);
   return Result;
 }
 
 TEST(TargetParserTest, testARMArch) {
   EXPECT_TRUE(
-      testARMArch("armv2", "arm2", "v2",
-                          ARMBuildAttrs::CPUArch::Pre_v4));
+      testARMArch("armv2", "generic", "v2", ARMBuildAttrs::CPUArch::Pre_v4));
   EXPECT_TRUE(
-      testARMArch("armv2a", "arm3", "v2a",
-                          ARMBuildAttrs::CPUArch::Pre_v4));
+      testARMArch("armv2a", "generic", "v2a", ARMBuildAttrs::CPUArch::Pre_v4));
   EXPECT_TRUE(
-      testARMArch("armv3", "arm6", "v3",
-                          ARMBuildAttrs::CPUArch::Pre_v4));
+      testARMArch("armv3", "generic", "v3", ARMBuildAttrs::CPUArch::Pre_v4));
   EXPECT_TRUE(
-      testARMArch("armv3m", "arm7m", "v3m",
-                          ARMBuildAttrs::CPUArch::Pre_v4));
+      testARMArch("armv3m", "generic", "v3m", ARMBuildAttrs::CPUArch::Pre_v4));
   EXPECT_TRUE(
       testARMArch("armv4", "strongarm", "v4",
                           ARMBuildAttrs::CPUArch::v4));
   EXPECT_TRUE(
       testARMArch("armv4t", "arm7tdmi", "v4t",
                           ARMBuildAttrs::CPUArch::v4T));
   EXPECT_TRUE(
       testARMArch("armv5t", "arm10tdmi", "v5",

 }
 
 bool testARMExtension(StringRef CPUName,ARM::ArchKind ArchKind, StringRef ArchExt) {
   return ARM::getDefaultExtensions(CPUName, ArchKind) &
          ARM::parseArchExt(ArchExt);
 }
 
 TEST(TargetParserTest, testARMExtension) {
-  EXPECT_FALSE(testARMExtension("arm2", ARM::ArchKind::INVALID, "thumb"));
-  EXPECT_FALSE(testARMExtension("arm3", ARM::ArchKind::INVALID, "thumb"));
-  EXPECT_FALSE(testARMExtension("arm6", ARM::ArchKind::INVALID, "thumb"));
-  EXPECT_FALSE(testARMExtension("arm7m", ARM::ArchKind::INVALID, "thumb"));
   EXPECT_FALSE(testARMExtension("strongarm", ARM::ArchKind::INVALID, "dsp"));
   EXPECT_FALSE(testARMExtension("arm7tdmi", ARM::ArchKind::INVALID, "dsp"));
   EXPECT_FALSE(testARMExtension("arm10tdmi",
                                 ARM::ArchKind::INVALID, "simd"));
   EXPECT_FALSE(testARMExtension("arm1022e", ARM::ArchKind::INVALID, "simd"));
   EXPECT_FALSE(testARMExtension("arm926ej-s",
                                 ARM::ArchKind::INVALID, "simd"));
   EXPECT_FALSE(testARMExtension("arm1136jf-s",