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Differential D103022

[llvm][ARM] Remove non-existent arm1176j-s CPU
ClosedPublic

Authored by DavidSpickett on May 24 2021, 6:54 AM.

Details

Reviewers
nickdesaulniers
peter.smith
ostannard
Commits
rG0cd2629d97e7: [llvm][ARM] Remove non-existent arm1176j-s CPU
Summary

This was removed in https://reviews.llvm.org/D52594 for clang.

The one test using it has been updated to use the mpcore
CPU as the linked clang change does.

This is part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.

Diff Detail

Event Timeline

DavidSpickett created this revision.May 24 2021, 6:54 AM
Herald added subscribers: danielkiss, jdoerfert, hiraditya, kristof.beyls. · View Herald TranscriptMay 24 2021, 6:54 AM
DavidSpickett requested review of this revision.May 24 2021, 6:54 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 24 2021, 6:54 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
DavidSpickett added reviewers: nickdesaulniers, peter.smith, ostannard.May 24 2021, 6:55 AM
Harbormaster completed remote builds in B105899: Diff 347378.May 24 2021, 7:36 AM
peter.smith accepted this revision.May 24 2021, 8:47 AM

I can confirm that there is no arm1176j-s, all Arm 1176 processors had trustzone, denoted by z.

This revision is now accepted and ready to land.May 24 2021, 8:47 AM
Closed by commit rG0cd2629d97e7: [llvm][ARM] Remove non-existent arm1176j-s CPU (authored by DavidSpickett). · Explain WhyMay 25 2021, 1:57 AM
This revision was automatically updated to reflect the committed changes.
DavidSpickett added a commit: rG0cd2629d97e7: [llvm][ARM] Remove non-existent arm1176j-s CPU.

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
1 line
test/
CodeGen/
ARM/
6 lines
unittests/
Support/
2 lines

Diff 347378

llvm/lib/Target/ARM/ARM.td

Show First 20 Lines • Show All 1,004 Lines • ▼ Show 20 Linesdef : Processor<"cortex-m0", ARMV6Itineraries, [ARMv6m,
FeatureHasNoBranchPredictor]>; FeatureHasNoBranchPredictor]>;
def : Processor<"cortex-m0plus", ARMV6Itineraries, [ARMv6m, def : Processor<"cortex-m0plus", ARMV6Itineraries, [ARMv6m,
FeatureHasNoBranchPredictor]>; FeatureHasNoBranchPredictor]>;
def : Processor<"cortex-m1", ARMV6Itineraries, [ARMv6m, def : Processor<"cortex-m1", ARMV6Itineraries, [ARMv6m,
FeatureHasNoBranchPredictor]>; FeatureHasNoBranchPredictor]>;
def : Processor<"sc000", ARMV6Itineraries, [ARMv6m, def : Processor<"sc000", ARMV6Itineraries, [ARMv6m,
FeatureHasNoBranchPredictor]>; FeatureHasNoBranchPredictor]>;
def : Processor<"arm1176j-s", ARMV6Itineraries, [ARMv6kz]>;
def : Processor<"arm1176jz-s", ARMV6Itineraries, [ARMv6kz]>; def : Processor<"arm1176jz-s", ARMV6Itineraries, [ARMv6kz]>;
def : Processor<"arm1176jzf-s", ARMV6Itineraries, [ARMv6kz, def : Processor<"arm1176jzf-s", ARMV6Itineraries, [ARMv6kz,
FeatureVFP2, FeatureVFP2,
FeatureHasSlowFPVMLx]>; FeatureHasSlowFPVMLx]>;
def : Processor<"mpcorenovfp", ARMV6Itineraries, [ARMv6k]>; def : Processor<"mpcorenovfp", ARMV6Itineraries, [ARMv6k]>;
def : Processor<"mpcore", ARMV6Itineraries, [ARMv6k, def : Processor<"mpcore", ARMV6Itineraries, [ARMv6k,
FeatureVFP2, FeatureVFP2,
▲ Show 20 Lines • Show All 397 Lines • Show Last 20 Lines

llvm/test/CodeGen/ARM/build-attributes.ll

Show First 20 Lines • Show All 200 Lines • ▼ Show 20 Lines
; ARMv7m ; ARMv7m
; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv6 ; ARMv6
; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; ARMv6k ; ARMv6k
; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=mpcore 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED ; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED
; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; ARMv6m ; ARMv6m
; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv5 ; ARMv5
; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
▲ Show 20 Lines • Show All 1,530 Lines • Show Last 20 Lines

llvm/unittests/Support/TargetParserTest.cpp

//===----------- TargetParser.cpp - Target Parser -------------------------===// //===----------- TargetParser.cpp - Target Parser -------------------------===//
Lint: Lint
Inline Actions

clang-format not found in user’s local PATH; not linting file.

Lint: Lint: clang-format not found in user’s local PATH; not linting file.
// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
▲ Show 20 Lines • Show All 535 Lines • ▼ Show 20 LinesTEST(TargetParserTest, testARMExtension) {
EXPECT_FALSE(testARMExtension("arm7tdmi", ARM::ArchKind::INVALID, "dsp")); EXPECT_FALSE(testARMExtension("arm7tdmi", ARM::ArchKind::INVALID, "dsp"));
EXPECT_FALSE(testARMExtension("arm10tdmi", EXPECT_FALSE(testARMExtension("arm10tdmi",
ARM::ArchKind::INVALID, "simd")); ARM::ArchKind::INVALID, "simd"));
EXPECT_FALSE(testARMExtension("arm1022e", ARM::ArchKind::INVALID, "simd")); EXPECT_FALSE(testARMExtension("arm1022e", ARM::ArchKind::INVALID, "simd"));
EXPECT_FALSE(testARMExtension("arm926ej-s", EXPECT_FALSE(testARMExtension("arm926ej-s",
ARM::ArchKind::INVALID, "simd")); ARM::ArchKind::INVALID, "simd"));
EXPECT_FALSE(testARMExtension("arm1136jf-s", EXPECT_FALSE(testARMExtension("arm1136jf-s",
ARM::ArchKind::INVALID, "crypto")); ARM::ArchKind::INVALID, "crypto"));
EXPECT_FALSE(testARMExtension("arm1176j-s",
ARM::ArchKind::INVALID, "crypto"));
EXPECT_FALSE(testARMExtension("arm1156t2-s", EXPECT_FALSE(testARMExtension("arm1156t2-s",
ARM::ArchKind::INVALID, "crypto")); ARM::ArchKind::INVALID, "crypto"));
EXPECT_FALSE(testARMExtension("arm1176jzf-s", EXPECT_FALSE(testARMExtension("arm1176jzf-s",
ARM::ArchKind::INVALID, "crypto")); ARM::ArchKind::INVALID, "crypto"));
EXPECT_FALSE(testARMExtension("cortex-m0", EXPECT_FALSE(testARMExtension("cortex-m0",
ARM::ArchKind::INVALID, "crypto")); ARM::ArchKind::INVALID, "crypto"));
EXPECT_FALSE(testARMExtension("cortex-a8", EXPECT_FALSE(testARMExtension("cortex-a8",
ARM::ArchKind::INVALID, "crypto")); ARM::ArchKind::INVALID, "crypto"));
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