Page MenuHomePhabricator

[AArch64] Fix lowering for fshl/fshr with SVE types.
ClosedPublic

Authored by efriedma on Apr 29 2021, 2:43 PM.

Details

Summary

These operations don't exist natively, so just let the target-independent code expand to plain shifts.

The generated sequences could probably be optimized a bit more, but they seem good enough for now.

Diff Detail

Event Timeline

efriedma created this revision.Apr 29 2021, 2:43 PM
efriedma requested review of this revision.Apr 29 2021, 2:43 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 29 2021, 2:44 PM

The patch looks good to me. I just wondered if it was worth having at least one test using an illegal type, i.e. <vscale x 8 x i32> or something like that?

paulwalker-arm accepted this revision.Apr 30 2021, 3:24 AM

I'm not against adding the extra tests, which could also include the legal i8, i16 & i32 vector types, but for my money there's little new code here so I'm happy to assume the common expand/legalisation code is already well tested.

This revision is now accepted and ready to land.Apr 30 2021, 3:24 AM
This revision was landed with ongoing or failed builds.Apr 30 2021, 10:51 AM
This revision was automatically updated to reflect the committed changes.