This is an archive of the discontinued LLVM Phabricator instance.

Differential D101073

[X86]
AbandonedPublic

Authored by RKSimon on Apr 22 2021, 8:12 AM.

Details

Reviewers
None

Diff Detail

Event Timeline

RKSimon created this revision.Apr 22 2021, 8:12 AM
Herald added subscribers: pengfei, jfb, hiraditya. · View Herald TranscriptApr 22 2021, 8:12 AM
RKSimon requested review of this revision.Apr 22 2021, 8:12 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 22 2021, 8:12 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
RKSimon abandoned this revision.Apr 22 2021, 8:12 AM

premature patch creation..

Harbormaster completed remote builds in B100283: Diff 339645.Apr 22 2021, 10:08 AM

Revision Contents

Diff 339645

llvm/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 9,991 Lines • ▼ Show 20 Lines
"Unexpected setcc expansion!"); "Unexpected setcc expansion!");
if (IsStrict) if (IsStrict)
return DAG.getMergeValues({Op0, Chain}, dl); return DAG.getMergeValues({Op0, Chain}, dl);
return Op0; return Op0;
} }
} }
if (Op0.getSimpleValueType().isInteger()) { if (Op0.getSimpleValueType().isInteger()) {
// Attempt to canonicalize SGT/UGT compares with constants to use
// SGE/UGE instead - which will reduce the number of EFLAGs reads.
if (auto *Op1C = dyn_cast<ConstantSDNode>(Op1)) {
const APInt &Op1Val = Op1C->getAPIntValue();
if (!Op1Val.isNullValue() &&
((CC == ISD::CondCode::SETGT && !Op1Val.isMaxSignedValue()) ||
(CC == ISD::CondCode::SETUGT && !Op1Val.isMaxValue()))) {
// Only do this if incrementing the constant doesn't increase the bit
// encoding size.
APInt Op1ValPlusOne = Op1Val + 1;
if ((Op1Val.isSignedIntN(8) == Op1ValPlusOne.isSignedIntN(8)) &&
(Op1Val.isSignedIntN(32) == Op1ValPlusOne.isSignedIntN(32))) {
Op1 = DAG.getConstant(Op1ValPlusOne, dl, Op0.getValueType());
CC = CC == ISD::CondCode::SETGT ? ISD::CondCode::SETGE
: ISD::CondCode::SETUGE;
}
}
}
SDValue X86CC; SDValue X86CC;
SDValue EFLAGS = emitFlagsForSetcc(Op0, Op1, CC, dl, DAG, X86CC); SDValue EFLAGS = emitFlagsForSetcc(Op0, Op1, CC, dl, DAG, X86CC);
SDValue Res = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, X86CC, EFLAGS); SDValue Res = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, X86CC, EFLAGS);
return IsStrict ? DAG.getMergeValues({Res, Chain}, dl) : Res; return IsStrict ? DAG.getMergeValues({Res, Chain}, dl) : Res;
} }
// Handle floating point. // Handle floating point.
X86::CondCode CondCode = TranslateX86CC(CC, dl, /*IsFP*/ true, Op0, Op1, DAG); X86::CondCode CondCode = TranslateX86CC(CC, dl, /*IsFP*/ true, Op0, Op1, DAG);
▲ Show 20 Lines • Show All 9,991 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- ; RUN: llc < %s -mtriple=i686--
; RUN: llc -pre-RA-sched=source < %s -mtriple=i686-unknown-linux -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED ; RUN: llc -pre-RA-sched=source < %s -mtriple=i686-unknown-linux -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED
; PR2748 ; PR2748
@g_73 = external dso_local global i32 @g_73 = external dso_local global i32
@g_5 = external dso_local global i32 @g_5 = external dso_local global i32
define i32 @func_44(i16 signext %p_46) nounwind { define i32 @func_44(i16 signext %p_46) nounwind {
; SOURCE-SCHED-LABEL: func_44: ; SOURCE-SCHED-LABEL: func_44:
; SOURCE-SCHED: # %bb.0: # %entry ; SOURCE-SCHED: # %bb.0: # %entry
; SOURCE-SCHED-NEXT: subl $12, %esp ; SOURCE-SCHED-NEXT: subl $12, %esp
; SOURCE-SCHED-NEXT: movl g_5, %eax ; SOURCE-SCHED-NEXT: movl g_5, %eax
; SOURCE-SCHED-NEXT: sarl %eax ; SOURCE-SCHED-NEXT: sarl %eax
; SOURCE-SCHED-NEXT: xorl %ecx, %ecx ; SOURCE-SCHED-NEXT: xorl %ecx, %ecx
; SOURCE-SCHED-NEXT: cmpl $1, %eax ; SOURCE-SCHED-NEXT: cmpl $2, %eax
; SOURCE-SCHED-NEXT: setg %cl ; SOURCE-SCHED-NEXT: setge %cl
; SOURCE-SCHED-NEXT: movb g_73, %dl ; SOURCE-SCHED-NEXT: movb g_73, %dl
; SOURCE-SCHED-NEXT: xorl %eax, %eax ; SOURCE-SCHED-NEXT: xorl %eax, %eax
; SOURCE-SCHED-NEXT: subb {{[0-9]+}}(%esp), %al ; SOURCE-SCHED-NEXT: subb {{[0-9]+}}(%esp), %al
; SOURCE-SCHED-NEXT: testb %dl, %dl ; SOURCE-SCHED-NEXT: testb %dl, %dl
; SOURCE-SCHED-NEXT: jne .LBB0_2 ; SOURCE-SCHED-NEXT: jne .LBB0_2
; SOURCE-SCHED-NEXT: # %bb.1: # %bb11 ; SOURCE-SCHED-NEXT: # %bb.1: # %bb11
; SOURCE-SCHED-NEXT: movzbl %al, %eax ; SOURCE-SCHED-NEXT: movzbl %al, %eax
; SOURCE-SCHED-NEXT: divb %dl ; SOURCE-SCHED-NEXT: divb %dl
Show All 38 Lines

llvm/test/CodeGen/X86/atomic-eflags-reuse.ll

Show First 20 Lines • Show All 282 Lines • ▼ Show 20 Linesentry:
%tmp1 = icmp ne i64 %tmp0, 1 %tmp1 = icmp ne i64 %tmp0, 1
%tmp2 = zext i1 %tmp1 to i8 %tmp2 = zext i1 %tmp1 to i8
ret i8 %tmp2 ret i8 %tmp2
} }
define i8 @test_sub_1_cmp_1_setcc_ugt(i64* %p) #0 { define i8 @test_sub_1_cmp_1_setcc_ugt(i64* %p) #0 {
; CHECK-LABEL: test_sub_1_cmp_1_setcc_ugt: ; CHECK-LABEL: test_sub_1_cmp_1_setcc_ugt:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lock subq $1, (%rdi) ; CHECK-NEXT: movq $-1, %rax
; CHECK-NEXT: seta %al ; CHECK-NEXT: lock xaddq %rax, (%rdi)
; CHECK-NEXT: cmpq $2, %rax
; CHECK-NEXT: setae %al
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst %tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst
%tmp1 = icmp ugt i64 %tmp0, 1 %tmp1 = icmp ugt i64 %tmp0, 1
%tmp2 = zext i1 %tmp1 to i8 %tmp2 = zext i1 %tmp1 to i8
ret i8 %tmp2 ret i8 %tmp2
} }
Show All 22 Lines
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%tmp0 = atomicrmw sub i64* %p, i64 3 seq_cst %tmp0 = atomicrmw sub i64* %p, i64 3 seq_cst
%tmp1 = icmp eq i64 %tmp0, 3 %tmp1 = icmp eq i64 %tmp0, 3
%tmp2 = zext i1 %tmp1 to i8 %tmp2 = zext i1 %tmp1 to i8
ret i8 %tmp2 ret i8 %tmp2
} }
; FIXME: This test canonicalizes in a way that hides the fact that the
; comparison can be folded into the atomic subtract.
define i8 @test_sub_3_cmp_3_setcc_uge(i64* %p) #0 { define i8 @test_sub_3_cmp_3_setcc_uge(i64* %p) #0 {
; CHECK-LABEL: test_sub_3_cmp_3_setcc_uge: ; CHECK-LABEL: test_sub_3_cmp_3_setcc_uge:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq $-3, %rax ; CHECK-NEXT: lock subq $3, (%rdi)
; CHECK-NEXT: lock xaddq %rax, (%rdi) ; CHECK-NEXT: setae %al
; CHECK-NEXT: cmpq $2, %rax
; CHECK-NEXT: seta %al
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%tmp0 = atomicrmw sub i64* %p, i64 3 seq_cst %tmp0 = atomicrmw sub i64* %p, i64 3 seq_cst
%tmp1 = icmp uge i64 %tmp0, 3 %tmp1 = icmp uge i64 %tmp0, 3
%tmp2 = zext i1 %tmp1 to i8 %tmp2 = zext i1 %tmp1 to i8
ret i8 %tmp2 ret i8 %tmp2
} }
attributes #0 = { nounwind } attributes #0 = { nounwind }

llvm/test/CodeGen/X86/cmov.ll

Show First 20 Lines • Show All 153 Lines • ▼ Show 20 Lines
; Should compile to setcc | -2. ; Should compile to setcc | -2.
; rdar://6668608 ; rdar://6668608
define i32 @test5(i32* nocapture %P) nounwind readonly { define i32 @test5(i32* nocapture %P) nounwind readonly {
; CHECK-LABEL: test5: ; CHECK-LABEL: test5:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $41, (%rdi) ; CHECK-NEXT: cmpl $42, (%rdi)
; CHECK-NEXT: setg %al ; CHECK-NEXT: setge %al
; CHECK-NEXT: orl $-2, %eax ; CHECK-NEXT: orl $-2, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%0 = load i32, i32* %P, align 4 %0 = load i32, i32* %P, align 4
%1 = icmp sgt i32 %0, 41 %1 = icmp sgt i32 %0, 41
%iftmp.0.0 = select i1 %1, i32 -1, i32 -2 %iftmp.0.0 = select i1 %1, i32 -1, i32 -2
ret i32 %iftmp.0.0 ret i32 %iftmp.0.0
} }
▲ Show 20 Lines • Show All 90 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll

Show First 20 Lines • Show All 459 Lines • ▼ Show 20 Lines
; Adding not a constant ; Adding not a constant
define i1 @add_ugecmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind { define i1 @add_ugecmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {
; X86-LABEL: add_ugecmp_bad_i16_i8_add: ; X86-LABEL: add_ugecmp_bad_i16_i8_add:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addw {{[0-9]+}}(%esp), %ax ; X86-NEXT: addw {{[0-9]+}}(%esp), %ax
; X86-NEXT: movzwl %ax, %eax ; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: cmpl $255, %eax ; X86-NEXT: cmpl $256, %eax # imm = 0x100
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: add_ugecmp_bad_i16_i8_add: ; X64-LABEL: add_ugecmp_bad_i16_i8_add:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: addl %esi, %edi ; X64-NEXT: addl %esi, %edi
; X64-NEXT: movzwl %di, %eax ; X64-NEXT: movzwl %di, %eax
; X64-NEXT: cmpl $255, %eax ; X64-NEXT: cmpl $256, %eax # imm = 0x100
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%tmp0 = add i16 %x, %y %tmp0 = add i16 %x, %y
%tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8 %tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
ret i1 %tmp1 ret i1 %tmp1
} }
; Comparing not with a constant ; Comparing not with a constant
define i1 @add_ugecmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind { define i1 @add_ugecmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {
Show All 39 Lines
; First constant is not power of two ; First constant is not power of two
define i1 @add_ugecmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind { define i1 @add_ugecmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i16_i8_c0notpoweroftwo: ; X86-LABEL: add_ugecmp_bad_i16_i8_c0notpoweroftwo:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl $192, %eax ; X86-NEXT: movl $192, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax ; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzwl %ax, %eax ; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: cmpl $255, %eax ; X86-NEXT: cmpl $256, %eax # imm = 0x100
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: add_ugecmp_bad_i16_i8_c0notpoweroftwo: ; X64-LABEL: add_ugecmp_bad_i16_i8_c0notpoweroftwo:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: addl $192, %edi ; X64-NEXT: addl $192, %edi
; X64-NEXT: movzwl %di, %eax ; X64-NEXT: movzwl %di, %eax
; X64-NEXT: cmpl $255, %eax ; X64-NEXT: cmpl $256, %eax # imm = 0x100
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%tmp0 = add i16 %x, 192 ; (1U << (8-1)) + (1U << (8-1-1)) %tmp0 = add i16 %x, 192 ; (1U << (8-1)) + (1U << (8-1-1))
%tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8 %tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
ret i1 %tmp1 ret i1 %tmp1
} }
; Second constant is not power of two ; Second constant is not power of two
define i1 @add_ugecmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind { define i1 @add_ugecmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo: ; X86-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax ; X86-NEXT: subl $-128, %eax
; X86-NEXT: movzwl %ax, %eax ; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: cmpl $767, %eax # imm = 0x2FF ; X86-NEXT: cmpl $768, %eax # imm = 0x300
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo: ; X64-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: subl $-128, %edi ; X64-NEXT: subl $-128, %edi
; X64-NEXT: movzwl %di, %eax ; X64-NEXT: movzwl %di, %eax
; X64-NEXT: cmpl $767, %eax # imm = 0x2FF ; X64-NEXT: cmpl $768, %eax # imm = 0x300
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%tmp0 = add i16 %x, 128 ; 1U << (8-1) %tmp0 = add i16 %x, 128 ; 1U << (8-1)
%tmp1 = icmp uge i16 %tmp0, 768 ; (1U << 8)) + (1U << (8+1)) %tmp1 = icmp uge i16 %tmp0, 768 ; (1U << 8)) + (1U << (8+1))
ret i1 %tmp1 ret i1 %tmp1
} }
; Magic check fails, 64 << 1 != 256 ; Magic check fails, 64 << 1 != 256
define i1 @add_ugecmp_bad_i16_i8_magic(i16 %x) nounwind { define i1 @add_ugecmp_bad_i16_i8_magic(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i16_i8_magic: ; X86-LABEL: add_ugecmp_bad_i16_i8_magic:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $64, %eax ; X86-NEXT: addl $64, %eax
; X86-NEXT: movzwl %ax, %eax ; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: cmpl $255, %eax ; X86-NEXT: cmpl $256, %eax # imm = 0x100
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: add_ugecmp_bad_i16_i8_magic: ; X64-LABEL: add_ugecmp_bad_i16_i8_magic:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: addl $64, %edi ; X64-NEXT: addl $64, %edi
; X64-NEXT: movzwl %di, %eax ; X64-NEXT: movzwl %di, %eax
; X64-NEXT: cmpl $255, %eax ; X64-NEXT: cmpl $256, %eax # imm = 0x100
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%tmp0 = add i16 %x, 64 ; 1U << (8-1-1) %tmp0 = add i16 %x, 64 ; 1U << (8-1-1)
%tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8 %tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
ret i1 %tmp1 ret i1 %tmp1
} }
; Bad 'destination type' ; Bad 'destination type'
define i1 @add_ugecmp_bad_i16_i4(i16 %x) nounwind { define i1 @add_ugecmp_bad_i16_i4(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i16_i4: ; X86-LABEL: add_ugecmp_bad_i16_i4:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %eax ; X86-NEXT: addl $8, %eax
; X86-NEXT: cmpw $15, %ax ; X86-NEXT: cmpw $16, %ax
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: add_ugecmp_bad_i16_i4: ; X64-LABEL: add_ugecmp_bad_i16_i4:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: addl $8, %edi ; X64-NEXT: addl $8, %edi
; X64-NEXT: cmpw $15, %di ; X64-NEXT: cmpw $16, %di
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%tmp0 = add i16 %x, 8 ; 1U << (4-1) %tmp0 = add i16 %x, 8 ; 1U << (4-1)
%tmp1 = icmp uge i16 %tmp0, 16 ; 1U << 4 %tmp1 = icmp uge i16 %tmp0, 16 ; 1U << 4
ret i1 %tmp1 ret i1 %tmp1
} }
; Bad storage type ; Bad storage type
define i1 @add_ugecmp_bad_i24_i8(i24 %x) nounwind { define i1 @add_ugecmp_bad_i24_i8(i24 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i24_i8: ; X86-LABEL: add_ugecmp_bad_i24_i8:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax ; X86-NEXT: subl $-128, %eax
; X86-NEXT: andl $16777215, %eax # imm = 0xFFFFFF ; X86-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
; X86-NEXT: cmpl $255, %eax ; X86-NEXT: cmpl $256, %eax # imm = 0x100
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: add_ugecmp_bad_i24_i8: ; X64-LABEL: add_ugecmp_bad_i24_i8:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: subl $-128, %edi ; X64-NEXT: subl $-128, %edi
; X64-NEXT: andl $16777215, %edi # imm = 0xFFFFFF ; X64-NEXT: andl $16777215, %edi # imm = 0xFFFFFF
; X64-NEXT: cmpl $255, %edi ; X64-NEXT: cmpl $256, %edi # imm = 0x100
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%tmp0 = add i24 %x, 128 ; 1U << (8-1) %tmp0 = add i24 %x, 128 ; 1U << (8-1)
%tmp1 = icmp uge i24 %tmp0, 256 ; 1U << 8 %tmp1 = icmp uge i24 %tmp0, 256 ; 1U << 8
ret i1 %tmp1 ret i1 %tmp1
} }
; Slightly more canonical variant ; Slightly more canonical variant
define i1 @add_ugtcmp_bad_i16_i8(i16 %x) nounwind { define i1 @add_ugtcmp_bad_i16_i8(i16 %x) nounwind {
; CHECK-LABEL: add_ugtcmp_bad_i16_i8: ; CHECK-LABEL: add_ugtcmp_bad_i16_i8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: ret{{[l|q]}} ; CHECK-NEXT: ret{{[l|q]}}
%tmp0 = add i16 %x, 128 ; 1U << (8-1) %tmp0 = add i16 %x, 128 ; 1U << (8-1)
%tmp1 = icmp ugt i16 %tmp0, -1 ; when we +1 it, it will wrap to 0 %tmp1 = icmp ugt i16 %tmp0, -1 ; when we +1 it, it will wrap to 0
ret i1 %tmp1 ret i1 %tmp1
} }

llvm/test/CodeGen/X86/mul-constant-result.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86 ; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
; Incremental updates of the instruction depths should be enough for this test ; Incremental updates of the instruction depths should be enough for this test
; case. ; case.
; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=haswell -machine-combiner-inc-threshold=0| FileCheck %s --check-prefix=X64-HSW ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=haswell -machine-combiner-inc-threshold=0| FileCheck %s --check-prefix=X64-HSW
; Function Attrs: norecurse nounwind readnone uwtable ; Function Attrs: norecurse nounwind readnone uwtable
define i32 @mult(i32, i32) local_unnamed_addr #0 { define i32 @mult(i32, i32) local_unnamed_addr #0 {
; X86-LABEL: mult: ; X86-LABEL: mult:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8 ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: cmpl $1, %edx ; X86-NEXT: cmpl $2, %edx
; X86-NEXT: movl $1, %eax ; X86-NEXT: movl $1, %eax
; X86-NEXT: movl $1, %esi ; X86-NEXT: movl $1, %esi
; X86-NEXT: jg .LBB0_2 ; X86-NEXT: jge .LBB0_2
; X86-NEXT: # %bb.1: ; X86-NEXT: # %bb.1:
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: .LBB0_2: ; X86-NEXT: .LBB0_2:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: testl %edx, %edx ; X86-NEXT: testl %edx, %edx
; X86-NEXT: je .LBB0_4 ; X86-NEXT: je .LBB0_4
; X86-NEXT: # %bb.3: ; X86-NEXT: # %bb.3:
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
▲ Show 20 Lines • Show All 155 Lines • ▼ Show 20 Lines
; X86-NEXT: shll $5, %eax ; X86-NEXT: shll $5, %eax
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-HSW-LABEL: mult: ; X64-HSW-LABEL: mult:
; X64-HSW: # %bb.0: ; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: def $edi killed $edi def $rdi ; X64-HSW-NEXT: # kill: def $edi killed $edi def $rdi
; X64-HSW-NEXT: cmpl $1, %esi ; X64-HSW-NEXT: cmpl $2, %esi
; X64-HSW-NEXT: movl $1, %ecx ; X64-HSW-NEXT: movl $1, %ecx
; X64-HSW-NEXT: movl %esi, %eax ; X64-HSW-NEXT: movl %esi, %eax
; X64-HSW-NEXT: cmovgl %ecx, %eax ; X64-HSW-NEXT: cmovgel %ecx, %eax
; X64-HSW-NEXT: testl %esi, %esi ; X64-HSW-NEXT: testl %esi, %esi
; X64-HSW-NEXT: cmovel %ecx, %eax ; X64-HSW-NEXT: cmovel %ecx, %eax
; X64-HSW-NEXT: decl %edi ; X64-HSW-NEXT: decl %edi
; X64-HSW-NEXT: cmpl $31, %edi ; X64-HSW-NEXT: cmpl $31, %edi
; X64-HSW-NEXT: ja .LBB0_3 ; X64-HSW-NEXT: ja .LBB0_3
; X64-HSW-NEXT: # %bb.1: ; X64-HSW-NEXT: # %bb.1:
; X64-HSW-NEXT: jmpq *.LJTI0_0(,%rdi,8) ; X64-HSW-NEXT: jmpq *.LJTI0_0(,%rdi,8)
; X64-HSW-NEXT: .LBB0_2: ; X64-HSW-NEXT: .LBB0_2:
▲ Show 20 Lines • Show All 977 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/or-branch.ll

Show All 13 Lines
; JUMP2-NEXT: retl ; JUMP2-NEXT: retl
; JUMP2-NEXT: .LBB0_3: # %cond_true ; JUMP2-NEXT: .LBB0_3: # %cond_true
; JUMP2-NEXT: jmp bar@PLT # TAILCALL ; JUMP2-NEXT: jmp bar@PLT # TAILCALL
; ;
; JUMP1-LABEL: foo: ; JUMP1-LABEL: foo:
; JUMP1: # %bb.0: # %entry ; JUMP1: # %bb.0: # %entry
; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp) ; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP1-NEXT: setne %al ; JUMP1-NEXT: setne %al
; JUMP1-NEXT: cmpl $4, {{[0-9]+}}(%esp) ; JUMP1-NEXT: cmpl $5, {{[0-9]+}}(%esp)
; JUMP1-NEXT: setg %cl ; JUMP1-NEXT: setge %cl
; JUMP1-NEXT: testb %al, %cl ; JUMP1-NEXT: testb %al, %cl
; JUMP1-NEXT: jne .LBB0_1 ; JUMP1-NEXT: jne .LBB0_1
; JUMP1-NEXT: # %bb.2: # %cond_true ; JUMP1-NEXT: # %bb.2: # %cond_true
; JUMP1-NEXT: jmp bar@PLT # TAILCALL ; JUMP1-NEXT: jmp bar@PLT # TAILCALL
; JUMP1-NEXT: .LBB0_1: # %UnifiedReturnBlock ; JUMP1-NEXT: .LBB0_1: # %UnifiedReturnBlock
; JUMP1-NEXT: retl ; JUMP1-NEXT: retl
entry: entry:
%tmp1 = icmp eq i32 %X, 0 %tmp1 = icmp eq i32 %X, 0
Show All 12 Lines
; If the branch is unpredictable, don't add another branch ; If the branch is unpredictable, don't add another branch
; regardless of whether they are expensive or not. ; regardless of whether they are expensive or not.
define void @unpredictable(i32 %X, i32 %Y, i32 %Z) nounwind { define void @unpredictable(i32 %X, i32 %Y, i32 %Z) nounwind {
; JUMP2-LABEL: unpredictable: ; JUMP2-LABEL: unpredictable:
; JUMP2: # %bb.0: # %entry ; JUMP2: # %bb.0: # %entry
; JUMP2-NEXT: cmpl $0, {{[0-9]+}}(%esp) ; JUMP2-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP2-NEXT: setne %al ; JUMP2-NEXT: setne %al
; JUMP2-NEXT: cmpl $4, {{[0-9]+}}(%esp) ; JUMP2-NEXT: cmpl $5, {{[0-9]+}}(%esp)
; JUMP2-NEXT: setg %cl ; JUMP2-NEXT: setge %cl
; JUMP2-NEXT: testb %al, %cl ; JUMP2-NEXT: testb %al, %cl
; JUMP2-NEXT: jne .LBB1_1 ; JUMP2-NEXT: jne .LBB1_1
; JUMP2-NEXT: # %bb.2: # %cond_true ; JUMP2-NEXT: # %bb.2: # %cond_true
; JUMP2-NEXT: jmp bar@PLT # TAILCALL ; JUMP2-NEXT: jmp bar@PLT # TAILCALL
; JUMP2-NEXT: .LBB1_1: # %UnifiedReturnBlock ; JUMP2-NEXT: .LBB1_1: # %UnifiedReturnBlock
; JUMP2-NEXT: retl ; JUMP2-NEXT: retl
; ;
; JUMP1-LABEL: unpredictable: ; JUMP1-LABEL: unpredictable:
; JUMP1: # %bb.0: # %entry ; JUMP1: # %bb.0: # %entry
; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp) ; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP1-NEXT: setne %al ; JUMP1-NEXT: setne %al
; JUMP1-NEXT: cmpl $4, {{[0-9]+}}(%esp) ; JUMP1-NEXT: cmpl $5, {{[0-9]+}}(%esp)
; JUMP1-NEXT: setg %cl ; JUMP1-NEXT: setge %cl
; JUMP1-NEXT: testb %al, %cl ; JUMP1-NEXT: testb %al, %cl
; JUMP1-NEXT: jne .LBB1_1 ; JUMP1-NEXT: jne .LBB1_1
; JUMP1-NEXT: # %bb.2: # %cond_true ; JUMP1-NEXT: # %bb.2: # %cond_true
; JUMP1-NEXT: jmp bar@PLT # TAILCALL ; JUMP1-NEXT: jmp bar@PLT # TAILCALL
; JUMP1-NEXT: .LBB1_1: # %UnifiedReturnBlock ; JUMP1-NEXT: .LBB1_1: # %UnifiedReturnBlock
; JUMP1-NEXT: retl ; JUMP1-NEXT: retl
entry: entry:
%tmp1 = icmp eq i32 %X, 0 %tmp1 = icmp eq i32 %X, 0
Show All 16 Lines

llvm/test/CodeGen/X86/pr45995-2.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 --x86-asm-syntax=intel -mtriple=x86_64-grtev4-linux-gnu -march=x86-64 -mcpu=skylake-avx512 -mattr=fma,avx512f < %s | FileCheck %s ; RUN: llc -O3 --x86-asm-syntax=intel -mtriple=x86_64-grtev4-linux-gnu -march=x86-64 -mcpu=skylake-avx512 -mattr=fma,avx512f < %s | FileCheck %s
define <4 x i1> @selecter(i64 %0) { define <4 x i1> @selecter(i64 %0) {
; CHECK-LABEL: selecter: ; CHECK-LABEL: selecter:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: xor eax, eax ; CHECK-NEXT: xor eax, eax
; CHECK-NEXT: cmp rdi, 1 ; CHECK-NEXT: cmp rdi, 2
; CHECK-NEXT: setg al ; CHECK-NEXT: setge al
; CHECK-NEXT: lea eax, [rax + 2*rax] ; CHECK-NEXT: lea eax, [rax + 2*rax]
; CHECK-NEXT: kmovd k0, eax ; CHECK-NEXT: kmovd k0, eax
; CHECK-NEXT: vpmovm2d xmm0, k0 ; CHECK-NEXT: vpmovm2d xmm0, k0
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%2 = icmp slt i64 0, %0 %2 = icmp slt i64 0, %0
%3 = select i1 %2, <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i1> zeroinitializer %3 = select i1 %2, <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i1> zeroinitializer
%4 = insertvalue [4 x <4 x i1>] zeroinitializer, <4 x i1> %3, 0 %4 = insertvalue [4 x <4 x i1>] zeroinitializer, <4 x i1> %3, 0
%5 = icmp slt i64 1, %0 %5 = icmp slt i64 1, %0
Show All 11 Lines

llvm/test/CodeGen/X86/pr5145.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s ; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
@sc8 = external dso_local global i8 @sc8 = external dso_local global i8
define void @atomic_maxmin_i8() { define void @atomic_maxmin_i8() {
; CHECK-LABEL: atomic_maxmin_i8: ; CHECK-LABEL: atomic_maxmin_i8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movb {{.*}}(%rip), %al ; CHECK-NEXT: movb {{.*}}(%rip), %al
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_1: # %atomicrmw.start ; CHECK-NEXT: .LBB0_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpb $5, %al ; CHECK-NEXT: cmpb $6, %al
; CHECK-NEXT: movzbl %al, %eax ; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: movl $5, %ecx ; CHECK-NEXT: movl $5, %ecx
; CHECK-NEXT: cmovgl %eax, %ecx ; CHECK-NEXT: cmovgel %eax, %ecx
; CHECK-NEXT: # kill: def $al killed $al killed $eax ; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: lock cmpxchgb %cl, {{.*}}(%rip) ; CHECK-NEXT: lock cmpxchgb %cl, {{.*}}(%rip)
; CHECK-NEXT: jne .LBB0_1 ; CHECK-NEXT: jne .LBB0_1
; CHECK-NEXT: # %bb.2: # %atomicrmw.end ; CHECK-NEXT: # %bb.2: # %atomicrmw.end
; CHECK-NEXT: movb {{.*}}(%rip), %al ; CHECK-NEXT: movb {{.*}}(%rip), %al
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_3: # %atomicrmw.start2 ; CHECK-NEXT: .LBB0_3: # %atomicrmw.start2
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpb $7, %al ; CHECK-NEXT: cmpb $7, %al
; CHECK-NEXT: movzbl %al, %eax ; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: movl $6, %ecx ; CHECK-NEXT: movl $6, %ecx
; CHECK-NEXT: cmovll %eax, %ecx ; CHECK-NEXT: cmovll %eax, %ecx
; CHECK-NEXT: # kill: def $al killed $al killed $eax ; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: lock cmpxchgb %cl, {{.*}}(%rip) ; CHECK-NEXT: lock cmpxchgb %cl, {{.*}}(%rip)
; CHECK-NEXT: jne .LBB0_3 ; CHECK-NEXT: jne .LBB0_3
; CHECK-NEXT: # %bb.4: # %atomicrmw.end1 ; CHECK-NEXT: # %bb.4: # %atomicrmw.end1
; CHECK-NEXT: movb {{.*}}(%rip), %al ; CHECK-NEXT: movb {{.*}}(%rip), %al
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_5: # %atomicrmw.start8 ; CHECK-NEXT: .LBB0_5: # %atomicrmw.start8
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpb $7, %al ; CHECK-NEXT: cmpb $8, %al
; CHECK-NEXT: movzbl %al, %eax ; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: movl $7, %ecx ; CHECK-NEXT: movl $7, %ecx
; CHECK-NEXT: cmoval %eax, %ecx ; CHECK-NEXT: cmovael %eax, %ecx
; CHECK-NEXT: # kill: def $al killed $al killed $eax ; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: lock cmpxchgb %cl, {{.*}}(%rip) ; CHECK-NEXT: lock cmpxchgb %cl, {{.*}}(%rip)
; CHECK-NEXT: jne .LBB0_5 ; CHECK-NEXT: jne .LBB0_5
; CHECK-NEXT: # %bb.6: # %atomicrmw.end7 ; CHECK-NEXT: # %bb.6: # %atomicrmw.end7
; CHECK-NEXT: movb {{.*}}(%rip), %al ; CHECK-NEXT: movb {{.*}}(%rip), %al
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_7: # %atomicrmw.start14 ; CHECK-NEXT: .LBB0_7: # %atomicrmw.start14
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
Show All 15 Lines

llvm/test/CodeGen/X86/sadd_sat.ll

Show First 20 Lines • Show All 145 Lines • ▼ Show 20 Lines
; X86-LABEL: func3: ; X86-LABEL: func3:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: addb {{[0-9]+}}(%esp), %al ; X86-NEXT: addb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl %al, %ecx ; X86-NEXT: movzbl %al, %ecx
; X86-NEXT: cmpb $7, %al ; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %eax ; X86-NEXT: movl $7, %eax
; X86-NEXT: cmovll %ecx, %eax ; X86-NEXT: cmovll %ecx, %eax
; X86-NEXT: cmpb $-8, %al ; X86-NEXT: cmpb $-7, %al
; X86-NEXT: movl $248, %ecx ; X86-NEXT: movl $248, %ecx
; X86-NEXT: cmovgl %eax, %ecx ; X86-NEXT: cmovgel %eax, %ecx
; X86-NEXT: movsbl %cl, %eax ; X86-NEXT: movsbl %cl, %eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: func3: ; X64-LABEL: func3:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: addb %sil, %dil ; X64-NEXT: addb %sil, %dil
; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: cmpb $7, %al ; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx ; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx ; X64-NEXT: cmovll %eax, %ecx
; X64-NEXT: cmpb $-8, %cl ; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax ; X64-NEXT: movl $248, %eax
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax ; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq ; X64-NEXT: retq
%tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y); %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y);
ret i4 %tmp; ret i4 %tmp;
} }
define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind { define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X86-LABEL: vec: ; X86-LABEL: vec:
▲ Show 20 Lines • Show All 72 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/sadd_sat_plus.ll

Show First 20 Lines • Show All 159 Lines • ▼ Show 20 Lines
; X86-NEXT: mulb {{[0-9]+}}(%esp) ; X86-NEXT: mulb {{[0-9]+}}(%esp)
; X86-NEXT: shlb $4, %al ; X86-NEXT: shlb $4, %al
; X86-NEXT: sarb $4, %al ; X86-NEXT: sarb $4, %al
; X86-NEXT: addb {{[0-9]+}}(%esp), %al ; X86-NEXT: addb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl %al, %ecx ; X86-NEXT: movzbl %al, %ecx
; X86-NEXT: cmpb $7, %al ; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %eax ; X86-NEXT: movl $7, %eax
; X86-NEXT: cmovll %ecx, %eax ; X86-NEXT: cmovll %ecx, %eax
; X86-NEXT: cmpb $-8, %al ; X86-NEXT: cmpb $-7, %al
; X86-NEXT: movl $248, %ecx ; X86-NEXT: movl $248, %ecx
; X86-NEXT: cmovgl %eax, %ecx ; X86-NEXT: cmovgel %eax, %ecx
; X86-NEXT: movsbl %cl, %eax ; X86-NEXT: movsbl %cl, %eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: func4: ; X64-LABEL: func4:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %esi, %eax ; X64-NEXT: movl %esi, %eax
; X64-NEXT: # kill: def $al killed $al killed $eax ; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: mulb %dl ; X64-NEXT: mulb %dl
; X64-NEXT: shlb $4, %al ; X64-NEXT: shlb $4, %al
; X64-NEXT: sarb $4, %al ; X64-NEXT: sarb $4, %al
; X64-NEXT: addb %dil, %al ; X64-NEXT: addb %dil, %al
; X64-NEXT: movzbl %al, %eax ; X64-NEXT: movzbl %al, %eax
; X64-NEXT: cmpb $7, %al ; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx ; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx ; X64-NEXT: cmovll %eax, %ecx
; X64-NEXT: cmpb $-8, %cl ; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax ; X64-NEXT: movl $248, %eax
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax ; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq ; X64-NEXT: retq
%a = mul i4 %y, %z %a = mul i4 %y, %z
%tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a) %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a)
ret i4 %tmp ret i4 %tmp
} }

llvm/test/CodeGen/X86/sdiv_fix_sat.ll

Show All 27 Lines
; X64-NEXT: xorb %sil, %cl ; X64-NEXT: xorb %sil, %cl
; X64-NEXT: testl %edx, %edx ; X64-NEXT: testl %edx, %edx
; X64-NEXT: setne %dl ; X64-NEXT: setne %dl
; X64-NEXT: testb %cl, %dl ; X64-NEXT: testb %cl, %dl
; X64-NEXT: cmovel %eax, %edi ; X64-NEXT: cmovel %eax, %edi
; X64-NEXT: cmpl $65535, %edi # imm = 0xFFFF ; X64-NEXT: cmpl $65535, %edi # imm = 0xFFFF
; X64-NEXT: movl $65535, %ecx # imm = 0xFFFF ; X64-NEXT: movl $65535, %ecx # imm = 0xFFFF
; X64-NEXT: cmovll %edi, %ecx ; X64-NEXT: cmovll %edi, %ecx
; X64-NEXT: cmpl $-65536, %ecx # imm = 0xFFFF0000 ; X64-NEXT: cmpl $-65535, %ecx # imm = 0xFFFF0001
; X64-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 ; X64-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: shrl %eax ; X64-NEXT: shrl %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func: ; X86-LABEL: func:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
Show All 12 Lines
; X86-NEXT: xorb %bl, %cl ; X86-NEXT: xorb %bl, %cl
; X86-NEXT: testl %edx, %edx ; X86-NEXT: testl %edx, %edx
; X86-NEXT: setne %dl ; X86-NEXT: setne %dl
; X86-NEXT: testb %cl, %dl ; X86-NEXT: testb %cl, %dl
; X86-NEXT: cmovel %eax, %edi ; X86-NEXT: cmovel %eax, %edi
; X86-NEXT: cmpl $65535, %edi # imm = 0xFFFF ; X86-NEXT: cmpl $65535, %edi # imm = 0xFFFF
; X86-NEXT: movl $65535, %ecx # imm = 0xFFFF ; X86-NEXT: movl $65535, %ecx # imm = 0xFFFF
; X86-NEXT: cmovll %edi, %ecx ; X86-NEXT: cmovll %edi, %ecx
; X86-NEXT: cmpl $-65536, %ecx # imm = 0xFFFF0000 ; X86-NEXT: cmpl $-65535, %ecx # imm = 0xFFFF0001
; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000 ; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: shrl %eax ; X86-NEXT: shrl %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i16 @llvm.sdiv.fix.sat.i16(i16 %x, i16 %y, i32 7) %tmp = call i16 @llvm.sdiv.fix.sat.i16(i16 %x, i16 %y, i32 7)
ret i16 %tmp ret i16 %tmp
Show All 20 Lines
; X64-NEXT: xorb %sil, %cl ; X64-NEXT: xorb %sil, %cl
; X64-NEXT: testl %edx, %edx ; X64-NEXT: testl %edx, %edx
; X64-NEXT: setne %dl ; X64-NEXT: setne %dl
; X64-NEXT: testb %cl, %dl ; X64-NEXT: testb %cl, %dl
; X64-NEXT: cmovel %eax, %edi ; X64-NEXT: cmovel %eax, %edi
; X64-NEXT: cmpl $16383, %edi # imm = 0x3FFF ; X64-NEXT: cmpl $16383, %edi # imm = 0x3FFF
; X64-NEXT: movl $16383, %ecx # imm = 0x3FFF ; X64-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X64-NEXT: cmovll %edi, %ecx ; X64-NEXT: cmovll %edi, %ecx
; X64-NEXT: cmpl $-16384, %ecx # imm = 0xC000 ; X64-NEXT: cmpl $-16383, %ecx # imm = 0xC001
; X64-NEXT: movl $-16384, %eax # imm = 0xC000 ; X64-NEXT: movl $-16384, %eax # imm = 0xC000
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func2: ; X86-LABEL: func2:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
Show All 11 Lines
; X86-NEXT: xorb %bl, %cl ; X86-NEXT: xorb %bl, %cl
; X86-NEXT: testl %edx, %edx ; X86-NEXT: testl %edx, %edx
; X86-NEXT: setne %dl ; X86-NEXT: setne %dl
; X86-NEXT: testb %cl, %dl ; X86-NEXT: testb %cl, %dl
; X86-NEXT: cmovel %eax, %edi ; X86-NEXT: cmovel %eax, %edi
; X86-NEXT: cmpl $16383, %edi # imm = 0x3FFF ; X86-NEXT: cmpl $16383, %edi # imm = 0x3FFF
; X86-NEXT: movl $16383, %ecx # imm = 0x3FFF ; X86-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X86-NEXT: cmovll %edi, %ecx ; X86-NEXT: cmovll %edi, %ecx
; X86-NEXT: cmpl $-16384, %ecx # imm = 0xC000 ; X86-NEXT: cmpl $-16383, %ecx # imm = 0xC001
; X86-NEXT: movl $-16384, %eax # imm = 0xC000 ; X86-NEXT: movl $-16384, %eax # imm = 0xC000
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: retl ; X86-NEXT: retl
%x2 = sext i8 %x to i15 %x2 = sext i8 %x to i15
%y2 = sext i8 %y to i15 %y2 = sext i8 %y to i15
%tmp = call i15 @llvm.sdiv.fix.sat.i15(i15 %x2, i15 %y2, i32 14) %tmp = call i15 @llvm.sdiv.fix.sat.i15(i15 %x2, i15 %y2, i32 14)
Show All 23 Lines
; X64-NEXT: setne %dl ; X64-NEXT: setne %dl
; X64-NEXT: testb %cl, %dl ; X64-NEXT: testb %cl, %dl
; X64-NEXT: cmovel %eax, %esi ; X64-NEXT: cmovel %eax, %esi
; X64-NEXT: movswl %si, %eax ; X64-NEXT: movswl %si, %eax
; X64-NEXT: cmpl $16383, %eax # imm = 0x3FFF ; X64-NEXT: cmpl $16383, %eax # imm = 0x3FFF
; X64-NEXT: movl $16383, %ecx # imm = 0x3FFF ; X64-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X64-NEXT: cmovll %esi, %ecx ; X64-NEXT: cmovll %esi, %ecx
; X64-NEXT: movswl %cx, %eax ; X64-NEXT: movswl %cx, %eax
; X64-NEXT: cmpl $-16384, %eax # imm = 0xC000 ; X64-NEXT: cmpl $-16383, %eax # imm = 0xC001
; X64-NEXT: movl $49152, %eax # imm = 0xC000 ; X64-NEXT: movl $49152, %eax # imm = 0xC000
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func3: ; X86-LABEL: func3:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
Show All 16 Lines
; X86-NEXT: setne %cl ; X86-NEXT: setne %cl
; X86-NEXT: testb %ch, %cl ; X86-NEXT: testb %ch, %cl
; X86-NEXT: cmovel %eax, %edi ; X86-NEXT: cmovel %eax, %edi
; X86-NEXT: movswl %di, %eax ; X86-NEXT: movswl %di, %eax
; X86-NEXT: cmpl $16383, %eax # imm = 0x3FFF ; X86-NEXT: cmpl $16383, %eax # imm = 0x3FFF
; X86-NEXT: movl $16383, %ecx # imm = 0x3FFF ; X86-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X86-NEXT: cmovll %edi, %ecx ; X86-NEXT: cmovll %edi, %ecx
; X86-NEXT: movswl %cx, %eax ; X86-NEXT: movswl %cx, %eax
; X86-NEXT: cmpl $-16384, %eax # imm = 0xC000 ; X86-NEXT: cmpl $-16383, %eax # imm = 0xC001
; X86-NEXT: movl $49152, %eax # imm = 0xC000 ; X86-NEXT: movl $49152, %eax # imm = 0xC000
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl ; X86-NEXT: retl
%y2 = sext i8 %y to i15 %y2 = sext i8 %y to i15
%y3 = shl i15 %y2, 7 %y3 = shl i15 %y2, 7
%tmp = call i15 @llvm.sdiv.fix.sat.i15(i15 %x, i15 %y3, i32 4) %tmp = call i15 @llvm.sdiv.fix.sat.i15(i15 %x, i15 %y3, i32 4)
%tmp2 = sext i15 %tmp to i16 %tmp2 = sext i15 %tmp to i16
Show All 24 Lines
; X64-NEXT: xorb %dl, %cl ; X64-NEXT: xorb %dl, %cl
; X64-NEXT: testb %bl, %bl ; X64-NEXT: testb %bl, %bl
; X64-NEXT: setne %dl ; X64-NEXT: setne %dl
; X64-NEXT: testb %cl, %dl ; X64-NEXT: testb %cl, %dl
; X64-NEXT: cmovel %eax, %edi ; X64-NEXT: cmovel %eax, %edi
; X64-NEXT: cmpb $7, %dil ; X64-NEXT: cmpb $7, %dil
; X64-NEXT: movl $7, %ecx ; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %edi, %ecx ; X64-NEXT: cmovll %edi, %ecx
; X64-NEXT: cmpb $-8, %cl ; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax ; X64-NEXT: movl $248, %eax
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: # kill: def $al killed $al killed $eax ; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func4: ; X86-LABEL: func4:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movb {{[0-9]+}}(%esp), %dl ; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
Show All 16 Lines
; X86-NEXT: xorb %dl, %dh ; X86-NEXT: xorb %dl, %dh
; X86-NEXT: testb %cl, %cl ; X86-NEXT: testb %cl, %cl
; X86-NEXT: setne %cl ; X86-NEXT: setne %cl
; X86-NEXT: testb %dh, %cl ; X86-NEXT: testb %dh, %cl
; X86-NEXT: cmovel %esi, %eax ; X86-NEXT: cmovel %esi, %eax
; X86-NEXT: cmpb $7, %al ; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %ecx ; X86-NEXT: movl $7, %ecx
; X86-NEXT: cmovll %eax, %ecx ; X86-NEXT: cmovll %eax, %ecx
; X86-NEXT: cmpb $-8, %cl ; X86-NEXT: cmpb $-7, %cl
; X86-NEXT: movl $248, %eax ; X86-NEXT: movl $248, %eax
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: # kill: def $al killed $al killed $eax ; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i4 @llvm.sdiv.fix.sat.i4(i4 %x, i4 %y, i32 2) %tmp = call i4 @llvm.sdiv.fix.sat.i4(i4 %x, i4 %y, i32 2)
ret i4 %tmp ret i4 %tmp
} }
define i64 @func5(i64 %x, i64 %y) nounwind { define i64 @func5(i64 %x, i64 %y) nounwind {
▲ Show 20 Lines • Show All 168 Lines • ▼ Show 20 Lines
; X86-NEXT: cmovael %eax, %esi ; X86-NEXT: cmovael %eax, %esi
; X86-NEXT: movl $-1, %eax ; X86-NEXT: movl $-1, %eax
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: cmovbl %ecx, %eax ; X86-NEXT: cmovbl %ecx, %eax
; X86-NEXT: cmovel %ecx, %eax ; X86-NEXT: cmovel %ecx, %eax
; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: cmovnel %edx, %eax ; X86-NEXT: cmovnel %edx, %eax
; X86-NEXT: cmovnel {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X86-NEXT: cmovnel {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: cmpl $-2147483647, %esi # imm = 0x80000001
; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
; X86-NEXT: cmovael %esi, %ecx
; X86-NEXT: movl $0, %edx
; X86-NEXT: cmovael %eax, %edx
; X86-NEXT: cmpl $-2147483648, %esi # imm = 0x80000000 ; X86-NEXT: cmpl $-2147483648, %esi # imm = 0x80000000
; X86-NEXT: movl $0, %ecx ; X86-NEXT: cmovel %eax, %edx
; X86-NEXT: cmoval %eax, %ecx
; X86-NEXT: cmovel %eax, %ecx
; X86-NEXT: movl $-2147483648, %edx # imm = 0x80000000
; X86-NEXT: cmoval %esi, %edx
; X86-NEXT: cmpl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload ; X86-NEXT: cmpl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-NEXT: movl $0, %ebx ; X86-NEXT: movl $0, %ebx
; X86-NEXT: cmovsl %ebx, %eax ; X86-NEXT: cmovsl %ebx, %eax
; X86-NEXT: movl $-2147483648, %ebx # imm = 0x80000000 ; X86-NEXT: movl $-2147483648, %ebx # imm = 0x80000000
; X86-NEXT: cmovsl %ebx, %esi ; X86-NEXT: cmovsl %ebx, %esi
; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: cmpl $-1, %edi ; X86-NEXT: cmpl $-1, %edi
; X86-NEXT: cmovel %edx, %esi ; X86-NEXT: cmovel %ecx, %esi
; X86-NEXT: cmovel %ecx, %eax ; X86-NEXT: cmovel %edx, %eax
; X86-NEXT: movl %esi, %edx ; X86-NEXT: movl %esi, %edx
; X86-NEXT: leal -12(%ebp), %esp ; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i64 @llvm.sdiv.fix.sat.i64(i64 %x, i64 %y, i32 31) %tmp = call i64 @llvm.sdiv.fix.sat.i64(i64 %x, i64 %y, i32 31)
Show All 19 Lines
; X64-NEXT: xorb %sil, %cl ; X64-NEXT: xorb %sil, %cl
; X64-NEXT: testl %edx, %edx ; X64-NEXT: testl %edx, %edx
; X64-NEXT: setne %dl ; X64-NEXT: setne %dl
; X64-NEXT: testb %cl, %dl ; X64-NEXT: testb %cl, %dl
; X64-NEXT: cmovel %eax, %edi ; X64-NEXT: cmovel %eax, %edi
; X64-NEXT: cmpl $131071, %edi # imm = 0x1FFFF ; X64-NEXT: cmpl $131071, %edi # imm = 0x1FFFF
; X64-NEXT: movl $131071, %ecx # imm = 0x1FFFF ; X64-NEXT: movl $131071, %ecx # imm = 0x1FFFF
; X64-NEXT: cmovll %edi, %ecx ; X64-NEXT: cmovll %edi, %ecx
; X64-NEXT: cmpl $-131072, %ecx # imm = 0xFFFE0000 ; X64-NEXT: cmpl $-131071, %ecx # imm = 0xFFFE0001
; X64-NEXT: movl $-131072, %eax # imm = 0xFFFE0000 ; X64-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func6: ; X86-LABEL: func6:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movswl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movswl {{[0-9]+}}(%esp), %esi
Show All 10 Lines
; X86-NEXT: xorb %bl, %cl ; X86-NEXT: xorb %bl, %cl
; X86-NEXT: testl %edx, %edx ; X86-NEXT: testl %edx, %edx
; X86-NEXT: setne %dl ; X86-NEXT: setne %dl
; X86-NEXT: testb %cl, %dl ; X86-NEXT: testb %cl, %dl
; X86-NEXT: cmovel %eax, %edi ; X86-NEXT: cmovel %eax, %edi
; X86-NEXT: cmpl $131071, %edi # imm = 0x1FFFF ; X86-NEXT: cmpl $131071, %edi # imm = 0x1FFFF
; X86-NEXT: movl $131071, %ecx # imm = 0x1FFFF ; X86-NEXT: movl $131071, %ecx # imm = 0x1FFFF
; X86-NEXT: cmovll %edi, %ecx ; X86-NEXT: cmovll %edi, %ecx
; X86-NEXT: cmpl $-131072, %ecx # imm = 0xFFFE0000 ; X86-NEXT: cmpl $-131071, %ecx # imm = 0xFFFE0001
; X86-NEXT: movl $-131072, %eax # imm = 0xFFFE0000 ; X86-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: retl ; X86-NEXT: retl
%x2 = sext i16 %x to i18 %x2 = sext i16 %x to i18
%y2 = sext i16 %y to i18 %y2 = sext i16 %y to i18
%tmp = call i18 @llvm.sdiv.fix.sat.i18(i18 %x2, i18 %y2, i32 7) %tmp = call i18 @llvm.sdiv.fix.sat.i18(i18 %x2, i18 %y2, i32 7)
ret i18 %tmp ret i18 %tmp
Show All 13 Lines
; X64-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; X64-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; X64-NEXT: pxor %xmm2, %xmm2 ; X64-NEXT: pxor %xmm2, %xmm2
; X64-NEXT: pcmpgtd %xmm0, %xmm2 ; X64-NEXT: pcmpgtd %xmm0, %xmm2
; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] ; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; X64-NEXT: paddq %xmm0, %xmm0 ; X64-NEXT: paddq %xmm0, %xmm0
; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; X64-NEXT: movq %xmm0, %rbx ; X64-NEXT: movq %xmm0, %rbx
; X64-NEXT: movq %rbx, %rbp ; X64-NEXT: movq %rbx, %r14
; X64-NEXT: sarq $63, %rbp ; X64-NEXT: sarq $63, %r14
; X64-NEXT: shldq $31, %rbx, %rbp ; X64-NEXT: shldq $31, %rbx, %r14
; X64-NEXT: pxor %xmm0, %xmm0 ; X64-NEXT: pxor %xmm0, %xmm0
; X64-NEXT: pcmpgtd %xmm1, %xmm0 ; X64-NEXT: pcmpgtd %xmm1, %xmm0
; X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; X64-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; X64-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; X64-NEXT: movq %xmm1, %rdx ; X64-NEXT: movq %xmm1, %rdx
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: sarq $63, %r15 ; X64-NEXT: sarq $63, %r15
; X64-NEXT: movq %rbx, %r12 ; X64-NEXT: movq %rbx, %r12
; X64-NEXT: shlq $31, %r12 ; X64-NEXT: shlq $31, %r12
; X64-NEXT: movq %r12, %rdi ; X64-NEXT: movq %r12, %rdi
; X64-NEXT: movq %rbp, %rsi ; X64-NEXT: movq %r14, %rsi
; X64-NEXT: movq %r15, %rcx ; X64-NEXT: movq %r15, %rcx
; X64-NEXT: callq __divti3@PLT ; X64-NEXT: callq __divti3@PLT
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: subq $1, %r13 ; X64-NEXT: subq $1, %r13
; X64-NEXT: sbbq $0, %r14 ; X64-NEXT: sbbq $0, %rbp
; X64-NEXT: shrq $63, %rbx ; X64-NEXT: shrq $63, %rbx
; X64-NEXT: xorl %r15d, %ebx ; X64-NEXT: xorl %r15d, %ebx
; X64-NEXT: movq %r12, %rdi ; X64-NEXT: movq %r12, %rdi
; X64-NEXT: movq %rbp, %rsi ; X64-NEXT: movq %r14, %rsi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; X64-NEXT: movq %r15, %rcx ; X64-NEXT: movq %r15, %rcx
; X64-NEXT: callq __modti3@PLT ; X64-NEXT: callq __modti3@PLT
; X64-NEXT: orq %rax, %rdx ; X64-NEXT: orq %rax, %rdx
; X64-NEXT: setne %al ; X64-NEXT: setne %al
; X64-NEXT: testb %bl, %al ; X64-NEXT: testb %bl, %al
; X64-NEXT: cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload ; X64-NEXT: cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Folded Reload
; X64-NEXT: cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload ; X64-NEXT: cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
; X64-NEXT: movl $4294967295, %edx # imm = 0xFFFFFFFF ; X64-NEXT: movl $4294967295, %edx # imm = 0xFFFFFFFF
; X64-NEXT: cmpq %rdx, %r13 ; X64-NEXT: cmpq %rdx, %r13
; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF ; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
; X64-NEXT: cmovbq %r13, %rax ; X64-NEXT: cmovbq %r13, %rax
; X64-NEXT: xorl %ecx, %ecx ; X64-NEXT: xorl %ecx, %ecx
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %rbp, %rbp
; X64-NEXT: cmovnsq %rdx, %r13 ; X64-NEXT: cmovnsq %rdx, %r13
; X64-NEXT: cmoveq %rax, %r13 ; X64-NEXT: cmoveq %rax, %r13
; X64-NEXT: cmovnsq %rcx, %r14 ; X64-NEXT: cmovnsq %rcx, %rbp
; X64-NEXT: movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
; X64-NEXT: cmpq %rax, %r13
; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000 ; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
; X64-NEXT: cmpq %rcx, %r13
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: cmovaq %r13, %rax ; X64-NEXT: cmovaeq %r13, %rax
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %rbp, %rbp
; X64-NEXT: cmovsq %rcx, %r13 ; X64-NEXT: cmovsq %rcx, %r13
; X64-NEXT: cmpq $-1, %r14 ; X64-NEXT: cmpq $-1, %rbp
; X64-NEXT: cmoveq %rax, %r13 ; X64-NEXT: cmoveq %rax, %r13
; X64-NEXT: movq %r13, %xmm0 ; X64-NEXT: movq %r13, %xmm0
; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; X64-NEXT: pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload ; X64-NEXT: pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; X64-NEXT: # xmm0 = mem[2,3,2,3] ; X64-NEXT: # xmm0 = mem[2,3,2,3]
; X64-NEXT: movq %xmm0, %rbx ; X64-NEXT: movq %xmm0, %rbx
; X64-NEXT: movq %rbx, %r13 ; X64-NEXT: movq %rbx, %r13
; X64-NEXT: sarq $63, %r13 ; X64-NEXT: sarq $63, %r13
Show All 32 Lines
; X64-NEXT: cmpq %rcx, %r12 ; X64-NEXT: cmpq %rcx, %r12
; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF ; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
; X64-NEXT: cmovbq %r12, %rax ; X64-NEXT: cmovbq %r12, %rax
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %r14, %r14
; X64-NEXT: cmovnsq %rcx, %r12 ; X64-NEXT: cmovnsq %rcx, %r12
; X64-NEXT: cmoveq %rax, %r12 ; X64-NEXT: cmoveq %rax, %r12
; X64-NEXT: movl $0, %eax ; X64-NEXT: movl $0, %eax
; X64-NEXT: cmovnsq %rax, %r14 ; X64-NEXT: cmovnsq %rax, %r14
; X64-NEXT: movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
; X64-NEXT: cmpq %rax, %r12
; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000 ; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
; X64-NEXT: cmpq %rcx, %r12
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: cmovaq %r12, %rax ; X64-NEXT: cmovaeq %r12, %rax
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %r14, %r14
; X64-NEXT: cmovsq %rcx, %r12 ; X64-NEXT: cmovsq %rcx, %r12
; X64-NEXT: cmpq $-1, %r14 ; X64-NEXT: cmpq $-1, %r14
; X64-NEXT: cmoveq %rax, %r12 ; X64-NEXT: cmoveq %rax, %r12
; X64-NEXT: movq %r12, %xmm0 ; X64-NEXT: movq %r12, %xmm0
; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload ; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; X64-NEXT: psrlq $1, %xmm1 ; X64-NEXT: psrlq $1, %xmm1
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; X64-NEXT: cmpq %rcx, %r13 ; X64-NEXT: cmpq %rcx, %r13
; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF ; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
; X64-NEXT: cmovbq %r13, %rax ; X64-NEXT: cmovbq %r13, %rax
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %r14, %r14
; X64-NEXT: cmovnsq %rcx, %r13 ; X64-NEXT: cmovnsq %rcx, %r13
; X64-NEXT: cmoveq %rax, %r13 ; X64-NEXT: cmoveq %rax, %r13
; X64-NEXT: movl $0, %eax ; X64-NEXT: movl $0, %eax
; X64-NEXT: cmovnsq %rax, %r14 ; X64-NEXT: cmovnsq %rax, %r14
; X64-NEXT: movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
; X64-NEXT: cmpq %rax, %r13
; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000 ; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
; X64-NEXT: cmpq %rcx, %r13
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: cmovaq %r13, %rax ; X64-NEXT: cmovaeq %r13, %rax
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %r14, %r14
; X64-NEXT: cmovsq %rcx, %r13 ; X64-NEXT: cmovsq %rcx, %r13
; X64-NEXT: cmpq $-1, %r14 ; X64-NEXT: cmpq $-1, %r14
; X64-NEXT: cmoveq %rax, %r13 ; X64-NEXT: cmoveq %rax, %r13
; X64-NEXT: movq %r13, %xmm0 ; X64-NEXT: movq %r13, %xmm0
; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; X64-NEXT: pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload ; X64-NEXT: pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; X64-NEXT: # xmm0 = mem[2,3,2,3] ; X64-NEXT: # xmm0 = mem[2,3,2,3]
Show All 35 Lines
; X64-NEXT: cmpq %rcx, %r12 ; X64-NEXT: cmpq %rcx, %r12
; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF ; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
; X64-NEXT: cmovbq %r12, %rax ; X64-NEXT: cmovbq %r12, %rax
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %r14, %r14
; X64-NEXT: cmovnsq %rcx, %r12 ; X64-NEXT: cmovnsq %rcx, %r12
; X64-NEXT: cmoveq %rax, %r12 ; X64-NEXT: cmoveq %rax, %r12
; X64-NEXT: movl $0, %eax ; X64-NEXT: movl $0, %eax
; X64-NEXT: cmovnsq %rax, %r14 ; X64-NEXT: cmovnsq %rax, %r14
; X64-NEXT: movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
; X64-NEXT: cmpq %rax, %r12
; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000 ; X64-NEXT: movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
; X64-NEXT: cmpq %rcx, %r12
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: cmovaq %r12, %rax ; X64-NEXT: cmovaeq %r12, %rax
; X64-NEXT: testq %r14, %r14 ; X64-NEXT: testq %r14, %r14
; X64-NEXT: cmovsq %rcx, %r12 ; X64-NEXT: cmovsq %rcx, %r12
; X64-NEXT: cmpq $-1, %r14 ; X64-NEXT: cmpq $-1, %r14
; X64-NEXT: cmoveq %rax, %r12 ; X64-NEXT: cmoveq %rax, %r12
; X64-NEXT: movq %r12, %xmm0 ; X64-NEXT: movq %r12, %xmm0
; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload ; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; X64-NEXT: psrlq $1, %xmm1 ; X64-NEXT: psrlq $1, %xmm1
▲ Show 20 Lines • Show All 517 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/select.ll

Show First 20 Lines • Show All 1,196 Lines • ▼ Show 20 Lines; MCU-NEXT: retl
store i8 %conv, i8* %dst, align 2 store i8 %conv, i8* %dst, align 2
ret void ret void
} }
; reproducer for pr29002 ; reproducer for pr29002
define void @clamp(i32 %src, i16* %dst) { define void @clamp(i32 %src, i16* %dst) {
; GENERIC-LABEL: clamp: ; GENERIC-LABEL: clamp:
; GENERIC: ## %bb.0: ; GENERIC: ## %bb.0:
; GENERIC-NEXT: cmpl $32767, %edi ## imm = 0x7FFF ; GENERIC-NEXT: cmpl $32768, %edi ## imm = 0x8000
; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF ; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF
; GENERIC-NEXT: cmovlel %edi, %eax ; GENERIC-NEXT: cmovll %edi, %eax
; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000 ; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000
; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000 ; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000
; GENERIC-NEXT: cmovgel %eax, %ecx ; GENERIC-NEXT: cmovgel %eax, %ecx
; GENERIC-NEXT: movw %cx, (%rsi) ; GENERIC-NEXT: movw %cx, (%rsi)
; GENERIC-NEXT: retq ; GENERIC-NEXT: retq
; ;
; ATOM-LABEL: clamp: ; ATOM-LABEL: clamp:
; ATOM: ## %bb.0: ; ATOM: ## %bb.0:
; ATOM-NEXT: cmpl $32767, %edi ## imm = 0x7FFF ; ATOM-NEXT: cmpl $32768, %edi ## imm = 0x8000
; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF ; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF
; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000 ; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000
; ATOM-NEXT: cmovlel %edi, %eax ; ATOM-NEXT: cmovll %edi, %eax
; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000 ; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000
; ATOM-NEXT: cmovgel %eax, %ecx ; ATOM-NEXT: cmovgel %eax, %ecx
; ATOM-NEXT: movw %cx, (%rsi) ; ATOM-NEXT: movw %cx, (%rsi)
; ATOM-NEXT: retq ; ATOM-NEXT: retq
; ;
; ATHLON-LABEL: clamp: ; ATHLON-LABEL: clamp:
; ATHLON: ## %bb.0: ; ATHLON: ## %bb.0:
; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
; ATHLON-NEXT: cmpl $32767, %ecx ## imm = 0x7FFF ; ATHLON-NEXT: cmpl $32768, %ecx ## imm = 0x8000
; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF ; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF
; ATHLON-NEXT: cmovlel %ecx, %edx ; ATHLON-NEXT: cmovll %ecx, %edx
; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000 ; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000
; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000 ; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000
; ATHLON-NEXT: cmovgel %edx, %ecx ; ATHLON-NEXT: cmovgel %edx, %ecx
; ATHLON-NEXT: movw %cx, (%eax) ; ATHLON-NEXT: movw %cx, (%eax)
; ATHLON-NEXT: retl ; ATHLON-NEXT: retl
; ;
; MCU-LABEL: clamp: ; MCU-LABEL: clamp:
; MCU: # %bb.0: ; MCU: # %bb.0:
; MCU-NEXT: cmpl $32767, %eax # imm = 0x7FFF ; MCU-NEXT: cmpl $32768, %eax # imm = 0x8000
; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF ; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF
; MCU-NEXT: jg .LBB22_2 ; MCU-NEXT: jge .LBB22_2
; MCU-NEXT: # %bb.1: ; MCU-NEXT: # %bb.1:
; MCU-NEXT: movl %eax, %ecx ; MCU-NEXT: movl %eax, %ecx
; MCU-NEXT: .LBB22_2: ; MCU-NEXT: .LBB22_2:
; MCU-NEXT: cmpl $-32768, %ecx # imm = 0x8000 ; MCU-NEXT: cmpl $-32768, %ecx # imm = 0x8000
; MCU-NEXT: movl $32768, %eax # imm = 0x8000 ; MCU-NEXT: movl $32768, %eax # imm = 0x8000
; MCU-NEXT: jl .LBB22_4 ; MCU-NEXT: jl .LBB22_4
; MCU-NEXT: # %bb.3: ; MCU-NEXT: # %bb.3:
; MCU-NEXT: movl %ecx, %eax ; MCU-NEXT: movl %ecx, %eax
▲ Show 20 Lines • Show All 293 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/select_const.ll

Show First 20 Lines • Show All 261 Lines • ▼ Show 20 Lines; CHECK-NEXT: retq
ret i64 %sub ret i64 %sub
} }
; No LEA with 8-bit, but this shouldn't need branches or cmov. ; No LEA with 8-bit, but this shouldn't need branches or cmov.
define i8 @sel_1_neg1(i32 %x) { define i8 @sel_1_neg1(i32 %x) {
; CHECK-LABEL: sel_1_neg1: ; CHECK-LABEL: sel_1_neg1:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: cmpl $42, %edi ; CHECK-NEXT: cmpl $43, %edi
; CHECK-NEXT: setg %al ; CHECK-NEXT: setge %al
; CHECK-NEXT: shlb $2, %al ; CHECK-NEXT: shlb $2, %al
; CHECK-NEXT: decb %al ; CHECK-NEXT: decb %al
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%cmp = icmp sgt i32 %x, 42 %cmp = icmp sgt i32 %x, 42
%sel = select i1 %cmp, i8 3, i8 -1 %sel = select i1 %cmp, i8 3, i8 -1
ret i8 %sel ret i8 %sel
} }
Show All 14 Lines
} }
; If the comparison is available, the predicate can be inverted. ; If the comparison is available, the predicate can be inverted.
define i32 @sel_1_neg1_32(i32 %x) { define i32 @sel_1_neg1_32(i32 %x) {
; CHECK-LABEL: sel_1_neg1_32: ; CHECK-LABEL: sel_1_neg1_32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $42, %edi ; CHECK-NEXT: cmpl $43, %edi
; CHECK-NEXT: setg %al ; CHECK-NEXT: setge %al
; CHECK-NEXT: leal -1(%rax,%rax,8), %eax ; CHECK-NEXT: leal -1(%rax,%rax,8), %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%cmp = icmp sgt i32 %x, 42 %cmp = icmp sgt i32 %x, 42
%sel = select i1 %cmp, i32 8, i32 -1 %sel = select i1 %cmp, i32 8, i32 -1
ret i32 %sel ret i32 %sel
} }
define i32 @sel_neg1_1_32(i32 %x) { define i32 @sel_neg1_1_32(i32 %x) {
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines; CHECK-NEXT: retq
ret i64 %sel ret i64 %sel
} }
; This doesn't need a branch, but don't do the wrong thing if subtraction of the constants overflows. ; This doesn't need a branch, but don't do the wrong thing if subtraction of the constants overflows.
define i8 @sel_67_neg125(i32 %x) { define i8 @sel_67_neg125(i32 %x) {
; CHECK-LABEL: sel_67_neg125: ; CHECK-LABEL: sel_67_neg125:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: cmpl $42, %edi ; CHECK-NEXT: cmpl $43, %edi
; CHECK-NEXT: movl $67, %ecx ; CHECK-NEXT: movl $67, %ecx
; CHECK-NEXT: movl $131, %eax ; CHECK-NEXT: movl $131, %eax
; CHECK-NEXT: cmovgl %ecx, %eax ; CHECK-NEXT: cmovgel %ecx, %eax
; CHECK-NEXT: # kill: def $al killed $al killed $eax ; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%cmp = icmp sgt i32 %x, 42 %cmp = icmp sgt i32 %x, 42
%sel = select i1 %cmp, i8 67, i8 -125 %sel = select i1 %cmp, i8 67, i8 -125
ret i8 %sel ret i8 %sel
} }
▲ Show 20 Lines • Show All 120 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/setcc-logic.ll

Show First 20 Lines • Show All 450 Lines • ▼ Show 20 Lines; CHECK-NEXT: retq
%c = or <4 x i1> %a, %b %c = or <4 x i1> %a, %b
ret <4 x i1> %c ret <4 x i1> %c
} }
define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) nounwind { define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) nounwind {
; CHECK-LABEL: ne_neg1_and_ne_zero: ; CHECK-LABEL: ne_neg1_and_ne_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: incq %rdi ; CHECK-NEXT: incq %rdi
; CHECK-NEXT: cmpq $1, %rdi ; CHECK-NEXT: cmpq $2, %rdi
; CHECK-NEXT: seta %al ; CHECK-NEXT: setae %al
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%cmp1 = icmp ne i64 %x, -1 %cmp1 = icmp ne i64 %x, -1
%cmp2 = icmp ne i64 %x, 0 %cmp2 = icmp ne i64 %x, 0
%and = and i1 %cmp1, %cmp2 %and = and i1 %cmp1, %cmp2
ret i1 %and ret i1 %and
} }
; PR32401 - https://bugs.llvm.org/show_bug.cgi?id=32401 ; PR32401 - https://bugs.llvm.org/show_bug.cgi?id=32401
▲ Show 20 Lines • Show All 235 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/setcc.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; rdar://7329206 ; rdar://7329206
; Use sbb x, x to materialize carry bit in a GPR. The value is either ; Use sbb x, x to materialize carry bit in a GPR. The value is either
; all 1's or all 0's. ; all 1's or all 0's.
define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp { define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
; CHECK-LABEL: t1: ; CHECK-LABEL: t1:
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpw $26, %di ; CHECK-NEXT: cmpw $27, %di
; CHECK-NEXT: seta %al ; CHECK-NEXT: setae %al
; CHECK-NEXT: shll $5, %eax ; CHECK-NEXT: shll $5, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%t0 = icmp ugt i16 %x, 26 %t0 = icmp ugt i16 %x, 26
%if = select i1 %t0, i16 32, i16 0 %if = select i1 %t0, i16 32, i16 0
ret i16 %if ret i16 %if
} }
define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp { define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
▲ Show 20 Lines • Show All 85 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/smul_fix_sat.ll

Show All 10 Lines
; X64-LABEL: func: ; X64-LABEL: func:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movslq %esi, %rax ; X64-NEXT: movslq %esi, %rax
; X64-NEXT: movslq %edi, %rcx ; X64-NEXT: movslq %edi, %rcx
; X64-NEXT: imulq %rax, %rcx ; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: shrq $32, %rax ; X64-NEXT: shrq $32, %rax
; X64-NEXT: shrdl $2, %eax, %ecx ; X64-NEXT: shrdl $2, %eax, %ecx
; X64-NEXT: cmpl $1, %eax ; X64-NEXT: cmpl $2, %eax
; X64-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF ; X64-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
; X64-NEXT: cmovlel %ecx, %edx ; X64-NEXT: cmovll %ecx, %edx
; X64-NEXT: cmpl $-2, %eax ; X64-NEXT: cmpl $-2, %eax
; X64-NEXT: movl $-2147483648, %eax # imm = 0x80000000 ; X64-NEXT: movl $-2147483648, %eax # imm = 0x80000000
; X64-NEXT: cmovgel %edx, %eax ; X64-NEXT: cmovgel %edx, %eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func: ; X86-LABEL: func:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull {{[0-9]+}}(%esp) ; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax ; X86-NEXT: shrdl $2, %edx, %eax
; X86-NEXT: cmpl $1, %edx ; X86-NEXT: cmpl $2, %edx
; X86-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF ; X86-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: cmpl $-2, %edx ; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000 ; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
; X86-NEXT: cmovll %ecx, %eax ; X86-NEXT: cmovll %ecx, %eax
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i32 @llvm.smul.fix.sat.i32(i32 %x, i32 %y, i32 2) %tmp = call i32 @llvm.smul.fix.sat.i32(i32 %x, i32 %y, i32 2)
ret i32 %tmp ret i32 %tmp
} }
define i64 @func2(i64 %x, i64 %y) nounwind { define i64 @func2(i64 %x, i64 %y) nounwind {
; X64-LABEL: func2: ; X64-LABEL: func2:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: imulq %rsi ; X64-NEXT: imulq %rsi
; X64-NEXT: shrdq $2, %rdx, %rax ; X64-NEXT: shrdq $2, %rdx, %rax
; X64-NEXT: cmpq $1, %rdx ; X64-NEXT: cmpq $2, %rdx
; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
; X64-NEXT: cmovgq %rcx, %rax ; X64-NEXT: cmovgeq %rcx, %rax
; X64-NEXT: cmpq $-2, %rdx ; X64-NEXT: cmpq $-2, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000 ; X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
; X64-NEXT: cmovlq %rcx, %rax ; X64-NEXT: cmovlq %rcx, %rax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func2: ; X86-LABEL: func2:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
Show All 35 Lines
; X86-NEXT: movl %ebx, %esi ; X86-NEXT: movl %ebx, %esi
; X86-NEXT: sbbl $0, %esi ; X86-NEXT: sbbl $0, %esi
; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp) ; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X86-NEXT: cmovnsl %ebx, %esi ; X86-NEXT: cmovnsl %ebx, %esi
; X86-NEXT: cmovnsl %edi, %ebp ; X86-NEXT: cmovnsl %edi, %ebp
; X86-NEXT: testl %esi, %esi ; X86-NEXT: testl %esi, %esi
; X86-NEXT: setg %bl ; X86-NEXT: setg %bl
; X86-NEXT: sete %bh ; X86-NEXT: sete %bh
; X86-NEXT: cmpl $1, %ebp ; X86-NEXT: cmpl $2, %ebp
; X86-NEXT: seta %dl ; X86-NEXT: setae %dl
; X86-NEXT: andb %bh, %dl ; X86-NEXT: andb %bh, %dl
; X86-NEXT: orb %bl, %dl ; X86-NEXT: orb %bl, %dl
; X86-NEXT: shrdl $2, %eax, %ecx ; X86-NEXT: shrdl $2, %eax, %ecx
; X86-NEXT: shrdl $2, %ebp, %eax ; X86-NEXT: shrdl $2, %ebp, %eax
; X86-NEXT: testb %dl, %dl ; X86-NEXT: testb %dl, %dl
; X86-NEXT: movl $2147483647, %edi # imm = 0x7FFFFFFF ; X86-NEXT: movl $2147483647, %edi # imm = 0x7FFFFFFF
; X86-NEXT: cmovel %eax, %edi ; X86-NEXT: cmovel %eax, %edi
; X86-NEXT: movl $-1, %eax ; X86-NEXT: movl $-1, %eax
Show All 30 Lines
; X64-NEXT: imull %eax, %ecx ; X64-NEXT: imull %eax, %ecx
; X64-NEXT: movl %ecx, %eax ; X64-NEXT: movl %ecx, %eax
; X64-NEXT: shrb $2, %al ; X64-NEXT: shrb $2, %al
; X64-NEXT: shrl $8, %ecx ; X64-NEXT: shrl $8, %ecx
; X64-NEXT: movl %ecx, %edx ; X64-NEXT: movl %ecx, %edx
; X64-NEXT: shlb $6, %dl ; X64-NEXT: shlb $6, %dl
; X64-NEXT: orb %al, %dl ; X64-NEXT: orb %al, %dl
; X64-NEXT: movzbl %dl, %eax ; X64-NEXT: movzbl %dl, %eax
; X64-NEXT: cmpb $1, %cl ; X64-NEXT: cmpb $2, %cl
; X64-NEXT: movl $127, %edx ; X64-NEXT: movl $127, %edx
; X64-NEXT: cmovlel %eax, %edx ; X64-NEXT: cmovll %eax, %edx
; X64-NEXT: cmpb $-2, %cl ; X64-NEXT: cmpb $-2, %cl
; X64-NEXT: movl $128, %eax ; X64-NEXT: movl $128, %eax
; X64-NEXT: cmovgel %edx, %eax ; X64-NEXT: cmovgel %edx, %eax
; X64-NEXT: sarb $4, %al ; X64-NEXT: sarb $4, %al
; X64-NEXT: # kill: def $al killed $al killed $eax ; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func3: ; X86-LABEL: func3:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shlb $4, %al ; X86-NEXT: shlb $4, %al
; X86-NEXT: sarb $4, %al ; X86-NEXT: sarb $4, %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: shlb $4, %cl ; X86-NEXT: shlb $4, %cl
; X86-NEXT: movsbl %cl, %ecx ; X86-NEXT: movsbl %cl, %ecx
; X86-NEXT: movsbl %al, %eax ; X86-NEXT: movsbl %al, %eax
; X86-NEXT: imull %ecx, %eax ; X86-NEXT: imull %ecx, %eax
; X86-NEXT: movb %ah, %cl ; X86-NEXT: movb %ah, %cl
; X86-NEXT: shlb $6, %cl ; X86-NEXT: shlb $6, %cl
; X86-NEXT: shrb $2, %al ; X86-NEXT: shrb $2, %al
; X86-NEXT: orb %cl, %al ; X86-NEXT: orb %cl, %al
; X86-NEXT: movzbl %al, %ecx ; X86-NEXT: movzbl %al, %ecx
; X86-NEXT: cmpb $1, %ah ; X86-NEXT: cmpb $2, %ah
; X86-NEXT: movl $127, %edx ; X86-NEXT: movl $127, %edx
; X86-NEXT: cmovlel %ecx, %edx ; X86-NEXT: cmovll %ecx, %edx
; X86-NEXT: cmpb $-2, %ah ; X86-NEXT: cmpb $-2, %ah
; X86-NEXT: movl $128, %eax ; X86-NEXT: movl $128, %eax
; X86-NEXT: cmovgel %edx, %eax ; X86-NEXT: cmovgel %edx, %eax
; X86-NEXT: sarb $4, %al ; X86-NEXT: sarb $4, %al
; X86-NEXT: # kill: def $al killed $al killed $eax ; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i4 @llvm.smul.fix.sat.i4(i4 %x, i4 %y, i32 2) %tmp = call i4 @llvm.smul.fix.sat.i4(i4 %x, i4 %y, i32 2)
ret i4 %tmp ret i4 %tmp
} }
define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind { define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-LABEL: vec: ; X64-LABEL: vec:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3] ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
; X64-NEXT: movd %xmm2, %eax ; X64-NEXT: movd %xmm2, %eax
; X64-NEXT: cltq ; X64-NEXT: cltq
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3] ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
; X64-NEXT: movd %xmm2, %ecx ; X64-NEXT: movd %xmm2, %ecx
; X64-NEXT: movslq %ecx, %rdx ; X64-NEXT: movslq %ecx, %rdx
; X64-NEXT: imulq %rax, %rdx ; X64-NEXT: imulq %rax, %rdx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx ; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx ; X64-NEXT: shrdl $2, %ecx, %edx
; X64-NEXT: cmpl $1, %ecx ; X64-NEXT: cmpl $2, %ecx
; X64-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF ; X64-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
; X64-NEXT: cmovgl %eax, %edx ; X64-NEXT: cmovgel %eax, %edx
; X64-NEXT: cmpl $-2, %ecx ; X64-NEXT: cmpl $-2, %ecx
; X64-NEXT: movl $-2147483648, %ecx # imm = 0x80000000 ; X64-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
; X64-NEXT: cmovll %ecx, %edx ; X64-NEXT: cmovll %ecx, %edx
; X64-NEXT: movd %edx, %xmm2 ; X64-NEXT: movd %edx, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3] ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
; X64-NEXT: movd %xmm3, %edx ; X64-NEXT: movd %xmm3, %edx
; X64-NEXT: movslq %edx, %rdx ; X64-NEXT: movslq %edx, %rdx
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3] ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
; X64-NEXT: movd %xmm3, %esi ; X64-NEXT: movd %xmm3, %esi
; X64-NEXT: movslq %esi, %rsi ; X64-NEXT: movslq %esi, %rsi
; X64-NEXT: imulq %rdx, %rsi ; X64-NEXT: imulq %rdx, %rsi
; X64-NEXT: movq %rsi, %rdx ; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: shrq $32, %rdx ; X64-NEXT: shrq $32, %rdx
; X64-NEXT: shrdl $2, %edx, %esi ; X64-NEXT: shrdl $2, %edx, %esi
; X64-NEXT: cmpl $1, %edx ; X64-NEXT: cmpl $2, %edx
; X64-NEXT: cmovgl %eax, %esi ; X64-NEXT: cmovgel %eax, %esi
; X64-NEXT: cmpl $-2, %edx ; X64-NEXT: cmpl $-2, %edx
; X64-NEXT: cmovll %ecx, %esi ; X64-NEXT: cmovll %ecx, %esi
; X64-NEXT: movd %esi, %xmm3 ; X64-NEXT: movd %esi, %xmm3
; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] ; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; X64-NEXT: movd %xmm1, %edx ; X64-NEXT: movd %xmm1, %edx
; X64-NEXT: movslq %edx, %rdx ; X64-NEXT: movslq %edx, %rdx
; X64-NEXT: movd %xmm0, %esi ; X64-NEXT: movd %xmm0, %esi
; X64-NEXT: movslq %esi, %rsi ; X64-NEXT: movslq %esi, %rsi
; X64-NEXT: imulq %rdx, %rsi ; X64-NEXT: imulq %rdx, %rsi
; X64-NEXT: movq %rsi, %rdx ; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: shrq $32, %rdx ; X64-NEXT: shrq $32, %rdx
; X64-NEXT: shrdl $2, %edx, %esi ; X64-NEXT: shrdl $2, %edx, %esi
; X64-NEXT: cmpl $1, %edx ; X64-NEXT: cmpl $2, %edx
; X64-NEXT: cmovgl %eax, %esi ; X64-NEXT: cmovgel %eax, %esi
; X64-NEXT: cmpl $-2, %edx ; X64-NEXT: cmpl $-2, %edx
; X64-NEXT: cmovll %ecx, %esi ; X64-NEXT: cmovll %ecx, %esi
; X64-NEXT: movd %esi, %xmm2 ; X64-NEXT: movd %esi, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1] ; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
; X64-NEXT: movd %xmm1, %edx ; X64-NEXT: movd %xmm1, %edx
; X64-NEXT: movslq %edx, %rdx ; X64-NEXT: movslq %edx, %rdx
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1] ; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
; X64-NEXT: movd %xmm0, %esi ; X64-NEXT: movd %xmm0, %esi
; X64-NEXT: movslq %esi, %rsi ; X64-NEXT: movslq %esi, %rsi
; X64-NEXT: imulq %rdx, %rsi ; X64-NEXT: imulq %rdx, %rsi
; X64-NEXT: movq %rsi, %rdx ; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: shrq $32, %rdx ; X64-NEXT: shrq $32, %rdx
; X64-NEXT: shrdl $2, %edx, %esi ; X64-NEXT: shrdl $2, %edx, %esi
; X64-NEXT: cmpl $1, %edx ; X64-NEXT: cmpl $2, %edx
; X64-NEXT: cmovgl %eax, %esi ; X64-NEXT: cmovgel %eax, %esi
; X64-NEXT: cmpl $-2, %edx ; X64-NEXT: cmpl $-2, %edx
; X64-NEXT: cmovll %ecx, %esi ; X64-NEXT: cmovll %ecx, %esi
; X64-NEXT: movd %esi, %xmm0 ; X64-NEXT: movd %esi, %xmm0
; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] ; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] ; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; X64-NEXT: movdqa %xmm2, %xmm0 ; X64-NEXT: movdqa %xmm2, %xmm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: vec: ; X86-LABEL: vec:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull {{[0-9]+}}(%esp) ; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shrdl $2, %edx, %ecx ; X86-NEXT: shrdl $2, %edx, %ecx
; X86-NEXT: cmpl $1, %edx ; X86-NEXT: cmpl $2, %edx
; X86-NEXT: movl $2147483647, %ebp # imm = 0x7FFFFFFF ; X86-NEXT: movl $2147483647, %ebp # imm = 0x7FFFFFFF
; X86-NEXT: cmovgl %ebp, %ecx ; X86-NEXT: cmovgel %ebp, %ecx
; X86-NEXT: cmpl $-2, %edx ; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: movl $-2147483648, %esi # imm = 0x80000000 ; X86-NEXT: movl $-2147483648, %esi # imm = 0x80000000
; X86-NEXT: cmovll %esi, %ecx ; X86-NEXT: cmovll %esi, %ecx
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp) ; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: shrdl $2, %edx, %edi ; X86-NEXT: shrdl $2, %edx, %edi
; X86-NEXT: cmpl $1, %edx ; X86-NEXT: cmpl $2, %edx
; X86-NEXT: cmovgl %ebp, %edi ; X86-NEXT: cmovgel %ebp, %edi
; X86-NEXT: cmpl $-2, %edx ; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: cmovll %esi, %edi ; X86-NEXT: cmovll %esi, %edi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp) ; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: shrdl $2, %edx, %ebx ; X86-NEXT: shrdl $2, %edx, %ebx
; X86-NEXT: cmpl $1, %edx ; X86-NEXT: cmpl $2, %edx
; X86-NEXT: cmovgl %ebp, %ebx ; X86-NEXT: cmovgel %ebp, %ebx
; X86-NEXT: cmpl $-2, %edx ; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: cmovll %esi, %ebx ; X86-NEXT: cmovll %esi, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull {{[0-9]+}}(%esp) ; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax ; X86-NEXT: shrdl $2, %edx, %eax
; X86-NEXT: cmpl $1, %edx ; X86-NEXT: cmpl $2, %edx
; X86-NEXT: cmovgl %ebp, %eax ; X86-NEXT: cmovgel %ebp, %eax
; X86-NEXT: cmpl $-2, %edx ; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: cmovll %esi, %eax ; X86-NEXT: cmovll %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %eax, 12(%edx) ; X86-NEXT: movl %eax, 12(%edx)
; X86-NEXT: movl %ebx, 8(%edx) ; X86-NEXT: movl %ebx, 8(%edx)
; X86-NEXT: movl %edi, 4(%edx) ; X86-NEXT: movl %edi, 4(%edx)
; X86-NEXT: movl %ecx, (%edx) ; X86-NEXT: movl %ecx, (%edx)
; X86-NEXT: movl %edx, %eax ; X86-NEXT: movl %edx, %eax
▲ Show 20 Lines • Show All 350 Lines • ▼ Show 20 Lines
} }
define i64 @func8(i64 %x, i64 %y) nounwind { define i64 @func8(i64 %x, i64 %y) nounwind {
; X64-LABEL: func8: ; X64-LABEL: func8:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: imulq %rsi ; X64-NEXT: imulq %rsi
; X64-NEXT: shrdq $63, %rdx, %rax ; X64-NEXT: shrdq $63, %rdx, %rax
; X64-NEXT: movabsq $4611686018427387903, %rcx # imm = 0x3FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $4611686018427387904, %rcx # imm = 0x4000000000000000
; X64-NEXT: cmpq %rcx, %rdx ; X64-NEXT: cmpq %rcx, %rdx
; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
; X64-NEXT: cmovgq %rcx, %rax ; X64-NEXT: cmovgeq %rcx, %rax
; X64-NEXT: movabsq $-4611686018427387904, %rcx # imm = 0xC000000000000000 ; X64-NEXT: movabsq $-4611686018427387904, %rcx # imm = 0xC000000000000000
; X64-NEXT: cmpq %rcx, %rdx ; X64-NEXT: cmpq %rcx, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000 ; X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
; X64-NEXT: cmovlq %rcx, %rax ; X64-NEXT: cmovlq %rcx, %rax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func8: ; X86-LABEL: func8:
; X86: # %bb.0: ; X86: # %bb.0:
Show All 33 Lines
; X86-NEXT: subl {{[0-9]+}}(%esp), %edx ; X86-NEXT: subl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %esi, %edi ; X86-NEXT: movl %esi, %edi
; X86-NEXT: sbbl $0, %edi ; X86-NEXT: sbbl $0, %edi
; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp) ; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X86-NEXT: cmovnsl %esi, %edi ; X86-NEXT: cmovnsl %esi, %edi
; X86-NEXT: cmovnsl %ecx, %edx ; X86-NEXT: cmovnsl %ecx, %edx
; X86-NEXT: shrdl $31, %edx, %eax ; X86-NEXT: shrdl $31, %edx, %eax
; X86-NEXT: shrdl $31, %edi, %edx ; X86-NEXT: shrdl $31, %edi, %edx
; X86-NEXT: cmpl $1073741823, %edi # imm = 0x3FFFFFFF ; X86-NEXT: cmpl $1073741824, %edi # imm = 0x40000000
; X86-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF ; X86-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
; X86-NEXT: cmovgl %ecx, %edx ; X86-NEXT: cmovgel %ecx, %edx
; X86-NEXT: movl $-1, %ecx ; X86-NEXT: movl $-1, %ecx
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: xorl %ecx, %ecx ; X86-NEXT: xorl %ecx, %ecx
; X86-NEXT: cmpl $-1073741824, %edi # imm = 0xC0000000 ; X86-NEXT: cmpl $-1073741824, %edi # imm = 0xC0000000
; X86-NEXT: cmovll %ecx, %eax ; X86-NEXT: cmovll %ecx, %eax
; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000 ; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
; X86-NEXT: cmovll %ecx, %edx ; X86-NEXT: cmovll %ecx, %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i64 @llvm.smul.fix.sat.i64(i64 %x, i64 %y, i32 63) %tmp = call i64 @llvm.smul.fix.sat.i64(i64 %x, i64 %y, i32 63)
ret i64 %tmp ret i64 %tmp
} }

llvm/test/CodeGen/X86/smul_fix_sat_constants.ll

Show All 9 Lines
declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64) declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64)
define i64 @func() nounwind { define i64 @func() nounwind {
; X64-LABEL: func: ; X64-LABEL: func:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl $2, %ecx ; X64-NEXT: movl $2, %ecx
; X64-NEXT: movl $3, %eax ; X64-NEXT: movl $3, %eax
; X64-NEXT: imulq %rcx ; X64-NEXT: imulq %rcx
; X64-NEXT: cmpq $1, %rdx ; X64-NEXT: cmpq $2, %rdx
; X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
; X64-NEXT: movl $1, %ecx ; X64-NEXT: movl $1, %ecx
; X64-NEXT: cmovgq %rax, %rcx ; X64-NEXT: cmovgeq %rax, %rcx
; X64-NEXT: cmpq $-2, %rdx ; X64-NEXT: cmpq $-2, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000 ; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; X64-NEXT: cmovgeq %rcx, %rax ; X64-NEXT: cmovgeq %rcx, %rax
; X64-NEXT: retq ; X64-NEXT: retq
%tmp = call i64 @llvm.smul.fix.sat.i64(i64 3, i64 2, i32 2) %tmp = call i64 @llvm.smul.fix.sat.i64(i64 3, i64 2, i32 2)
ret i64 %tmp ret i64 %tmp
} }
Show All 16 Lines
define i64 @func3() nounwind { define i64 @func3() nounwind {
; X64-LABEL: func3: ; X64-LABEL: func3:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
; X64-NEXT: movl $2, %edx ; X64-NEXT: movl $2, %edx
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: imulq %rdx ; X64-NEXT: imulq %rdx
; X64-NEXT: cmpq $1, %rdx ; X64-NEXT: cmpq $2, %rdx
; X64-NEXT: movabsq $4611686018427387903, %rsi # imm = 0x3FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $4611686018427387903, %rsi # imm = 0x3FFFFFFFFFFFFFFF
; X64-NEXT: cmovgq %rcx, %rsi ; X64-NEXT: cmovgeq %rcx, %rsi
; X64-NEXT: cmpq $-2, %rdx ; X64-NEXT: cmpq $-2, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000 ; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; X64-NEXT: cmovgeq %rsi, %rax ; X64-NEXT: cmovgeq %rsi, %rax
; X64-NEXT: retq ; X64-NEXT: retq
%tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 2) %tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 2)
ret i64 %tmp ret i64 %tmp
} }
Show All 17 Lines
define i64 @func5() nounwind { define i64 @func5() nounwind {
; X64-LABEL: func5: ; X64-LABEL: func5:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
; X64-NEXT: movl $2, %edx ; X64-NEXT: movl $2, %edx
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: imulq %rdx ; X64-NEXT: imulq %rdx
; X64-NEXT: movabsq $4611686018427387903, %rax # imm = 0x3FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $4611686018427387904, %rax # imm = 0x4000000000000000
; X64-NEXT: cmpq %rax, %rdx ; X64-NEXT: cmpq %rax, %rdx
; X64-NEXT: movl $1, %esi ; X64-NEXT: movl $1, %esi
; X64-NEXT: cmovgq %rcx, %rsi ; X64-NEXT: cmovgeq %rcx, %rsi
; X64-NEXT: movabsq $-4611686018427387904, %rax # imm = 0xC000000000000000 ; X64-NEXT: movabsq $-4611686018427387904, %rax # imm = 0xC000000000000000
; X64-NEXT: cmpq %rax, %rdx ; X64-NEXT: cmpq %rax, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000 ; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; X64-NEXT: cmovgeq %rsi, %rax ; X64-NEXT: cmovgeq %rsi, %rax
; X64-NEXT: retq ; X64-NEXT: retq
%tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 63) %tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 63)
ret i64 %tmp ret i64 %tmp
} }

llvm/test/CodeGen/X86/srem-seteq.ll

Show First 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
define i16 @test_srem_even(i16 %X) nounwind { define i16 @test_srem_even(i16 %X) nounwind {
; X86-LABEL: test_srem_even: ; X86-LABEL: test_srem_even:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $28087, {{[0-9]+}}(%esp), %eax # imm = 0x6DB7 ; X86-NEXT: imull $28087, {{[0-9]+}}(%esp), %eax # imm = 0x6DB7
; X86-NEXT: addl $4680, %eax # imm = 0x1248 ; X86-NEXT: addl $4680, %eax # imm = 0x1248
; X86-NEXT: rorw %ax ; X86-NEXT: rorw %ax
; X86-NEXT: movzwl %ax, %ecx ; X86-NEXT: movzwl %ax, %ecx
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $4680, %ecx # imm = 0x1248 ; X86-NEXT: cmpl $4681, %ecx # imm = 0x1249
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_srem_even: ; X64-LABEL: test_srem_even:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $28087, %edi, %eax # imm = 0x6DB7 ; X64-NEXT: imull $28087, %edi, %eax # imm = 0x6DB7
; X64-NEXT: addl $4680, %eax # imm = 0x1248 ; X64-NEXT: addl $4680, %eax # imm = 0x1248
; X64-NEXT: rorw %ax ; X64-NEXT: rorw %ax
; X64-NEXT: movzwl %ax, %ecx ; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $4680, %ecx # imm = 0x1248 ; X64-NEXT: cmpl $4681, %ecx # imm = 0x1249
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
%srem = srem i16 %X, 14 %srem = srem i16 %X, 14
%cmp = icmp ne i16 %srem, 0 %cmp = icmp ne i16 %srem, 0
%ret = zext i1 %cmp to i16 %ret = zext i1 %cmp to i16
ret i16 %ret ret i16 %ret
} }
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
; 'NE' predicate is fine too. ; 'NE' predicate is fine too.
define i32 @test_srem_odd_setne(i32 %X) nounwind { define i32 @test_srem_odd_setne(i32 %X) nounwind {
; X86-LABEL: test_srem_odd_setne: ; X86-LABEL: test_srem_odd_setne:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD ; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
; X86-NEXT: addl $429496729, %ecx # imm = 0x19999999 ; X86-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $858993458, %ecx # imm = 0x33333332 ; X86-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_srem_odd_setne: ; X64-LABEL: test_srem_odd_setne:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD ; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: addl $429496729, %ecx # imm = 0x19999999 ; X64-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $858993458, %ecx # imm = 0x33333332 ; X64-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%srem = srem i32 %X, 5 %srem = srem i32 %X, 5
%cmp = icmp ne i32 %srem, 0 %cmp = icmp ne i32 %srem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
; The fold is only valid for positive divisors, negative-ones should be negated. ; The fold is only valid for positive divisors, negative-ones should be negated.
define i32 @test_srem_negative_odd(i32 %X) nounwind { define i32 @test_srem_negative_odd(i32 %X) nounwind {
; X86-LABEL: test_srem_negative_odd: ; X86-LABEL: test_srem_negative_odd:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD ; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
; X86-NEXT: addl $429496729, %ecx # imm = 0x19999999 ; X86-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $858993458, %ecx # imm = 0x33333332 ; X86-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_srem_negative_odd: ; X64-LABEL: test_srem_negative_odd:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD ; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: addl $429496729, %ecx # imm = 0x19999999 ; X64-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $858993458, %ecx # imm = 0x33333332 ; X64-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%srem = srem i32 %X, -5 %srem = srem i32 %X, -5
%cmp = icmp ne i32 %srem, 0 %cmp = icmp ne i32 %srem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
define i32 @test_srem_negative_even(i32 %X) nounwind { define i32 @test_srem_negative_even(i32 %X) nounwind {
; X86-LABEL: test_srem_negative_even: ; X86-LABEL: test_srem_negative_even:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $-1227133513, {{[0-9]+}}(%esp), %ecx # imm = 0xB6DB6DB7 ; X86-NEXT: imull $-1227133513, {{[0-9]+}}(%esp), %ecx # imm = 0xB6DB6DB7
; X86-NEXT: addl $306783378, %ecx # imm = 0x12492492 ; X86-NEXT: addl $306783378, %ecx # imm = 0x12492492
; X86-NEXT: rorl %ecx ; X86-NEXT: rorl %ecx
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $306783378, %ecx # imm = 0x12492492 ; X86-NEXT: cmpl $306783379, %ecx # imm = 0x12492493
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_srem_negative_even: ; X64-LABEL: test_srem_negative_even:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $-1227133513, %edi, %ecx # imm = 0xB6DB6DB7 ; X64-NEXT: imull $-1227133513, %edi, %ecx # imm = 0xB6DB6DB7
; X64-NEXT: addl $306783378, %ecx # imm = 0x12492492 ; X64-NEXT: addl $306783378, %ecx # imm = 0x12492492
; X64-NEXT: rorl %ecx ; X64-NEXT: rorl %ecx
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $306783378, %ecx # imm = 0x12492492 ; X64-NEXT: cmpl $306783379, %ecx # imm = 0x12492493
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%srem = srem i32 %X, -14 %srem = srem i32 %X, -14
%cmp = icmp ne i32 %srem, 0 %cmp = icmp ne i32 %srem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
;------------------------------------------------------------------------------; ;------------------------------------------------------------------------------;
▲ Show 20 Lines • Show All 88 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/ssub_sat.ll

Show First 20 Lines • Show All 134 Lines • ▼ Show 20 Lines
; X86-LABEL: func3: ; X86-LABEL: func3:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: subb {{[0-9]+}}(%esp), %al ; X86-NEXT: subb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl %al, %ecx ; X86-NEXT: movzbl %al, %ecx
; X86-NEXT: cmpb $7, %al ; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %eax ; X86-NEXT: movl $7, %eax
; X86-NEXT: cmovll %ecx, %eax ; X86-NEXT: cmovll %ecx, %eax
; X86-NEXT: cmpb $-8, %al ; X86-NEXT: cmpb $-7, %al
; X86-NEXT: movl $248, %ecx ; X86-NEXT: movl $248, %ecx
; X86-NEXT: cmovgl %eax, %ecx ; X86-NEXT: cmovgel %eax, %ecx
; X86-NEXT: movsbl %cl, %eax ; X86-NEXT: movsbl %cl, %eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: func3: ; X64-LABEL: func3:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: subb %sil, %dil ; X64-NEXT: subb %sil, %dil
; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: cmpb $7, %al ; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx ; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx ; X64-NEXT: cmovll %eax, %ecx
; X64-NEXT: cmpb $-8, %cl ; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax ; X64-NEXT: movl $248, %eax
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax ; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq ; X64-NEXT: retq
%tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y) %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y)
ret i4 %tmp ret i4 %tmp
} }
define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind { define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X86-LABEL: vec: ; X86-LABEL: vec:
▲ Show 20 Lines • Show All 66 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/ssub_sat_plus.ll

Show First 20 Lines • Show All 149 Lines • ▼ Show 20 Lines
; X86-NEXT: mulb {{[0-9]+}}(%esp) ; X86-NEXT: mulb {{[0-9]+}}(%esp)
; X86-NEXT: shlb $4, %al ; X86-NEXT: shlb $4, %al
; X86-NEXT: sarb $4, %al ; X86-NEXT: sarb $4, %al
; X86-NEXT: subb %al, %cl ; X86-NEXT: subb %al, %cl
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: cmpb $7, %cl ; X86-NEXT: cmpb $7, %cl
; X86-NEXT: movl $7, %ecx ; X86-NEXT: movl $7, %ecx
; X86-NEXT: cmovll %eax, %ecx ; X86-NEXT: cmovll %eax, %ecx
; X86-NEXT: cmpb $-8, %cl ; X86-NEXT: cmpb $-7, %cl
; X86-NEXT: movl $248, %eax ; X86-NEXT: movl $248, %eax
; X86-NEXT: cmovgl %ecx, %eax ; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: movsbl %al, %eax ; X86-NEXT: movsbl %al, %eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: func4: ; X64-LABEL: func4:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %esi, %eax ; X64-NEXT: movl %esi, %eax
; X64-NEXT: # kill: def $al killed $al killed $eax ; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: mulb %dl ; X64-NEXT: mulb %dl
; X64-NEXT: shlb $4, %al ; X64-NEXT: shlb $4, %al
; X64-NEXT: sarb $4, %al ; X64-NEXT: sarb $4, %al
; X64-NEXT: subb %al, %dil ; X64-NEXT: subb %al, %dil
; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: cmpb $7, %al ; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx ; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx ; X64-NEXT: cmovll %eax, %ecx
; X64-NEXT: cmpb $-8, %cl ; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax ; X64-NEXT: movl $248, %eax
; X64-NEXT: cmovgl %ecx, %eax ; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax ; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq ; X64-NEXT: retq
%a = mul i4 %y, %z %a = mul i4 %y, %z
%tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a) %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a)
ret i4 %tmp ret i4 %tmp
} }

llvm/test/CodeGen/X86/umul_fix_sat.ll

Show All 10 Lines
; X64-LABEL: func: ; X64-LABEL: func:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %esi, %eax ; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl %edi, %ecx ; X64-NEXT: movl %edi, %ecx
; X64-NEXT: imulq %rax, %rcx ; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: shrq $32, %rax ; X64-NEXT: shrq $32, %rax
; X64-NEXT: shrdl $2, %eax, %ecx ; X64-NEXT: shrdl $2, %eax, %ecx
; X64-NEXT: cmpl $3, %eax ; X64-NEXT: cmpl $4, %eax
; X64-NEXT: movl $-1, %eax ; X64-NEXT: movl $-1, %eax
; X64-NEXT: cmovbel %ecx, %eax ; X64-NEXT: cmovbl %ecx, %eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func: ; X86-LABEL: func:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax ; X86-NEXT: shrdl $2, %edx, %eax
; X86-NEXT: cmpl $3, %edx ; X86-NEXT: cmpl $4, %edx
; X86-NEXT: movl $-1, %ecx ; X86-NEXT: movl $-1, %ecx
; X86-NEXT: cmoval %ecx, %eax ; X86-NEXT: cmovael %ecx, %eax
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i32 @llvm.umul.fix.sat.i32(i32 %x, i32 %y, i32 2) %tmp = call i32 @llvm.umul.fix.sat.i32(i32 %x, i32 %y, i32 2)
ret i32 %tmp ret i32 %tmp
} }
define i64 @func2(i64 %x, i64 %y) nounwind { define i64 @func2(i64 %x, i64 %y) nounwind {
; X64-LABEL: func2: ; X64-LABEL: func2:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: shrdq $2, %rdx, %rax ; X64-NEXT: shrdq $2, %rdx, %rax
; X64-NEXT: cmpq $3, %rdx ; X64-NEXT: cmpq $4, %rdx
; X64-NEXT: movq $-1, %rcx ; X64-NEXT: movq $-1, %rcx
; X64-NEXT: cmovaq %rcx, %rax ; X64-NEXT: cmovaeq %rcx, %rax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func2: ; X86-LABEL: func2:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; X64-NEXT: imull %esi, %eax ; X64-NEXT: imull %esi, %eax
; X64-NEXT: movl %eax, %ecx ; X64-NEXT: movl %eax, %ecx
; X64-NEXT: shrb $2, %cl ; X64-NEXT: shrb $2, %cl
; X64-NEXT: shrl $8, %eax ; X64-NEXT: shrl $8, %eax
; X64-NEXT: movl %eax, %edx ; X64-NEXT: movl %eax, %edx
; X64-NEXT: shlb $6, %dl ; X64-NEXT: shlb $6, %dl
; X64-NEXT: orb %cl, %dl ; X64-NEXT: orb %cl, %dl
; X64-NEXT: movzbl %dl, %ecx ; X64-NEXT: movzbl %dl, %ecx
; X64-NEXT: cmpb $3, %al ; X64-NEXT: cmpb $4, %al
; X64-NEXT: movl $255, %eax ; X64-NEXT: movl $255, %eax
; X64-NEXT: cmovbel %ecx, %eax ; X64-NEXT: cmovbl %ecx, %eax
; X64-NEXT: shrb $4, %al ; X64-NEXT: shrb $4, %al
; X64-NEXT: # kill: def $al killed $al killed $eax ; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func3: ; X86-LABEL: func3:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: andb $15, %al ; X86-NEXT: andb $15, %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl %al, %edx ; X86-NEXT: movzbl %al, %edx
; X86-NEXT: shlb $4, %cl ; X86-NEXT: shlb $4, %cl
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: imull %edx, %eax ; X86-NEXT: imull %edx, %eax
; X86-NEXT: movb %ah, %cl ; X86-NEXT: movb %ah, %cl
; X86-NEXT: shlb $6, %cl ; X86-NEXT: shlb $6, %cl
; X86-NEXT: shrb $2, %al ; X86-NEXT: shrb $2, %al
; X86-NEXT: orb %cl, %al ; X86-NEXT: orb %cl, %al
; X86-NEXT: movzbl %al, %ecx ; X86-NEXT: movzbl %al, %ecx
; X86-NEXT: cmpb $3, %ah ; X86-NEXT: cmpb $4, %ah
; X86-NEXT: movl $255, %eax ; X86-NEXT: movl $255, %eax
; X86-NEXT: cmovbel %ecx, %eax ; X86-NEXT: cmovbl %ecx, %eax
; X86-NEXT: shrb $4, %al ; X86-NEXT: shrb $4, %al
; X86-NEXT: # kill: def $al killed $al killed $eax ; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i4 @llvm.umul.fix.sat.i4(i4 %x, i4 %y, i32 2) %tmp = call i4 @llvm.umul.fix.sat.i4(i4 %x, i4 %y, i32 2)
ret i4 %tmp ret i4 %tmp
} }
define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind { define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-LABEL: vec: ; X64-LABEL: vec:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3] ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
; X64-NEXT: movd %xmm2, %eax ; X64-NEXT: movd %xmm2, %eax
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3] ; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
; X64-NEXT: movd %xmm2, %ecx ; X64-NEXT: movd %xmm2, %ecx
; X64-NEXT: imulq %rax, %rcx ; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: shrq $32, %rax ; X64-NEXT: shrq $32, %rax
; X64-NEXT: shrdl $2, %eax, %ecx ; X64-NEXT: shrdl $2, %eax, %ecx
; X64-NEXT: cmpl $3, %eax ; X64-NEXT: cmpl $4, %eax
; X64-NEXT: movl $-1, %eax ; X64-NEXT: movl $-1, %eax
; X64-NEXT: cmoval %eax, %ecx ; X64-NEXT: cmovael %eax, %ecx
; X64-NEXT: movd %ecx, %xmm2 ; X64-NEXT: movd %ecx, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3] ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
; X64-NEXT: movd %xmm3, %ecx ; X64-NEXT: movd %xmm3, %ecx
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3] ; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
; X64-NEXT: movd %xmm3, %edx ; X64-NEXT: movd %xmm3, %edx
; X64-NEXT: imulq %rcx, %rdx ; X64-NEXT: imulq %rcx, %rdx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx ; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx ; X64-NEXT: shrdl $2, %ecx, %edx
; X64-NEXT: cmpl $3, %ecx ; X64-NEXT: cmpl $4, %ecx
; X64-NEXT: cmoval %eax, %edx ; X64-NEXT: cmovael %eax, %edx
; X64-NEXT: movd %edx, %xmm3 ; X64-NEXT: movd %edx, %xmm3
; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] ; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; X64-NEXT: movd %xmm1, %ecx ; X64-NEXT: movd %xmm1, %ecx
; X64-NEXT: movd %xmm0, %edx ; X64-NEXT: movd %xmm0, %edx
; X64-NEXT: imulq %rcx, %rdx ; X64-NEXT: imulq %rcx, %rdx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx ; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx ; X64-NEXT: shrdl $2, %ecx, %edx
; X64-NEXT: cmpl $3, %ecx ; X64-NEXT: cmpl $4, %ecx
; X64-NEXT: cmoval %eax, %edx ; X64-NEXT: cmovael %eax, %edx
; X64-NEXT: movd %edx, %xmm2 ; X64-NEXT: movd %edx, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1] ; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
; X64-NEXT: movd %xmm1, %ecx ; X64-NEXT: movd %xmm1, %ecx
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1] ; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
; X64-NEXT: movd %xmm0, %edx ; X64-NEXT: movd %xmm0, %edx
; X64-NEXT: imulq %rcx, %rdx ; X64-NEXT: imulq %rcx, %rdx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx ; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx ; X64-NEXT: shrdl $2, %ecx, %edx
; X64-NEXT: cmpl $3, %ecx ; X64-NEXT: cmpl $4, %ecx
; X64-NEXT: cmoval %eax, %edx ; X64-NEXT: cmovael %eax, %edx
; X64-NEXT: movd %edx, %xmm0 ; X64-NEXT: movd %edx, %xmm0
; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] ; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] ; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; X64-NEXT: movdqa %xmm2, %xmm0 ; X64-NEXT: movdqa %xmm2, %xmm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: vec: ; X86-LABEL: vec:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: shrdl $2, %edx, %esi ; X86-NEXT: shrdl $2, %edx, %esi
; X86-NEXT: cmpl $3, %edx ; X86-NEXT: cmpl $4, %edx
; X86-NEXT: movl $-1, %ecx ; X86-NEXT: movl $-1, %ecx
; X86-NEXT: cmoval %ecx, %esi ; X86-NEXT: cmovael %ecx, %esi
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: shrdl $2, %edx, %ebp ; X86-NEXT: shrdl $2, %edx, %ebp
; X86-NEXT: cmpl $3, %edx ; X86-NEXT: cmpl $4, %edx
; X86-NEXT: cmoval %ecx, %ebp ; X86-NEXT: cmovael %ecx, %ebp
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: shrdl $2, %edx, %ebx ; X86-NEXT: shrdl $2, %edx, %ebx
; X86-NEXT: cmpl $3, %edx ; X86-NEXT: cmpl $4, %edx
; X86-NEXT: cmoval %ecx, %ebx ; X86-NEXT: cmovael %ecx, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax ; X86-NEXT: shrdl $2, %edx, %eax
; X86-NEXT: cmpl $3, %edx ; X86-NEXT: cmpl $4, %edx
; X86-NEXT: cmoval %ecx, %eax ; X86-NEXT: cmovael %ecx, %eax
; X86-NEXT: movl %eax, 12(%edi) ; X86-NEXT: movl %eax, 12(%edi)
; X86-NEXT: movl %ebx, 8(%edi) ; X86-NEXT: movl %ebx, 8(%edi)
; X86-NEXT: movl %ebp, 4(%edi) ; X86-NEXT: movl %ebp, 4(%edi)
; X86-NEXT: movl %esi, (%edi) ; X86-NEXT: movl %esi, (%edi)
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
▲ Show 20 Lines • Show All 194 Lines • ▼ Show 20 Lines
} }
define i64 @func7(i64 %x, i64 %y) nounwind { define i64 @func7(i64 %x, i64 %y) nounwind {
; X64-LABEL: func7: ; X64-LABEL: func7:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: shrdq $32, %rdx, %rax ; X64-NEXT: shrdq $32, %rdx, %rax
; X64-NEXT: movl $4294967295, %ecx # imm = 0xFFFFFFFF ; X64-NEXT: movabsq $4294967296, %rcx # imm = 0x100000000
; X64-NEXT: cmpq %rcx, %rdx ; X64-NEXT: cmpq %rcx, %rdx
; X64-NEXT: movq $-1, %rcx ; X64-NEXT: movq $-1, %rcx
; X64-NEXT: cmovaq %rcx, %rax ; X64-NEXT: cmovaeq %rcx, %rax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func7: ; X86-LABEL: func7:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
Show All 36 Lines
} }
define i64 @func8(i64 %x, i64 %y) nounwind { define i64 @func8(i64 %x, i64 %y) nounwind {
; X64-LABEL: func8: ; X64-LABEL: func8:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: shrdq $63, %rdx, %rax ; X64-NEXT: shrdq $63, %rdx, %rax
; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF ; X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
; X64-NEXT: cmpq %rcx, %rdx ; X64-NEXT: cmpq %rcx, %rdx
; X64-NEXT: movq $-1, %rcx ; X64-NEXT: movq $-1, %rcx
; X64-NEXT: cmovaq %rcx, %rax ; X64-NEXT: cmovaeq %rcx, %rax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: func8: ; X86-LABEL: func8:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
▲ Show 20 Lines • Show All 41 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
define i1 @test_urem_odd_setne(i4 %X) nounwind { define i1 @test_urem_odd_setne(i4 %X) nounwind {
; X86-LABEL: test_urem_odd_setne: ; X86-LABEL: test_urem_odd_setne:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx ; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax ; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: andb $15, %al ; X86-NEXT: andb $15, %al
; X86-NEXT: cmpb $3, %al ; X86-NEXT: cmpb $4, %al
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_odd_setne: ; X64-LABEL: test_urem_odd_setne:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi ; X64-NEXT: # kill: def $edi killed $edi def $rdi
; X64-NEXT: leal (%rdi,%rdi,2), %eax ; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax ; X64-NEXT: leal (%rdi,%rax,4), %eax
; X64-NEXT: andb $15, %al ; X64-NEXT: andb $15, %al
; X64-NEXT: cmpb $3, %al ; X64-NEXT: cmpb $4, %al
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i4 %X, 5 %urem = urem i4 %X, 5
%cmp = icmp ne i4 %urem, 0 %cmp = icmp ne i4 %urem, 0
ret i1 %cmp ret i1 %cmp
} }
define i1 @test_urem_negative_odd(i9 %X) nounwind { define i1 @test_urem_negative_odd(i9 %X) nounwind {
; X86-LABEL: test_urem_negative_odd: ; X86-LABEL: test_urem_negative_odd:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $307, {{[0-9]+}}(%esp), %eax # imm = 0x133 ; X86-NEXT: imull $307, {{[0-9]+}}(%esp), %eax # imm = 0x133
; X86-NEXT: andl $511, %eax # imm = 0x1FF ; X86-NEXT: andl $511, %eax # imm = 0x1FF
; X86-NEXT: cmpw $1, %ax ; X86-NEXT: cmpw $2, %ax
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_negative_odd: ; X64-LABEL: test_urem_negative_odd:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $307, %edi, %eax # imm = 0x133 ; X64-NEXT: imull $307, %edi, %eax # imm = 0x133
; X64-NEXT: andl $511, %eax # imm = 0x1FF ; X64-NEXT: andl $511, %eax # imm = 0x1FF
; X64-NEXT: cmpw $1, %ax ; X64-NEXT: cmpw $2, %ax
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i9 %X, -5 %urem = urem i9 %X, -5
%cmp = icmp ne i9 %urem, 0 %cmp = icmp ne i9 %urem, 0
ret i1 %cmp ret i1 %cmp
} }
define <3 x i1> @test_urem_vec(<3 x i11> %X) nounwind { define <3 x i1> @test_urem_vec(<3 x i11> %X) nounwind {
; X86-LABEL: test_urem_vec: ; X86-LABEL: test_urem_vec:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $683, {{[0-9]+}}(%esp), %eax # imm = 0x2AB ; X86-NEXT: imull $683, {{[0-9]+}}(%esp), %eax # imm = 0x2AB
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $10, %ecx ; X86-NEXT: shll $10, %ecx
; X86-NEXT: andl $2046, %eax # imm = 0x7FE ; X86-NEXT: andl $2046, %eax # imm = 0x7FE
; X86-NEXT: shrl %eax ; X86-NEXT: shrl %eax
; X86-NEXT: orl %ecx, %eax ; X86-NEXT: orl %ecx, %eax
; X86-NEXT: andl $2047, %eax # imm = 0x7FF ; X86-NEXT: andl $2047, %eax # imm = 0x7FF
; X86-NEXT: cmpl $341, %eax # imm = 0x155 ; X86-NEXT: cmpl $342, %eax # imm = 0x156
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: imull $1463, {{[0-9]+}}(%esp), %ecx # imm = 0x5B7 ; X86-NEXT: imull $1463, {{[0-9]+}}(%esp), %ecx # imm = 0x5B7
; X86-NEXT: addl $-1463, %ecx # imm = 0xFA49 ; X86-NEXT: addl $-1463, %ecx # imm = 0xFA49
; X86-NEXT: andl $2047, %ecx # imm = 0x7FF ; X86-NEXT: andl $2047, %ecx # imm = 0x7FF
; X86-NEXT: cmpl $292, %ecx # imm = 0x124 ; X86-NEXT: cmpl $293, %ecx # imm = 0x125
; X86-NEXT: seta %dl ; X86-NEXT: setae %dl
; X86-NEXT: imull $819, {{[0-9]+}}(%esp), %ecx # imm = 0x333 ; X86-NEXT: imull $819, {{[0-9]+}}(%esp), %ecx # imm = 0x333
; X86-NEXT: addl $-1638, %ecx # imm = 0xF99A ; X86-NEXT: addl $-1638, %ecx # imm = 0xF99A
; X86-NEXT: andl $2047, %ecx # imm = 0x7FF ; X86-NEXT: andl $2047, %ecx # imm = 0x7FF
; X86-NEXT: cmpw $1, %cx ; X86-NEXT: cmpw $2, %cx
; X86-NEXT: seta %cl ; X86-NEXT: setae %cl
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; SSE2-LABEL: test_urem_vec: ; SSE2-LABEL: test_urem_vec:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: movd %esi, %xmm0 ; SSE2-NEXT: movd %esi, %xmm0
; SSE2-NEXT: movd %edi, %xmm1 ; SSE2-NEXT: movd %edi, %xmm1
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE2-NEXT: movd %edx, %xmm0 ; SSE2-NEXT: movd %edx, %xmm0
▲ Show 20 Lines • Show All 126 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/urem-seteq.ll

Show First 20 Lines • Show All 101 Lines • ▼ Show 20 Lines
define i16 @test_urem_even(i16 %X) nounwind { define i16 @test_urem_even(i16 %X) nounwind {
; X86-LABEL: test_urem_even: ; X86-LABEL: test_urem_even:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $28087, {{[0-9]+}}(%esp), %eax # imm = 0x6DB7 ; X86-NEXT: imull $28087, {{[0-9]+}}(%esp), %eax # imm = 0x6DB7
; X86-NEXT: rorw %ax ; X86-NEXT: rorw %ax
; X86-NEXT: movzwl %ax, %ecx ; X86-NEXT: movzwl %ax, %ecx
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $4681, %ecx # imm = 0x1249 ; X86-NEXT: cmpl $4682, %ecx # imm = 0x124A
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_even: ; X64-LABEL: test_urem_even:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $28087, %edi, %eax # imm = 0x6DB7 ; X64-NEXT: imull $28087, %edi, %eax # imm = 0x6DB7
; X64-NEXT: rorw %ax ; X64-NEXT: rorw %ax
; X64-NEXT: movzwl %ax, %ecx ; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $4681, %ecx # imm = 0x1249 ; X64-NEXT: cmpl $4682, %ecx # imm = 0x124A
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i16 %X, 14 %urem = urem i16 %X, 14
%cmp = icmp ne i16 %urem, 0 %cmp = icmp ne i16 %urem, 0
%ret = zext i1 %cmp to i16 %ret = zext i1 %cmp to i16
ret i16 %ret ret i16 %ret
} }
▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Lines
;------------------------------------------------------------------------------; ;------------------------------------------------------------------------------;
; 'NE' predicate is fine too. ; 'NE' predicate is fine too.
define i32 @test_urem_odd_setne(i32 %X) nounwind { define i32 @test_urem_odd_setne(i32 %X) nounwind {
; X86-LABEL: test_urem_odd_setne: ; X86-LABEL: test_urem_odd_setne:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD ; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $858993459, %ecx # imm = 0x33333333 ; X86-NEXT: cmpl $858993460, %ecx # imm = 0x33333334
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_odd_setne: ; X64-LABEL: test_urem_odd_setne:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD ; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $858993459, %ecx # imm = 0x33333333 ; X64-NEXT: cmpl $858993460, %ecx # imm = 0x33333334
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, 5 %urem = urem i32 %X, 5
%cmp = icmp ne i32 %urem, 0 %cmp = icmp ne i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
; The fold is only valid for positive divisors, negative-ones should be negated. ; The fold is only valid for positive divisors, negative-ones should be negated.
define i32 @test_urem_negative_odd(i32 %X) nounwind { define i32 @test_urem_negative_odd(i32 %X) nounwind {
; X86-LABEL: test_urem_negative_odd: ; X86-LABEL: test_urem_negative_odd:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $858993459, {{[0-9]+}}(%esp), %ecx # imm = 0x33333333 ; X86-NEXT: imull $858993459, {{[0-9]+}}(%esp), %ecx # imm = 0x33333333
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $1, %ecx ; X86-NEXT: cmpl $2, %ecx
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_negative_odd: ; X64-LABEL: test_urem_negative_odd:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $858993459, %edi, %ecx # imm = 0x33333333 ; X64-NEXT: imull $858993459, %edi, %ecx # imm = 0x33333333
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $1, %ecx ; X64-NEXT: cmpl $2, %ecx
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, -5 %urem = urem i32 %X, -5
%cmp = icmp ne i32 %urem, 0 %cmp = icmp ne i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
define i32 @test_urem_negative_even(i32 %X) nounwind { define i32 @test_urem_negative_even(i32 %X) nounwind {
; X86-LABEL: test_urem_negative_even: ; X86-LABEL: test_urem_negative_even:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: imull $-920350135, {{[0-9]+}}(%esp), %ecx # imm = 0xC9249249 ; X86-NEXT: imull $-920350135, {{[0-9]+}}(%esp), %ecx # imm = 0xC9249249
; X86-NEXT: rorl %ecx ; X86-NEXT: rorl %ecx
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $1, %ecx ; X86-NEXT: cmpl $2, %ecx
; X86-NEXT: seta %al ; X86-NEXT: setae %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_negative_even: ; X64-LABEL: test_urem_negative_even:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: imull $-920350135, %edi, %ecx # imm = 0xC9249249 ; X64-NEXT: imull $-920350135, %edi, %ecx # imm = 0xC9249249
; X64-NEXT: rorl %ecx ; X64-NEXT: rorl %ecx
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $1, %ecx ; X64-NEXT: cmpl $2, %ecx
; X64-NEXT: seta %al ; X64-NEXT: setae %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, -14 %urem = urem i32 %X, -14
%cmp = icmp ne i32 %urem, 0 %cmp = icmp ne i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
;------------------------------------------------------------------------------; ;------------------------------------------------------------------------------;
▲ Show 20 Lines • Show All 80 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vector-mulfix-legalize.ll

Show First 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: pextrw $2, %xmm0, %eax ; CHECK-NEXT: pextrw $2, %xmm0, %eax
; CHECK-NEXT: cwtl ; CHECK-NEXT: cwtl
; CHECK-NEXT: leal (%rax,%rax,2), %ecx ; CHECK-NEXT: leal (%rax,%rax,2), %ecx
; CHECK-NEXT: movl %ecx, %edx ; CHECK-NEXT: movl %ecx, %edx
; CHECK-NEXT: shrl $16, %edx ; CHECK-NEXT: shrl $16, %edx
; CHECK-NEXT: shldw $1, %cx, %dx ; CHECK-NEXT: shldw $1, %cx, %dx
; CHECK-NEXT: sarl $16, %ecx ; CHECK-NEXT: sarl $16, %ecx
; CHECK-NEXT: cmpl $16383, %ecx # imm = 0x3FFF ; CHECK-NEXT: cmpl $16384, %ecx # imm = 0x4000
; CHECK-NEXT: movl $32767, %r8d # imm = 0x7FFF ; CHECK-NEXT: movl $32767, %r8d # imm = 0x7FFF
; CHECK-NEXT: cmovgl %r8d, %edx ; CHECK-NEXT: cmovgel %r8d, %edx
; CHECK-NEXT: cmpl $-16384, %ecx # imm = 0xC000 ; CHECK-NEXT: cmpl $-16384, %ecx # imm = 0xC000
; CHECK-NEXT: movl $32768, %ecx # imm = 0x8000 ; CHECK-NEXT: movl $32768, %ecx # imm = 0x8000
; CHECK-NEXT: cmovll %ecx, %edx ; CHECK-NEXT: cmovll %ecx, %edx
; CHECK-NEXT: pextrw $1, %xmm0, %esi ; CHECK-NEXT: pextrw $1, %xmm0, %esi
; CHECK-NEXT: movswl %si, %edi ; CHECK-NEXT: movswl %si, %edi
; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: shrl $16, %eax ; CHECK-NEXT: shrl $16, %eax
; CHECK-NEXT: leal (%rdi,%rdi), %esi ; CHECK-NEXT: leal (%rdi,%rdi), %esi
; CHECK-NEXT: shrdw $15, %ax, %si ; CHECK-NEXT: shrdw $15, %ax, %si
; CHECK-NEXT: sarl $15, %edi ; CHECK-NEXT: sarl $15, %edi
; CHECK-NEXT: cmpl $16383, %edi # imm = 0x3FFF ; CHECK-NEXT: cmpl $16384, %edi # imm = 0x4000
; CHECK-NEXT: cmovgl %r8d, %esi ; CHECK-NEXT: cmovgel %r8d, %esi
; CHECK-NEXT: cmpl $-16384, %edi # imm = 0xC000 ; CHECK-NEXT: cmpl $-16384, %edi # imm = 0xC000
; CHECK-NEXT: cmovll %ecx, %esi ; CHECK-NEXT: cmovll %ecx, %esi
; CHECK-NEXT: movd %xmm0, %eax ; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: cwtl ; CHECK-NEXT: cwtl
; CHECK-NEXT: movl %eax, %edi ; CHECK-NEXT: movl %eax, %edi
; CHECK-NEXT: shrl $16, %edi ; CHECK-NEXT: shrl $16, %edi
; CHECK-NEXT: shldw $1, %ax, %di ; CHECK-NEXT: shldw $1, %ax, %di
; CHECK-NEXT: sarl $16, %eax ; CHECK-NEXT: sarl $16, %eax
; CHECK-NEXT: cmpl $16383, %eax # imm = 0x3FFF ; CHECK-NEXT: cmpl $16384, %eax # imm = 0x4000
; CHECK-NEXT: cmovgl %r8d, %edi ; CHECK-NEXT: cmovgel %r8d, %edi
; CHECK-NEXT: cmpl $-16384, %eax # imm = 0xC000 ; CHECK-NEXT: cmpl $-16384, %eax # imm = 0xC000
; CHECK-NEXT: cmovll %ecx, %edi ; CHECK-NEXT: cmovll %ecx, %edi
; CHECK-NEXT: movzwl %di, %eax ; CHECK-NEXT: movzwl %di, %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: pinsrw $1, %esi, %xmm1 ; CHECK-NEXT: pinsrw $1, %esi, %xmm1
; CHECK-NEXT: pinsrw $2, %edx, %xmm1 ; CHECK-NEXT: pinsrw $2, %edx, %xmm1
; CHECK-NEXT: pextrw $3, %xmm0, %eax ; CHECK-NEXT: pextrw $3, %xmm0, %eax
; CHECK-NEXT: cwtl ; CHECK-NEXT: cwtl
; CHECK-NEXT: movl %eax, %edx ; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: shrl $14, %edx ; CHECK-NEXT: shrl $14, %edx
; CHECK-NEXT: leal (,%rax,4), %esi ; CHECK-NEXT: leal (,%rax,4), %esi
; CHECK-NEXT: shrdw $15, %dx, %si ; CHECK-NEXT: shrdw $15, %dx, %si
; CHECK-NEXT: sarl $14, %eax ; CHECK-NEXT: sarl $14, %eax
; CHECK-NEXT: cmpl $16383, %eax # imm = 0x3FFF ; CHECK-NEXT: cmpl $16384, %eax # imm = 0x4000
; CHECK-NEXT: cmovgl %r8d, %esi ; CHECK-NEXT: cmovgel %r8d, %esi
; CHECK-NEXT: cmpl $-16384, %eax # imm = 0xC000 ; CHECK-NEXT: cmpl $-16384, %eax # imm = 0xC000
; CHECK-NEXT: cmovll %ecx, %esi ; CHECK-NEXT: cmovll %ecx, %esi
; CHECK-NEXT: pinsrw $3, %esi, %xmm1 ; CHECK-NEXT: pinsrw $3, %esi, %xmm1
; CHECK-NEXT: movdqa %xmm1, %xmm0 ; CHECK-NEXT: movdqa %xmm1, %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%t = call <4 x i16> @llvm.smul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15) %t = call <4 x i16> @llvm.smul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
ret <4 x i16> %t ret <4 x i16> %t
} }
define <4 x i16> @umulfixsat(<4 x i16> %a) { define <4 x i16> @umulfixsat(<4 x i16> %a) {
; CHECK-LABEL: umulfixsat: ; CHECK-LABEL: umulfixsat:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: pextrw $2, %xmm0, %eax ; CHECK-NEXT: pextrw $2, %xmm0, %eax
; CHECK-NEXT: leal (%rax,%rax,2), %eax ; CHECK-NEXT: leal (%rax,%rax,2), %eax
; CHECK-NEXT: movl %eax, %edx ; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: shrl $16, %edx ; CHECK-NEXT: shrl $16, %edx
; CHECK-NEXT: movl %edx, %ecx ; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: shldw $1, %ax, %cx ; CHECK-NEXT: shldw $1, %ax, %cx
; CHECK-NEXT: cmpl $32767, %edx # imm = 0x7FFF ; CHECK-NEXT: cmpl $32768, %edx # imm = 0x8000
; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF ; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF
; CHECK-NEXT: cmoval %eax, %ecx ; CHECK-NEXT: cmovael %eax, %ecx
; CHECK-NEXT: pextrw $1, %xmm0, %edx ; CHECK-NEXT: pextrw $1, %xmm0, %edx
; CHECK-NEXT: addl %edx, %edx ; CHECK-NEXT: addl %edx, %edx
; CHECK-NEXT: movl %edx, %esi ; CHECK-NEXT: movl %edx, %esi
; CHECK-NEXT: shrl $16, %esi ; CHECK-NEXT: shrl $16, %esi
; CHECK-NEXT: movl %esi, %edi ; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: shldw $1, %dx, %di ; CHECK-NEXT: shldw $1, %dx, %di
; CHECK-NEXT: cmpl $32767, %esi # imm = 0x7FFF ; CHECK-NEXT: cmpl $32768, %esi # imm = 0x8000
; CHECK-NEXT: cmoval %eax, %edi ; CHECK-NEXT: cmovael %eax, %edi
; CHECK-NEXT: movd %xmm0, %edx ; CHECK-NEXT: movd %xmm0, %edx
; CHECK-NEXT: xorl %esi, %esi ; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: shldw $1, %dx, %si ; CHECK-NEXT: shldw $1, %dx, %si
; CHECK-NEXT: movl $32767, %edx # imm = 0x7FFF ; CHECK-NEXT: movl $32768, %edx # imm = 0x8000
; CHECK-NEXT: negl %edx ; CHECK-NEXT: negl %edx
; CHECK-NEXT: cmoval %eax, %esi ; CHECK-NEXT: cmovael %eax, %esi
; CHECK-NEXT: movzwl %si, %edx ; CHECK-NEXT: movzwl %si, %edx
; CHECK-NEXT: movd %edx, %xmm1 ; CHECK-NEXT: movd %edx, %xmm1
; CHECK-NEXT: pinsrw $1, %edi, %xmm1 ; CHECK-NEXT: pinsrw $1, %edi, %xmm1
; CHECK-NEXT: pinsrw $2, %ecx, %xmm1 ; CHECK-NEXT: pinsrw $2, %ecx, %xmm1
; CHECK-NEXT: pextrw $3, %xmm0, %ecx ; CHECK-NEXT: pextrw $3, %xmm0, %ecx
; CHECK-NEXT: shll $2, %ecx ; CHECK-NEXT: shll $2, %ecx
; CHECK-NEXT: movl %ecx, %edx ; CHECK-NEXT: movl %ecx, %edx
; CHECK-NEXT: shrl $16, %edx ; CHECK-NEXT: shrl $16, %edx
; CHECK-NEXT: movl %edx, %esi ; CHECK-NEXT: movl %edx, %esi
; CHECK-NEXT: shldw $1, %cx, %si ; CHECK-NEXT: shldw $1, %cx, %si
; CHECK-NEXT: cmpl $32767, %edx # imm = 0x7FFF ; CHECK-NEXT: cmpl $32768, %edx # imm = 0x8000
; CHECK-NEXT: cmoval %eax, %esi ; CHECK-NEXT: cmovael %eax, %esi
; CHECK-NEXT: pinsrw $3, %esi, %xmm1 ; CHECK-NEXT: pinsrw $3, %esi, %xmm1
; CHECK-NEXT: movdqa %xmm1, %xmm0 ; CHECK-NEXT: movdqa %xmm1, %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%t = call <4 x i16> @llvm.umul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15) %t = call <4 x i16> @llvm.umul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
ret <4 x i16> %t ret <4 x i16> %t
} }

llvm/test/CodeGen/X86/zext-sext.ll

Show All 17 Lines
; CHECK-NEXT: movswl (%rax,%rsi,2), %eax ; CHECK-NEXT: movswl (%rax,%rsi,2), %eax
; CHECK-NEXT: movl $1, %esi ; CHECK-NEXT: movl $1, %esi
; CHECK-NEXT: imull %edx, %eax ; CHECK-NEXT: imull %edx, %eax
; CHECK-NEXT: xorl %edx, %edx ; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: addl $2138875574, %eax # imm = 0x7F7CA6B6 ; CHECK-NEXT: addl $2138875574, %eax # imm = 0x7F7CA6B6
; CHECK-NEXT: cmpl $-8608074, %eax # imm = 0xFF7CA6B6 ; CHECK-NEXT: cmpl $-8608074, %eax # imm = 0xFF7CA6B6
; CHECK-NEXT: movslq %eax, %rdi ; CHECK-NEXT: movslq %eax, %rdi
; CHECK-NEXT: setl %dl ; CHECK-NEXT: setl %dl
; CHECK-NEXT: cmpl $2138875573, %eax # imm = 0x7F7CA6B5 ; CHECK-NEXT: cmpl $2138875574, %eax # imm = 0x7F7CA6B6
; CHECK-NEXT: movq %rdi, %r8 ; CHECK-NEXT: movq %rdi, %r8
; CHECK-NEXT: leal -1(%rdx,%rdx), %edx ; CHECK-NEXT: leal -1(%rdx,%rdx), %edx
; CHECK-NEXT: cmovlel %edx, %esi ; CHECK-NEXT: cmovll %edx, %esi
; CHECK-NEXT: subq %rax, %r8 ; CHECK-NEXT: subq %rax, %r8
; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $1, %esi ; CHECK-NEXT: cmpl $1, %esi
; CHECK-NEXT: cmovneq %rax, %r8 ; CHECK-NEXT: cmovneq %rax, %r8
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: cmovnsq %rax, %r8 ; CHECK-NEXT: cmovnsq %rax, %r8
; CHECK-NEXT: movq (%rcx), %rax ; CHECK-NEXT: movq (%rcx), %rax
; CHECK-NEXT: subq %r8, %rdi ; CHECK-NEXT: subq %r8, %rdi
▲ Show 20 Lines • Show All 44 Lines • Show Last 20 Lines