[AArch64] Revert "Prevent hoisting fmul from THEN/ELSE to IF if there is fmsub/fmadd opportunity."

[sebpop]

Summary

This reverts commit 543900539f7c166d453e5bd5175f9461dbbd4319.

As explained in https://reviews.llvm.org/D7299 this patch causes missed optimizations:
it disables simplifyCFG from hoisting fmul even when all uses of the multiply could be hoisted.

The side-effects of the patch do not justify the original motivation for the change:
"improved spec2006/soplex by 2% consistently on cortex-a57 core"

One example where this change is harmful is https://github.com/ispc/ispc/issues/2052
where ISPC generates similar code on both branches and relies on simplifyCFG to remove the branch.
The branch is removed only after the arm64 back-end pairs fmul+fadd
and after that, there are not enough scalar optimizations to clean up the code.

A better solution is to make instruction selection work on multiple basic-blocks
such that it can decide to sink and fuse multiplies to form FMAs.

Tested on arm64-linux.

llvm/lib/Target/AArch64/AArch64ISelLowering.h

bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
                           unsigned Intrinsic) const override;
 
   bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
                              EVT NewVT) const override;
 
   bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
   bool isTruncateFree(EVT VT1, EVT VT2) const override;
 
-  bool isProfitableToHoist(Instruction *I) const override;
-
   bool isZExtFree(Type *Ty1, Type *Ty2) const override;
   bool isZExtFree(EVT VT1, EVT VT2) const override;
   bool isZExtFree(SDValue Val, EVT VT2) const override;
 
   bool shouldSinkOperands(Instruction *I,
                           SmallVectorImpl<Use *> &Ops) const override;
 
   bool hasPairedLoad(EVT LoadedType, Align &RequiredAligment) const override;

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

 bool AArch64TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
   if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger())
     return false;
   uint64_t NumBits1 = VT1.getFixedSizeInBits();
   uint64_t NumBits2 = VT2.getFixedSizeInBits();
   return NumBits1 > NumBits2;
 }
 
-/// Check if it is profitable to hoist instruction in then/else to if.
-/// Not profitable if I and it's user can form a FMA instruction
-/// because we prefer FMSUB/FMADD.
-bool AArch64TargetLowering::isProfitableToHoist(Instruction *I) const {
-  if (I->getOpcode() != Instruction::FMul)
-    return true;
-
-  if (!I->hasOneUse())
-    return true;
-
-  Instruction *User = I->user_back();
-
-  if (User &&
-      !(User->getOpcode() == Instruction::FSub ||
-        User->getOpcode() == Instruction::FAdd))
-    return true;
-
-  const TargetOptions &Options = getTargetMachine().Options;
-  const Function *F = I->getFunction();
-  const DataLayout &DL = F->getParent()->getDataLayout();
-  Type *Ty = User->getOperand(0)->getType();
-
-  return !(isFMAFasterThanFMulAndFAdd(*F, Ty) &&
-           isOperationLegalOrCustom(ISD::FMA, getValueType(DL, Ty)) &&
-           (Options.AllowFPOpFusion == FPOpFusion::Fast ||
-            Options.UnsafeFPMath));
-}
-
 // All 32-bit GPR operations implicitly zero the high-half of the corresponding
 // 64-bit GPR.
 bool AArch64TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {
   if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())
     return false;
   unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
   unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
   return NumBits1 == 32 && NumBits2 == 64;

llvm/test/Transforms/SimplifyCFG/AArch64/prefer-fma.ll

-; RUN: opt < %s -mtriple=aarch64-linux-gnu -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -enable-unsafe-fp-math -S >%t
-; RUN: FileCheck %s < %t
-; ModuleID = 't.cc'
-
-; Function Attrs: nounwind
-define double @_Z3fooRdS_S_S_(double* dereferenceable(8) %x, double* dereferenceable(8) %y, double* dereferenceable(8) %a) #0 {
-entry:
-  %0 = load double, double* %y, align 8
-  %cmp = fcmp oeq double %0, 0.000000e+00
-  %1 = load double, double* %x, align 8
-  br i1 %cmp, label %if.then, label %if.else
-
-; fadd (const, (fmul x, y))
-if.then:                                          ; preds = %entry
-; CHECK-LABEL: if.then:
-; CHECK:   %3 = fmul fast double %1, %2
-; CHECK-NEXT:   %mul = fadd fast double 1.000000e+00, %3
-  %2 = load double, double* %a, align 8
-  %3 = fmul fast double %1, %2
-  %mul = fadd fast double 1.000000e+00, %3
-  store double %mul, double* %y, align 8
-  br label %if.end
-
-; fsub ((fmul x, y), z)
-if.else:                                          ; preds = %entry
-; CHECK-LABEL: if.else:
-; CHECK:   %mul1 = fmul fast double %1, %2
-; CHECK-NEXT:   %sub1 = fsub fast double %mul1, %0
-  %4 = load double, double* %a, align 8
-  %mul1 = fmul fast double %1, %4
-  %sub1 = fsub fast double %mul1, %0
-  %gep1 = getelementptr double, double* %y, i32 1
-  store double %sub1, double* %gep1, align 8
-  br label %if.end
-
-if.end:                                           ; preds = %if.else, %if.then
-  %5 = load double, double* %y, align 8
-  %cmp2 = fcmp oeq double %5, 2.000000e+00
-  %6 = load double, double* %x, align 8
-  br i1 %cmp2, label %if.then2, label %if.else2
-
-; fsub (x, (fmul y, z))
-if.then2:                                         ; preds = %entry
-; CHECK-LABEL: if.then2:
-; CHECK:   %7 = fmul fast double %5, 3.000000e+00
-; CHECK-NEXT:   %mul2 = fsub fast double %6, %7
-  %7 = load double, double* %a, align 8
-  %8 = fmul fast double %6, 3.0000000e+00
-  %mul2 = fsub fast double %7, %8
-  store double %mul2, double* %y, align 8
-  br label %if.end2
-
-; fsub (fneg((fmul x, y)), const)
-if.else2:                                         ; preds = %entry
-; CHECK-LABEL: if.else2:
-; CHECK:   %mul3 = fmul fast double %5, 3.000000e+00
-; CHECK-NEXT:   %neg = fsub fast double 0.000000e+00, %mul3
-; CHECK-NEXT:   %sub2 = fsub fast double %neg, 3.000000e+00
-  %mul3 = fmul fast double %6, 3.0000000e+00
-  %neg = fsub fast double 0.0000000e+00, %mul3
-  %sub2 = fsub fast double %neg, 3.0000000e+00
-  store double %sub2, double* %y, align 8
-  br label %if.end2
-
-if.end2:                                           ; preds = %if.else, %if.then
-  %9 = load double, double* %x, align 8
-  %10 = load double, double* %y, align 8
-  %add = fadd fast double %9, %10
-  %11 = load double, double* %a, align 8
-  %add2 = fadd fast double %add, %11
-  ret double %add2
-}
-