[M68k] Replace unknown operand with explicit type

[ricky26]

Summary

Replace the unknown operand used for immediate operands for DIV/MUL with a fixed 16-bit immediate.

This is required since the assembly parser generator requires that all operands are typed.

[myhsu]

LGTM after the inlined comment is addressed.

llvm/lib/Target/M68k/M68kInstrArithmetic.td

548

Though this is only used by division for now, I would recommend to write a more general description (without mentioning division).

[ricky26]

Made as_imm16 comment more generic

llvm/lib/Target/M68k/M68kInstrArithmetic.td

 class MxDiMuOp_DD<string MN, bits<4> CMD, MxBead3Bits OPMODE,
                   MxOperand DST, MxOperand OPD>
     : MxInst<(outs DST:$dst), (ins DST:$src, OPD:$opd), MN#"\t$opd, $dst", [],
              MxDiMuEncoding<MxBead4Bits<CMD>, OPMODE, MxEncEAd_2, MxExtEmpty>>;
 
 // $reg <- $reg op $imm
 class MxDiMuOp_DI<string MN, bits<4> CMD, MxBead3Bits OPMODE,
                   MxOperand DST, MxOperand OPD>
-    : MxInst<(outs DST:$dst), (ins DST:$src, unknown:$opd), MN#"\t$opd, $dst", [],
+    : MxInst<(outs DST:$dst), (ins DST:$src, OPD:$opd), MN#"\t$opd, $dst", [],
              MxDiMuEncoding<MxBead4Bits<CMD>, OPMODE, MxEncEAi, MxExtI16_2>>;
 } // let Constraints
 } // Defs = [CCR]
 
 multiclass MxDiMuOp<string MN, bits<4> CMD, bit isComm = 0> {
 
   let isCommutable = isComm in {
     def "S"#NAME#"d32d16" : MxDiMuOp_DD<MN#"s", CMD, MxSDiMuOpmode, MxDRD32,
                                         MxDRD16>;
     def "U"#NAME#"d32d16" : MxDiMuOp_DD<MN#"u", CMD, MxUDiMuOpmode, MxDRD32,
                                         MxDRD16>;
   }
 
   def "S"#NAME#"d32i16" : MxDiMuOp_DI<MN#"s", CMD, MxSDiMuOpmode, MxDRD32,
                                       Mxi16imm>;
   def "U"#NAME#"d32i16" : MxDiMuOp_DI<MN#"u", CMD, MxUDiMuOpmode, MxDRD32,
                                       Mxi16imm>;
 
 }
 
 defm DIV : MxDiMuOp<"div", 0x8>;
 
+// This is used to cast immediates to 16-bits for operations which don't
+// support smaller immediate sizes.
+def as_i16imm : SDNodeXForm<imm, [{
+  return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i16);
+}]>;
+
 // RR i8
 def : Pat<(sdiv i8:$dst, i8:$opd),
           (EXTRACT_SUBREG
             (SDIVd32d16 (MOVSXd32d8 $dst), (MOVSXd16d8 $opd)),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(udiv i8:$dst, i8:$opd),
           (EXTRACT_SUBREG
def : Pat<(urem i16:$dst, i16:$opd),
           (EXTRACT_SUBREG
             (LSR32di (LSR32di (UDIVd32d16 (MOVZXd32d16 $dst), $opd), 8), 8),
              MxSubRegIndex16Lo)>;
 
 
 // RI i8
 def : Pat<(sdiv i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (SDIVd32i16 (MOVSXd32d8 $dst), imm:$opd),
+            (SDIVd32i16 (MOVSXd32d8 $dst), (as_i16imm $opd)),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(udiv i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (UDIVd32i16 (MOVZXd32d8 $dst), imm:$opd),
+            (UDIVd32i16 (MOVZXd32d8 $dst), (as_i16imm $opd)),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(srem i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SDIVd32i16 (MOVSXd32d8 $dst), imm:$opd), 8), 8),
+            (ASR32di (ASR32di (SDIVd32i16 (MOVSXd32d8 $dst), (as_i16imm $opd)), 8), 8),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(urem i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UDIVd32i16 (MOVZXd32d8 $dst), imm:$opd), 8), 8),
+            (LSR32di (LSR32di (UDIVd32i16 (MOVZXd32d8 $dst), (as_i16imm $opd)), 8), 8),
              MxSubRegIndex8Lo)>;
 
 // RI i16
 def : Pat<(sdiv i16:$dst, MximmSExt16:$opd),
           (EXTRACT_SUBREG
             (SDIVd32i16 (MOVSXd32d16 $dst), imm:$opd),
              MxSubRegIndex16Lo)>;