[RISCV] Correct DWARF number for vector registers.

[HsiangKai]

Summary

The DWARF numbers of vector registers are already defined in riscv-elf-psabi. The DWARF number for vector is start from 96. Correct the DWARF numbers of vector registers.

https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#dwarf-register-numbers-

[craig.topper]

LGTM

llvm/lib/Target/RISCV/RISCVRegisterInfo.td

 defvar vbool8_t  = nxv8i1;
 defvar vbool16_t = nxv4i1;
 defvar vbool32_t = nxv2i1;
 defvar vbool64_t = nxv1i1;
 
 // Vector registers
 let RegAltNameIndices = [ABIRegAltName] in {
   foreach Index = 0-31 in {
-    def V#Index : RISCVReg<Index, "v"#Index, ["v"#Index]>, DwarfRegNum<[!add(Index, 64)]>;
+    def V#Index : RISCVReg<Index, "v"#Index, ["v"#Index]>, DwarfRegNum<[!add(Index, 96)]>;
   }
 
   foreach Index = [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22,
                    24, 26, 28, 30] in {
     def V#Index#M2 : RISCVRegWithSubRegs<Index, "v"#Index,
                        [!cast<Register>("V"#Index),
                         !cast<Register>("V"#!add(Index, 1))],
                        ["v"#Index]>,