[AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly

[mstorsjo]

Summary

This makes sure that assembly output actually can be assembled.

Set the correct MCExpr relocations specifier VK_PAGEOFF - and also set VK_PAGE consistently even though it's not visible in the assembly output.

[compnerd]

LGTM; please fix the formatting lint.

llvm/lib/Target/AArch64/AArch64MCInstLower.cpp

if (MO.getTargetFlags() & AArch64II::MO_TLS) {
     else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
              AArch64II::MO_HI12)
       RefFlags |= AArch64MCExpr::VK_SECREL_HI12;
 
   } else if (MO.getTargetFlags() & AArch64II::MO_S) {
     RefFlags |= AArch64MCExpr::VK_SABS;
   } else {
     RefFlags |= AArch64MCExpr::VK_ABS;
+
+    if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
+      RefFlags |= AArch64MCExpr::VK_PAGE;
+    else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
+             AArch64II::MO_PAGEOFF)
+      RefFlags |= AArch64MCExpr::VK_PAGEOFF | AArch64MCExpr::VK_NC;
   }
 
   if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3)
     RefFlags |= AArch64MCExpr::VK_G3;
   else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G2)
     RefFlags |= AArch64MCExpr::VK_G2;
   else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G1)
     RefFlags |= AArch64MCExpr::VK_G1;

llvm/test/CodeGen/AArch64/cfguard-checks.ll

entry:
   %func_ptr = alloca i32 ()*, align 8
   store i32 ()* @target_func, i32 ()** %func_ptr, align 8
   %0 = load i32 ()*, i32 ()** %func_ptr, align 8
   %1 = call i32 %0() #0
   ret i32 %1
 
   ; CHECK-LABEL: func_guard_nocf
   ; CHECK:       adrp x8, target_func
-  ; CHECK:       add x8, x8, target_func
+  ; CHECK:       add x8, x8, :lo12:target_func
   ; CHECK-NOT:   __guard_check_icall_fptr
   ; CHECK:       blr x8
 }
 attributes #0 = { "guard_nocf" }
 
 
 ; Test that Control Flow Guard checks are added even at -O0.
 define i32 @func_optnone_cf() #1 {
 entry:
   %func_ptr = alloca i32 ()*, align 8
   store i32 ()* @target_func, i32 ()** %func_ptr, align 8
   %0 = load i32 ()*, i32 ()** %func_ptr, align 8
   %1 = call i32 %0()
   ret i32 %1
 
   ; The call to __guard_check_icall_fptr should come immediately before the call to the target function.
   ; CHECK-LABEL: func_optnone_cf
   ; CHECK:        adrp x8, target_func
-  ; CHECK:        add x8, x8, target_func
+  ; CHECK:        add x8, x8, :lo12:target_func
   ; CHECK:        adrp x9, __guard_check_icall_fptr
-  ; CHECK:        add x9, x9, __guard_check_icall_fptr
+  ; CHECK:        add x9, x9, :lo12:__guard_check_icall_fptr
   ; CHECK:        ldr x9, [x9]
   ; CHECK:        mov x15, x8
   ; CHECK:        blr x9
   ; CHECK-NEXT:   blr x8
 }
 attributes #1 = { noinline optnone }
 
 
 ; Test that Control Flow Guard checks are correctly added in optimized code (common case).
 define i32 @func_cf() {
 entry:
   %func_ptr = alloca i32 ()*, align 8
   store i32 ()* @target_func, i32 ()** %func_ptr, align 8
   %0 = load i32 ()*, i32 ()** %func_ptr, align 8
   %1 = call i32 %0()
   ret i32 %1
 
   ; The call to __guard_check_icall_fptr should come immediately before the call to the target function.
   ; CHECK-LABEL: func_cf
   ; CHECK:        adrp x8, __guard_check_icall_fptr
-  ; CHECK:        ldr x9, [x8, __guard_check_icall_fptr]
+  ; CHECK:        ldr x9, [x8, :lo12:__guard_check_icall_fptr]
   ; CHECK:        adrp x8, target_func
-  ; CHECK:        add x8, x8, target_func
+  ; CHECK:        add x8, x8, :lo12:target_func
   ; CHECK:        mov x15, x8
   ; CHECK:        blr x9
   ; CHECK-NEXT:   blr x8
 }
 
 
 ; Test that Control Flow Guard checks are correctly added on invoke instructions.
 define i32 @func_cf_invoke() personality i8* bitcast (void ()* @h to i8*) {

 lpad:                                             ; preds = %entry
   %tmp = landingpad { i8*, i32 }
           catch i8* null
   ret i32 -1
 
   ; The call to __guard_check_icall_fptr should come immediately before the call to the target function.
   ; CHECK-LABEL: func_cf_invoke
   ; CHECK:        adrp x8, __guard_check_icall_fptr
-  ; CHECK:        ldr x9, [x8, __guard_check_icall_fptr]
+  ; CHECK:        ldr x9, [x8, :lo12:__guard_check_icall_fptr]
   ; CHECK:        adrp x8, target_func
-  ; CHECK:        add x8, x8, target_func
+  ; CHECK:        add x8, x8, :lo12:target_func
   ; CHECK:        mov x15, x8
   ; CHECK:        blr x9
   ; CHECK-NEXT:   .Ltmp0:
   ; CHECK-NEXT:   blr x8
   ; CHECK:       ; %invoke.cont
   ; CHECK:       ; %lpad
 }
 

llvm/test/CodeGen/AArch64/dllimport.ll

 ; RUN: llc -mtriple aarch64-unknown-windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefixes=CHECK,DAG-ISEL
 ; RUN: llc -mtriple aarch64-unknown-windows-msvc -fast-isel -filetype asm -o - %s | FileCheck %s -check-prefixes=CHECK,FAST-ISEL
 ; RUN: llc -mtriple aarch64-unknown-windows-msvc -verify-machineinstrs -O0 -filetype asm -o - %s | FileCheck %s -check-prefixes=CHECK,GLOBAL-ISEL,GLOBAL-ISEL-FALLBACK
 
 @var = external dllimport global i32
 @ext = external global i32
 declare dllimport i32 @external()
 declare i32 @internal()
 
 define i32 @get_var() {
   %1 = load i32, i32* @var, align 4
   ret i32 %1
 }
 
 ; CHECK-LABEL: get_var
 ; CHECK: adrp x8, __imp_var
-; CHECK: ldr x8, [x8, __imp_var]
+; CHECK: ldr x8, [x8, :lo12:__imp_var]
 ; CHECK: ldr w0, [x8]
 ; CHECK: ret
 
 define i32 @get_ext() {
   %1 = load i32, i32* @ext, align 4
   ret i32 %1
 }
 
 ; CHECK-LABEL: get_ext
 ; CHECK: adrp x8, ext
-; DAG-ISEL: ldr w0, [x8, ext]
-; FAST-ISEL: add x8, x8, ext
+; DAG-ISEL: ldr w0, [x8, :lo12:ext]
+; FAST-ISEL: add x8, x8, :lo12:ext
 ; FAST-ISEL: ldr w0, [x8]
-; GLOBAL-ISEL-FALLBACK: ldr w0, [x8, ext]
+; GLOBAL-ISEL-FALLBACK: ldr w0, [x8, :lo12:ext]
 ; CHECK: ret
 
 define i32* @get_var_pointer() {
   ret i32* @var
 }
 
 ; CHECK-LABEL: get_var_pointer
 ; CHECK: adrp [[REG1:x[0-9]+]], __imp_var
-; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG1]], __imp_var]
+; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG1]], :lo12:__imp_var]
 ; CHECK: ret
 
 define i32 @call_external() {
   %call = tail call i32 @external()
   ret i32 %call
 }
 
 ; CHECK-LABEL: call_external
 ; CHECK: adrp x0, __imp_external
-; CHECK: ldr x0, [x0, __imp_external]
+; CHECK: ldr x0, [x0, :lo12:__imp_external]
 ; CHECK: br x0
 
 define i32 @call_internal() {
   %call = tail call i32 @internal()
   ret i32 %call
 }
 
 ; CHECK-LABEL: call_internal
 ; DAG-ISEL: b internal
 ; FAST-ISEL: b internal
 ; GLOBAL-ISEL: b internal

llvm/test/CodeGen/AArch64/mingw-refptr.ll

 ; RUN: llc < %s -mtriple=aarch64-w64-mingw32 | FileCheck %s
 ; RUN: llc < %s -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel* \
 ; RUN:     -mtriple=aarch64-w64-mingw32 2>&1| FileCheck %s --check-prefixes=GISEL,FALLBACK
 
 @var = external local_unnamed_addr global i32, align 4
 @dsolocalvar = external dso_local local_unnamed_addr global i32, align 4
 @localvar = dso_local local_unnamed_addr global i32 0, align 4
 @localcommon = common dso_local local_unnamed_addr global i32 0, align 4
 @extvar = external dllimport local_unnamed_addr global i32, align 4
 
 define dso_local i32 @getVar() {
 ; CHECK-LABEL: getVar:
 ; CHECK:    adrp x8, .refptr.var
-; CHECK:    ldr  x8, [x8, .refptr.var]
+; CHECK:    ldr  x8, [x8, :lo12:.refptr.var]
 ; CHECK:    ldr  w0, [x8]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @var, align 4
   ret i32 %0
 }
 
 define dso_local i32 @getDsoLocalVar() {
 ; CHECK-LABEL: getDsoLocalVar:
 ; CHECK:    adrp x8, dsolocalvar
-; CHECK:    ldr  w0, [x8, dsolocalvar]
+; CHECK:    ldr  w0, [x8, :lo12:dsolocalvar]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @dsolocalvar, align 4
   ret i32 %0
 }
 
 define dso_local i32 @getLocalVar() {
 ; CHECK-LABEL: getLocalVar:
 ; CHECK:    adrp x8, localvar
-; CHECK:    ldr  w0, [x8, localvar]
+; CHECK:    ldr  w0, [x8, :lo12:localvar]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @localvar, align 4
   ret i32 %0
 }
 
 define dso_local i32 @getLocalCommon() {
 ; CHECK-LABEL: getLocalCommon:
 ; CHECK:    adrp x8, localcommon
-; CHECK:    ldr  w0, [x8, localcommon]
+; CHECK:    ldr  w0, [x8, :lo12:localcommon]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @localcommon, align 4
   ret i32 %0
 }
 
 define dso_local i32 @getExtVar() {
 ; CHECK-LABEL: getExtVar:
 ; CHECK:    adrp x8, __imp_extvar
-; CHECK:    ldr  x8, [x8, __imp_extvar]
+; CHECK:    ldr  x8, [x8, :lo12:__imp_extvar]
 ; CHECK:    ldr  w0, [x8]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @extvar, align 4
   ret i32 %0
 }
 
 define dso_local void @callFunc() {
 ; CHECK-LABEL: callFunc:
 ; CHECK:    b otherFunc
 entry:
   tail call void @otherFunc()
   ret void
 }
 
 declare dso_local void @otherFunc()
 
 ; FALLBACK-NOT: remark:{{.*}}sspFunc
 define dso_local void @sspFunc() #0 {
 ; CHECK-LABEL: sspFunc:
 ; CHECK:    adrp x8, .refptr.__stack_chk_guard
-; CHECK:    ldr  x8, [x8, .refptr.__stack_chk_guard]
+; CHECK:    ldr  x8, [x8, :lo12:.refptr.__stack_chk_guard]
 ; CHECK:    ldr  x8, [x8]
 ; GISEL-LABEL: sspFunc:
 ; GISEL:    adrp x8, .refptr.__stack_chk_guard
-; GISEL:    ldr  x8, [x8, .refptr.__stack_chk_guard]
+; GISEL:    ldr  x8, [x8, :lo12:.refptr.__stack_chk_guard]
 ; GISEL:    ldr  x8, [x8]
 entry:
   %c = alloca i8, align 1
   call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %c)
   call void @ptrUser(i8* nonnull %c)
   call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %c)
   ret void
 }

llvm/test/CodeGen/AArch64/stack-protector-target.ll

 ; FUCHSIA-AARCH64-KERNEL: mrs [[A:.*]], TPIDR_EL1
 ; FUCHSIA-AARCH64-COMMON: ldur [[B:.*]], {{\[}}[[A]], #-16]
 ; FUCHSIA-AARCH64-COMMON: str [[B]], [sp,
 ; FUCHSIA-AARCH64-COMMON: ldur [[C:.*]], {{\[}}[[A]], #-16]
 ; FUCHSIA-AARCH64-COMMON: ldr [[D:.*]], [sp,
 ; FUCHSIA-AARCH64-COMMON: cmp [[C]], [[D]]
 
 ; WINDOWS-AARCH64: adrp x8, __security_cookie
-; WINDOWS-AARCH64: ldr x8, [x8, __security_cookie]
+; WINDOWS-AARCH64: ldr x8, [x8, :lo12:__security_cookie]
 ; WINDOWS-AARCH64: str x8, [sp, #8]
 ; WINDOWS-AARCH64: bl  _Z7CapturePi
 ; WINDOWS-AARCH64: ldr x0, [sp, #8]
 ; WINDOWS-AARCH64: bl  __security_check_cookie

llvm/test/CodeGen/AArch64/win-tls.ll

 
 define i64 @getVar64() {
   %1 = load i64, i64* @tlsVar64
   ret i64 %1
 }
 
 ; CHECK-LABEL: getVar
 ; CHECK: adrp [[TLS_INDEX_ADDR:x[0-9]+]], _tls_index
-; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], _tls_index]
+; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], :lo12:_tls_index]
 ; CHECK: ldr [[TLS_POINTER:x[0-9]+]], [x18, #88]
 
 ; CHECK: ldr [[TLS:x[0-9]+]], {{\[}}[[TLS_POINTER]], x[[TLS_INDEX]], lsl #3]
 ; CHECK: add [[TLS]], [[TLS]], :secrel_hi12:tlsVar
 ; CHECK: ldr w0, {{\[}}[[TLS]], :secrel_lo12:tlsVar{{\]}}
 
 ; CHECK-LABEL: getPtr
 ; CHECK: adrp [[TLS_INDEX_ADDR:x[0-9]+]], _tls_index
-; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], _tls_index]
+; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], :lo12:_tls_index]
 ; CHECK: ldr [[TLS_POINTER:x[0-9]+]], [x18, #88]
 
 ; CHECK: ldr [[TLS:x[0-9]+]], {{\[}}[[TLS_POINTER]], x[[TLS_INDEX]], lsl #3]
 ; CHECK: add [[TLS]], [[TLS]], :secrel_hi12:tlsVar
 ; CHECK: add x0, [[TLS]], :secrel_lo12:tlsVar
 
 ; CHECK-LABEL: setVar
 ; CHECK: adrp [[TLS_INDEX_ADDR:x[0-9]+]], _tls_index
-; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], _tls_index]
+; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], :lo12:_tls_index]
 ; CHECK: ldr [[TLS_POINTER:x[0-9]+]], [x18, #88]
 
 ; CHECK: ldr [[TLS:x[0-9]+]], {{\[}}[[TLS_POINTER]], x[[TLS_INDEX]], lsl #3]
 ; CHECK: add [[TLS]], [[TLS]], :secrel_hi12:tlsVar
 ; CHECK: str w0, {{\[}}[[TLS]], :secrel_lo12:tlsVar{{\]}}
 
 ; CHECK-LABEL: getVar8
 ; CHECK: add [[TLS:x[0-9]+]], [[TLS]], :secrel_hi12:tlsVar8
 ; CHECK: ldrb w0, {{\[}}[[TLS]], :secrel_lo12:tlsVar8{{\]}}
 
 ; CHECK-LABEL: getVar64
 ; CHECK: add [[TLS:x[0-9]+]], [[TLS]], :secrel_hi12:tlsVar64
 ; CHECK: ldr x0, {{\[}}[[TLS]], :secrel_lo12:tlsVar64{{\]}}

llvm/test/CodeGen/AArch64/win_cst_pool.ll

 ; RUN: llc < %s -mtriple=aarch64-win32-msvc | FileCheck %s
 ; RUN: llc < %s -mtriple=aarch64-win32-gnu | FileCheck -check-prefix=MINGW %s
 
 define double @double() {
   ret double 0x2000000000800001
 }
 ; CHECK:              .globl  __real@2000000000800001
 ; CHECK-NEXT:         .section        .rdata,"dr",discard,__real@2000000000800001
 ; CHECK-NEXT:         .p2align  3
 ; CHECK-NEXT: __real@2000000000800001:
 ; CHECK-NEXT:         .xword   0x2000000000800001
 ; CHECK:      double:
 ; CHECK:               adrp    x8, __real@2000000000800001
-; CHECK-NEXT:          ldr     d0, [x8, __real@2000000000800001]
+; CHECK-NEXT:          ldr     d0, [x8, :lo12:__real@2000000000800001]
 ; CHECK-NEXT:          ret
 
 ; MINGW:              .section        .rdata,"dr"
 ; MINGW-NEXT:         .p2align  3
 ; MINGW-NEXT: [[LABEL:\.LC.*]]:
 ; MINGW-NEXT:         .xword  0x2000000000800001
 ; MINGW:      double:
 ; MINGW:               adrp    x8, [[LABEL]]
-; MINGW-NEXT:          ldr     d0, [x8, [[LABEL]]]
+; MINGW-NEXT:          ldr     d0, [x8, :lo12:[[LABEL]]]
 ; MINGW-NEXT:          ret

llvm/test/CodeGen/AArch64/windows-extern-weak.ll

 ; RUN: llc -mtriple aarch64-windows -filetype asm -o - < %s | FileCheck %s
 ; RUN: llc -mtriple aarch64-windows -filetype asm -o - -fast-isel %s | FileCheck %s
 ; RUN: llc -mtriple aarch64-windows -filetype asm -o - -global-isel -global-isel-abort=0 %s | FileCheck %s
 
 define void @func() {
 ; CHECK-LABEL: func:
 ; CHECK:      str x30, [sp, #-16]!
 ; CHECK-NEXT: .seh_save_reg_x x30, 16
 ; CHECK-NEXT: .seh_endprologue
 ; CHECK-NEXT: adrp x8, .refptr.weakfunc
-; CHECK-NEXT: ldr x8, [x8, .refptr.weakfunc]
+; CHECK-NEXT: ldr x8, [x8, :lo12:.refptr.weakfunc]
 ; CHECK-NEXT: cbz     x8, .LBB0_2
 ; CHECK-NEXT: ; %bb.1:
 ; CHECK-NEXT: blr     x8
 ; CHECK-NEXT: .LBB0_2:
 ; CHECK-NEXT: .seh_startepilogue
 ; CHECK-NEXT: ldr x30, [sp], #16
 ; CHECK-NEXT: .seh_save_reg_x x30, 16
 ; CHECK-NEXT: .seh_endepilogue